Changeset 36254 in vbox for trunk/include/VBox/sup.h

Timestamp:

Mar 10, 2011 5:22:08 PM (14 years ago)

Author:

vboxsync

Message:

GIP,++: Lots of CPUs (disabled).

File:

• trunk/include/VBox/sup.h (modified) (12 diffs)

trunk/include/VBox/sup.h

@@ -31 +31 @@
 #include <iprt/assert.h>
 #include <iprt/stdarg.h>
+#include <iprt/cpuset.h>
 
 RT_C_DECLS_BEGIN
@@ -87 +88 @@
 } SUPPAGINGMODE;
 
-
-#pragma pack(1) /* paranoia */
+#ifdef SUP_WITH_LOTS_OF_CPUS
+# ifndef RT_WITH_LOTS_OF_CPUS
+#  error "RT_WITH_LOTS_OF_CPUS must be defined with SUP_WITH_LOTS_OF_CPUS"
+# endif
+#endif
+
+/**
+ * The CPU state.
+ */
+typedef enum SUPGIPCPUSTATE
+{
+    /** Invalid CPU state / unused CPU entry. */
+    SUPGIPCPUSTATE_INVALID = 0,
+    /** The CPU is not present. */
+    SUPGIPCPUSTATE_ABSENT,
+    /** The CPU is offline. */
+    SUPGIPCPUSTATE_OFFLINE,
+    /** The CPU is online. */
+    SUPGIPCPUSTATE_ONLINE,
+    /** Force 32-bit enum type. */
+    SUPGIPCPUSTATE_32_BIT_HACK = 0x7fffffff
+} SUPGIPCPUSTATE;
 
 /**
  * Per CPU data.
- * This is only used when
  */
 typedef struct SUPGIPCPU
@@ -125 +145 @@
     /** The interval between the last two NanoTS updates. (experiment for now) */
     volatile uint32_t   u32PrevUpdateIntervalNS;
+
     /** Reserved for future per processor data. */
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    volatile uint32_t   au32Reserved[5+5];
+#else
     volatile uint32_t   au32Reserved[5];
+#endif
+
+    /** @todo Add topology/NUMA info. */
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    /** The CPU state. */
+    SUPGIPCPUSTATE volatile enmState;
+    /** The host CPU ID of this CPU (the SUPGIPCPU is indexed by APIC ID). */
+    RTCPUID                 idCpu;
+    /** The CPU set index of this CPU. */
+    int16_t                 iCpuSet;
+    /** The APIC ID of this CPU. */
+    uint16_t                idApic;
+#endif
 } SUPGIPCPU;
+#ifdef SUP_WITH_LOTS_OF_CPUS
+AssertCompileSize(RTCPUID, 4);
+AssertCompileSize(SUPGIPCPU, 128);
+#else
 AssertCompileSize(SUPGIPCPU, 96);
-/*AssertCompileMemberAlignment(SUPGIPCPU, u64TSC, 8); -fixme */
+#endif
+AssertCompileMemberAlignment(SUPGIPCPU, u64NanoTS, 8);
+AssertCompileMemberAlignment(SUPGIPCPU, u64TSC, 8);
 
 /** Pointer to per cpu data.
@@ -135 +178 @@
 typedef SUPGIPCPU *PSUPGIPCPU;
 
+
+
+#ifndef SUP_WITH_LOTS_OF_CPUS
 /** The number of CPUs covered by the GIP.
  * @remarks Must be a power of two! */
-#define SUPGLOBALINFOPAGE_CPUS      32
+# define SUPGLOBALINFOPAGE_CPUS     32
+#endif
 
 /**
@@ -155 +202 @@
     /** The GIP update mode, see SUPGIPMODE. */
     uint32_t            u32Mode;
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    /** The number of entries in the CPU table.
+     * (This can work as RTMpGetArraySize().)  */
+    uint16_t            cCpus;
+    /** The size of the GIP in pages. */
+    uint16_t            cPages;
+#else
     /** Reserved / padding. */
     uint32_t            u32Padding0;
+#endif
     /** The update frequency of the of the NanoTS. */
     volatile uint32_t   u32UpdateHz;
@@ -163 +218 @@
     /** The timestamp of the last time we update the update frequency. */
     volatile uint64_t   u64NanoTSLastUpdateHz;
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    /** The set of online CPUs. */
+    RTCPUSET            OnlineCpuSet;
+    /** The number of CPUs that are online. */
+    volatile uint32_t   cOnlineCpus;
+    /** The number of CPUs present in the system. */
+    volatile uint32_t   cPresentCpus;
+    /** The set of present CPUs. */
+    RTCPUSET            PresentCpuSet;
+    /** The set of possible CPUs. */
+    RTCPUSET            PossibleCpuSet;
+    /** The highest number of CPUs possible. */
+    uint32_t            cPossibleCpus;
+    /** The max CPU ID (RTMpGetMaxCpuId). */
+    RTCPUID             idCpuMax;
+#endif
 
     /** Padding / reserved space for future data. */
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    uint32_t            au32Padding1[28];
+#else
     uint32_t            au32Padding1[56];
-
+#endif
+
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    /** Table indexed by the CPU APIC ID to get the CPU table index. */
+    uint16_t             aiCpuFromApicId[256];
+    /** CPU set index to CPU table index. */
+    uint16_t             aiCpuFromCpuSetIdx[RTCPUSET_MAX_CPUS];
+#endif
+
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    /** Array of per-cpu data.
+     * This is index by ApicId via the aiCpuFromApicId table.
+     *
+     * The clock and frequency information is updated for all CPUs if u32Mode
+     * is SUPGIPMODE_ASYNC_TSC, otherwise (SUPGIPMODE_SYNC_TSC) only the first
+     * entry is updated. */
+    SUPGIPCPU           aCPUs[1];
+#else
     /** Array of per-cpu data.
      * If u32Mode == SUPGIPMODE_SYNC_TSC then only the first entry is used.
@@ -172 +263 @@
      * index into the array. */
     SUPGIPCPU           aCPUs[SUPGLOBALINFOPAGE_CPUS];
+#endif
 } SUPGLOBALINFOPAGE;
+#ifndef SUP_WITH_LOTS_OF_CPUS
 AssertCompile(sizeof(SUPGLOBALINFOPAGE) <= 0x1000);
-/* AssertCompileMemberAlignment(SUPGLOBALINFOPAGE, aCPU, 32); - fixme */
+#endif
+#ifdef SUP_WITH_LOTS_OF_CPUS
+AssertCompileMemberAlignment(SUPGLOBALINFOPAGE, u64NanoTSLastUpdateHz, 8);
+AssertCompileMemberAlignment(SUPGLOBALINFOPAGE, aCPUs[0], 256);
+AssertCompileMemberAlignment(SUPGLOBALINFOPAGE, aCPUs[1], 128);
+#endif
 
 /** Pointer to the global info page.
@@ -180 +278 @@
 typedef SUPGLOBALINFOPAGE *PSUPGLOBALINFOPAGE;
 
-#pragma pack() /* end of paranoia */
 
 /** The value of the SUPGLOBALINFOPAGE::u32Magic field. (Soryo Fuyumi) */
@@ -187 +284 @@
  * Upper 16 bits is the major version. Major version is only changed with
  * incompatible changes in the GIP. */
-#define SUPGLOBALINFOPAGE_VERSION   0x00020000
+#ifdef SUP_WITH_LOTS_OF_CPUS
+# define SUPGLOBALINFOPAGE_VERSION   0x00030000
+#else
+# define SUPGLOBALINFOPAGE_VERSION   0x00020000
+#endif
 
 /**
@@ -254 +355 @@
  * Gets the TSC frequency of the calling CPU.
  *
- * @returns TSC frequency.
+ * @returns TSC frequency, UINT64_MAX on failure.
  * @param   pGip        The GIP pointer.
  */
@@ -262 +363 @@
 
     if (RT_UNLIKELY(!pGip || pGip->u32Magic != SUPGLOBALINFOPAGE_MAGIC))
-        return ~(uint64_t)0;
+        return UINT64_MAX;
 
     if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
@@ -268 +369 @@
     else
     {
+# ifdef SUP_WITH_LOTS_OF_CPUS
+        iCpu = pGip->aiCpuFromApicId[ASMGetApicId()];
+        if (iCpu >= pGip->cCpus)
+            return UINT64_MAX;
+# else
         iCpu = ASMGetApicId();
         if (RT_UNLIKELY(iCpu >= RT_ELEMENTS(pGip->aCPUs)))
-            return ~(uint64_t)0;
+            return UINT64_MAX;
+# endif
     }