VirtualBox

Ignore:
Timestamp:
Jun 12, 2011 6:37:56 PM (13 years ago)
Author:
vboxsync
Message:

Ran the source code massager (scm).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/PC/DevDMA.cpp

    r36228 r37423  
    7171 * left by one, including the control registers addresses. The DMA register
    7272 * offsets (except for the page registers) are therefore "double spaced".
    73  * 
     73 *
    7474 * Due to the address shifting, the DMA controller decodes more addresses
    7575 * than are usually documented, with aliasing. See the ICH8 datasheet.
     
    418418        return VINF_SUCCESS;
    419419    }
    420     else 
     420    else
    421421        return VERR_IOM_IOPORT_UNUSED;
    422422}
    423423
    424 /* DMA page registers. There are 16 R/W page registers for compatibility with 
     424/* DMA page registers. There are 16 R/W page registers for compatibility with
    425425 * the IBM PC/AT; only some of those registers are used for DMA. The page register
    426426 * accessible via port 80h may be read to insert small delays or used as a scratch
     
    430430                                     uint32_t *pu32, unsigned cb)
    431431{
    432     if (cb == 1) 
     432    if (cb == 1)
    433433    {
    434434        DMAControl  *dc = (DMAControl *)pvUser;
     
    437437        reg   = port & 7;
    438438        *pu32 = dc->au8Page[reg];
    439         Log2(("Read %#x to from page register %#x (channel %d)\n", 
     439        Log2(("Read %#x to from page register %#x (channel %d)\n",
    440440              *pu32, port, DMAPG2CX(reg)));
    441441        return VINF_SUCCESS;
     
    475475                                       uint32_t *pu32, unsigned cb)
    476476{
    477     if (cb == 1) 
     477    if (cb == 1)
    478478    {
    479479        DMAControl  *dc = (DMAControl *)pvUser;
     
    482482        reg   = port & 7;
    483483        *pu32 = dc->au8PageHi[reg];
    484         Log2(("Read %#x to from high page register %#x (channel %d)\n", 
     484        Log2(("Read %#x to from high page register %#x (channel %d)\n",
    485485              *pu32, port, DMAPG2CX(reg)));
    486486        return VINF_SUCCESS;
     
    501501        reg = port & 7;
    502502        dc->au8PageHi[reg] = u32;
    503         Log2(("Wrote %#x to high page register %#x (channel %d)\n", 
     503        Log2(("Wrote %#x to high page register %#x (channel %d)\n",
    504504              u32, port, DMAPG2CX(reg)));
    505505    }
     
    563563                        PFNDMATRANSFERHANDLER handler, void *pvUser)
    564564{
    565     DMAState    *s = PDMINS_2_DATA(pDevIns, DMAState *);   
     565    DMAState    *s = PDMINS_2_DATA(pDevIns, DMAState *);
    566566    DMAChannel  *ch = &s->DMAC[DMACH2C(channel)].ChState[channel & 3];
    567567
     
    682682
    683683    chidx  = channel & 3;
    684     if (level) 
     684    if (level)
    685685        dc->u8Status |= 1 << (chidx + 4);
    686686    else
     
    764764
    765765    /* ...and all four of its channels. */
    766     for (chidx = 0; chidx < 4; ++chidx) 
     766    for (chidx = 0; chidx < 4; ++chidx)
    767767    {
    768768        DMAChannel  *ch = &dc->ChState[chidx];
     
    796796    }
    797797
    798     for (chidx = 0; chidx < 4; ++chidx) 
     798    for (chidx = 0; chidx < 4; ++chidx)
    799799    {
    800800        DMAChannel  *ch = &dc->ChState[chidx];
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