Changeset 37423 in vbox for trunk/src/VBox/Devices/PC/DevDMA.cpp
- Timestamp:
- Jun 12, 2011 6:37:56 PM (13 years ago)
- File:
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- 1 edited
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trunk/src/VBox/Devices/PC/DevDMA.cpp
r36228 r37423 71 71 * left by one, including the control registers addresses. The DMA register 72 72 * offsets (except for the page registers) are therefore "double spaced". 73 * 73 * 74 74 * Due to the address shifting, the DMA controller decodes more addresses 75 75 * than are usually documented, with aliasing. See the ICH8 datasheet. … … 418 418 return VINF_SUCCESS; 419 419 } 420 else 420 else 421 421 return VERR_IOM_IOPORT_UNUSED; 422 422 } 423 423 424 /* DMA page registers. There are 16 R/W page registers for compatibility with 424 /* DMA page registers. There are 16 R/W page registers for compatibility with 425 425 * the IBM PC/AT; only some of those registers are used for DMA. The page register 426 426 * accessible via port 80h may be read to insert small delays or used as a scratch … … 430 430 uint32_t *pu32, unsigned cb) 431 431 { 432 if (cb == 1) 432 if (cb == 1) 433 433 { 434 434 DMAControl *dc = (DMAControl *)pvUser; … … 437 437 reg = port & 7; 438 438 *pu32 = dc->au8Page[reg]; 439 Log2(("Read %#x to from page register %#x (channel %d)\n", 439 Log2(("Read %#x to from page register %#x (channel %d)\n", 440 440 *pu32, port, DMAPG2CX(reg))); 441 441 return VINF_SUCCESS; … … 475 475 uint32_t *pu32, unsigned cb) 476 476 { 477 if (cb == 1) 477 if (cb == 1) 478 478 { 479 479 DMAControl *dc = (DMAControl *)pvUser; … … 482 482 reg = port & 7; 483 483 *pu32 = dc->au8PageHi[reg]; 484 Log2(("Read %#x to from high page register %#x (channel %d)\n", 484 Log2(("Read %#x to from high page register %#x (channel %d)\n", 485 485 *pu32, port, DMAPG2CX(reg))); 486 486 return VINF_SUCCESS; … … 501 501 reg = port & 7; 502 502 dc->au8PageHi[reg] = u32; 503 Log2(("Wrote %#x to high page register %#x (channel %d)\n", 503 Log2(("Wrote %#x to high page register %#x (channel %d)\n", 504 504 u32, port, DMAPG2CX(reg))); 505 505 } … … 563 563 PFNDMATRANSFERHANDLER handler, void *pvUser) 564 564 { 565 DMAState *s = PDMINS_2_DATA(pDevIns, DMAState *); 565 DMAState *s = PDMINS_2_DATA(pDevIns, DMAState *); 566 566 DMAChannel *ch = &s->DMAC[DMACH2C(channel)].ChState[channel & 3]; 567 567 … … 682 682 683 683 chidx = channel & 3; 684 if (level) 684 if (level) 685 685 dc->u8Status |= 1 << (chidx + 4); 686 686 else … … 764 764 765 765 /* ...and all four of its channels. */ 766 for (chidx = 0; chidx < 4; ++chidx) 766 for (chidx = 0; chidx < 4; ++chidx) 767 767 { 768 768 DMAChannel *ch = &dc->ChState[chidx]; … … 796 796 } 797 797 798 for (chidx = 0; chidx < 4; ++chidx) 798 for (chidx = 0; chidx < 4; ++chidx) 799 799 { 800 800 DMAChannel *ch = &dc->ChState[chidx];
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