Changeset 39091 in vbox for trunk/src/VBox/Devices/Bus
- Timestamp:
- Oct 24, 2011 1:58:22 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 74523
- Location:
- trunk/src/VBox/Devices/Bus
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r38852 r39091 555 555 } 556 556 #else 557 NOREF(len); 557 558 return VINF_IOM_HC_IOPORT_READ; 558 559 #endif … … 568 569 Log(("pci_config_read: %s: addr=%02x val=%08x len=%d\n", pci_dev->name, config_addr, *pu32, len)); 569 570 #else 571 NOREF(len); 570 572 return VINF_IOM_HC_IOPORT_READ; 571 573 #endif … … 1247 1249 static DECLCALLBACK(int) pciGenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 1248 1250 { 1251 NOREF(pDevIns); 1249 1252 return SSMR3PutMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config)); 1250 1253 } … … 1261 1264 static DECLCALLBACK(int) pciGenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 1262 1265 { 1266 NOREF(pDevIns); 1263 1267 return SSMR3GetMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config)); 1264 1268 } … … 1850 1854 static DECLCALLBACK(int) pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback) 1851 1855 { 1856 NOREF(pDevIns); 1857 1852 1858 /* 1853 1859 * Validate. … … 1892 1898 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld) 1893 1899 { 1900 NOREF(pDevIns); 1901 1894 1902 if (ppfnReadOld) 1895 1903 *ppfnReadOld = pPciDev->Int.s.pfnConfigRead; … … 1971 1979 { 1972 1980 PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS); 1973 PPCIBUS pBus = DEVINS_2_PCIBUS(pDevIns);1974 1981 uint16_t router; 1975 1982 uint8_t irq_map; 1976 1983 int i; 1984 NOREF(pszArgs); 1977 1985 1978 1986 router = pGlobals->PIIX3State.dev.devfn; -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r38853 r39091 179 179 DECLINLINE(void) ich9pciPhysToPciAddr(PICH9PCIGLOBALS pGlobals, RTGCPHYS GCPhysAddr, PciAddress* pPciAddr) 180 180 { 181 NOREF(pGlobals); 181 182 pPciAddr->iBus = (GCPhysAddr >> 20) & ((1<<6) - 1); 182 183 pPciAddr->iDeviceFunc = (GCPhysAddr >> 12) & ((1<<(5+3)) - 1); // 5 bits - device, 3 bits - function … … 295 296 { 296 297 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite); 297 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, pAddr->iBus, pAddr->iDeviceFunc, pAddr->iRegister, val, cb); 298 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, pAddr->iBus, pAddr->iDeviceFunc, 299 pAddr->iRegister, val, cb); 298 300 } 299 301 else … … 301 303 // do nothing, bridge not found 302 304 } 305 NOREF(rcReschedule); 303 306 #else 304 307 rc = rcReschedule; 305 goto out;306 308 #endif 307 309 } … … 316 318 #else 317 319 rc = rcReschedule; 318 goto out;319 320 #endif 320 321 } 321 322 } 322 323 323 out:324 324 Log2(("ich9pciDataWriteAddr: %02x:%02x:%02x reg %x(%d) %x %Rrc\n", 325 325 pAddr->iBus, pAddr->iDeviceFunc >> 3, pAddr->iDeviceFunc & 0x7, pAddr->iRegister, … … 398 398 else 399 399 ich9pciNoMem(pu32, cb); 400 NOREF(rcReschedule); 400 401 #else 401 402 rc = rcReschedule; 402 goto out;403 403 #endif 404 404 } else … … 414 414 #else 415 415 rc = rcReschedule; 416 goto out;417 416 #endif 418 417 } … … 421 420 } 422 421 423 out:424 422 Log3(("ich9pciDataReadAddr: %02x:%02x:%02x reg %x(%d) gave %x %Rrc\n", 425 423 pPciAddr->iBus, pPciAddr->iDeviceFunc >> 3, pPciAddr->iDeviceFunc & 0x7, pPciAddr->iRegister, … … 486 484 DECLINLINE(int) ich9pciSlotGetPirq(uint8_t uBus, uint8_t uDevFn, int iIrqNum) 487 485 { 486 NOREF(uBus); 488 487 int iSlotAddend = (uDevFn >> 3) - 1; 489 488 return (iIrqNum + iSlotAddend) & 3; … … 594 593 PciAddress aDest; 595 594 uint32_t u32 = 0; 595 NOREF(pvUser); 596 596 597 597 Log2(("ich9pciMcfgMMIOWrite: %RGp(%d) \n", GCPhysAddr, cb)); … … 627 627 PciAddress aDest; 628 628 uint32_t rv; 629 NOREF(pvUser); 629 630 630 631 LogFlow(("ich9pciMcfgMMIORead: %RGp(%d) \n", GCPhysAddr, cb)); … … 750 751 static void ich9pciUpdateMappings(PCIDevice* pDev) 751 752 { 752 PICH9PCIBUS pBus = pDev->Int.s.CTX_SUFF(pBus);753 753 uint64_t uLast, uNew; 754 754 … … 861 861 static DECLCALLBACK(int) ich9pciRegisterMsi(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg) 862 862 { 863 NOREF(pDevIns); 863 864 int rc; 864 865 … … 899 900 static DECLCALLBACK(int) ich9pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback) 900 901 { 902 NOREF(pDevIns); 903 901 904 /* 902 905 * Validate. … … 953 956 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld) 954 957 { 958 NOREF(pDevIns); 959 955 960 if (ppfnReadOld) 956 961 *ppfnReadOld = pPciDev->Int.s.pfnConfigRead; … … 972 977 static DECLCALLBACK(int) ich9pciGenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 973 978 { 979 NOREF(pDevIns); 974 980 Assert(!pciDevIsPassthrough(pPciDev)); 975 981 return SSMR3PutMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config)); … … 1304 1310 1305 1311 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass); 1312 if (uVersion != VBOX_ICH9PCI_SAVED_STATE_VERSION_CURRENT) 1313 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION; 1306 1314 1307 1315 /* … … 1325 1333 } 1326 1334 1327 void* pvMsixPage = RTMemTmpAllocZ(0x1000); 1335 void *pvMsixPage = RTMemTmpAllocZ(0x1000); 1336 AssertReturn(pvMsixPage, VERR_NO_TMP_MEMORY); 1337 1328 1338 /* 1329 1339 * Iterate all the devices. … … 1337 1347 rc = SSMR3GetU32(pSSM, &u32); 1338 1348 if (RT_FAILURE(rc)) 1339 return rc;1349 break; 1340 1350 if (u32 == (uint32_t)~0) 1341 1351 break; 1342 if ( u32 >= RT_ELEMENTS(pBus->apDevices) 1343 || u32 < i) 1344 { 1345 AssertMsgFailed(("u32=%#x i=%#x\n", u32, i)); 1346 goto out; 1347 } 1352 AssertMsgBreak(u32 < RT_ELEMENTS(pBus->apDevices) && u32 >= i, ("u32=%#x i=%#x\n", u32, i)); 1348 1353 1349 1354 /* skip forward to the device checking that no new devices are present. */ … … 1356 1361 PCIDevGetVendorId(pDev), PCIDevGetDeviceId(pDev))); 1357 1362 if (SSMR3HandleGetAfter(pSSM) != SSMAFTER_DEBUG_IT) 1358 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("New device in slot %#x, %s (vendor=%#06x device=%#06x)"), 1359 i, pDev->name, PCIDevGetVendorId(pDev), PCIDevGetDeviceId(pDev)); 1363 { 1364 rc = SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("New device in slot %#x, %s (vendor=%#06x device=%#06x)"), 1365 i, pDev->name, PCIDevGetVendorId(pDev), PCIDevGetDeviceId(pDev)); 1366 break; 1367 } 1360 1368 } 1361 1369 } 1370 if (RT_FAILURE(rc)) 1371 break; 1362 1372 1363 1373 /* get the data */ … … 1370 1380 SSMR3GetMem(pSSM, DevTmp.config, sizeof(DevTmp.config)); 1371 1381 1372 rc = SSMR3GetU32(pSSM, &DevTmp.Int.s.fFlags); 1373 if (RT_FAILURE(rc)) 1374 goto out; 1375 1376 rc = SSMR3GetS32(pSSM, &DevTmp.Int.s.uIrqPinState); 1377 if (RT_FAILURE(rc)) 1378 goto out; 1379 1380 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapOffset); 1381 if (RT_FAILURE(rc)) 1382 goto out; 1383 1384 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapSize); 1385 if (RT_FAILURE(rc)) 1386 goto out; 1387 1388 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsixCapOffset); 1389 if (RT_FAILURE(rc)) 1390 goto out; 1391 1382 SSMR3GetU32(pSSM, &DevTmp.Int.s.fFlags); 1383 SSMR3GetS32(pSSM, &DevTmp.Int.s.uIrqPinState); 1384 SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapOffset); 1385 SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapSize); 1386 SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsixCapOffset); 1392 1387 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsixCapSize); 1393 1388 if (RT_FAILURE(rc)) 1394 goto out;1389 break; 1395 1390 1396 1391 /* Load MSI-X page state */ … … 1398 1393 { 1399 1394 Assert(pvMsixPage != NULL); 1400 SSMR3GetMem(pSSM, pvMsixPage, 0x1000);1395 rc = SSMR3GetMem(pSSM, pvMsixPage, 0x1000); 1401 1396 if (RT_FAILURE(rc)) 1402 goto out;1397 break; 1403 1398 } 1404 1399 … … 1410 1405 PCIDevGetVendorId(&DevTmp), PCIDevGetDeviceId(&DevTmp))); 1411 1406 if (SSMR3HandleGetAfter(pSSM) != SSMAFTER_DEBUG_IT) 1412 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Device in slot %#x has been removed! vendor=%#06x device=%#06x"), 1413 i, PCIDevGetVendorId(&DevTmp), PCIDevGetDeviceId(&DevTmp)); 1407 { 1408 rc = SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Device in slot %#x has been removed! vendor=%#06x device=%#06x"), 1409 i, PCIDevGetVendorId(&DevTmp), PCIDevGetDeviceId(&DevTmp)); 1410 break; 1411 } 1414 1412 continue; 1415 1413 } 1416 1414 1417 1415 /* match the vendor id assuming that this will never be changed. */ 1418 if ( PCIDevGetVendorId(&DevTmp) != PCIDevGetVendorId(pDev)) 1419 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Device in slot %#x (%s) vendor id mismatch! saved=%.4Rhxs current=%.4Rhxs"), 1420 i, pDev->name, PCIDevGetVendorId(&DevTmp), PCIDevGetVendorId(pDev)); 1416 if (PCIDevGetVendorId(&DevTmp) != PCIDevGetVendorId(pDev)) 1417 { 1418 rc = SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Device in slot %#x (%s) vendor id mismatch! saved=%.4Rhxs current=%.4Rhxs"), 1419 i, pDev->name, PCIDevGetVendorId(&DevTmp), PCIDevGetVendorId(pDev)); 1420 break; 1421 } 1421 1422 1422 1423 /* commit the loaded device config. */ … … 1436 1437 } 1437 1438 1438 out: 1439 if (pvMsixPage) 1440 RTMemTmpFree(pvMsixPage); 1439 RTMemTmpFree(pvMsixPage); 1441 1440 1442 1441 return rc; … … 1453 1452 static DECLCALLBACK(int) ich9pciGenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 1454 1453 { 1454 NOREF(pDevIns); 1455 1455 Assert(!pciDevIsPassthrough(pPciDev)); 1456 1456 return SSMR3GetMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config)); … … 1822 1822 static DECLCALLBACK(int) ich9pciFakePCIBIOS(PPDMDEVINS pDevIns) 1823 1823 { 1824 unsigned i;1825 uint8_t elcr[2] = {0, 0};1826 1824 PICH9PCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS); 1827 PVM pVM = PDMDevHlpGetVM(pDevIns);1825 PVM pVM = PDMDevHlpGetVM(pDevIns); 1828 1826 Assert(pVM); 1829 1827 … … 1844 1842 * Init the devices. 1845 1843 */ 1846 for (i = 0; i < 256; i++)1844 for (int i = 0; i < 256; i++) 1847 1845 { 1848 1846 ich9pciBiosInitDevice(pGlobals, 0, i); … … 1981 1979 bool fUpdateMappings = false; 1982 1980 bool fP2PBridge = false; 1983 bool fPassthrough = pciDevIsPassthrough(aDev);1981 /*bool fPassthrough = pciDevIsPassthrough(aDev);*/ 1984 1982 uint8_t u8HeaderType = ich9pciGetByte(aDev, VBOX_PCI_HEADER_TYPE); 1985 1983 … … 2102 2100 static bool assignPosition(PICH9PCIBUS pBus, PPCIDEVICE pPciDev, const char *pszName, int iDevFn, PciAddress* aPosition) 2103 2101 { 2102 NOREF(pszName); 2104 2103 aPosition->iBus = 0; 2105 2104 aPosition->iDeviceFunc = iDevFn; … … 2107 2106 2108 2107 /* Explicit slot request */ 2109 if (iDevFn >= 0 && iDevFn < (int)RT_ELEMENTS(pBus->apDevices))2108 if (iDevFn >= 0 && iDevFn < (int)RT_ELEMENTS(pBus->apDevices)) 2110 2109 return true; 2111 2110 … … 2133 2132 } 2134 2133 2134 #ifdef SOME_UNUSED_FUNCTION 2135 2135 static bool hasHardAssignedDevsInSlot(PICH9PCIBUS pBus, int iSlot) 2136 2136 { … … 2147 2147 ; 2148 2148 } 2149 #endif 2149 2150 2150 2151 static int ich9pciRegisterInternal(PICH9PCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const char *pszName) … … 2581 2582 static void ich9pciResetDevice(PPCIDEVICE pDev) 2582 2583 { 2583 PICH9PCIBUS pBus = pDev->Int.s.CTX_SUFF(pBus);2584 int rc;2585 2586 2584 /* Clear regions */ 2587 2585 for (int iRegion = 0; iRegion < PCI_NUM_REGIONS; iRegion++) -
trunk/src/VBox/Devices/Bus/MsixCommon.cpp
r37636 r39091 116 116 PDMBOTHCBDECL(int) msixMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 117 117 { 118 /// @todo: qword accesses? 118 /// @todo qword accesses? 119 NOREF(pDevIns); 119 120 AssertMsgReturn(cb == 4, 120 121 ("MSI-X must be accessed with 4-byte reads"), … … 153 154 { 154 155 Assert(enmType == PCI_ADDRESS_SPACE_MEM); 156 NOREF(iRegion); NOREF(enmType); 155 157 156 158 int rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, pPciDev, … … 323 325 msixCheckPendingVectors(pDevIns, pPciHlp, pDev); 324 326 } 325 uint32_t MsixPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len) 327 328 329 uint32_t MsixPciConfigRead(PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len) 326 330 { 327 331 int32_t iOff = u32Address - pDev->Int.s.u8MsixCapOffset; 332 NOREF(pDevIns); 328 333 329 334 Assert(iOff >= 0 && (pciDevIsMsixCapable(pDev) && iOff < pDev->Int.s.u8MsixCapSize));
Note:
See TracChangeset
for help on using the changeset viewer.