Changeset 39402 in vbox for trunk/src/VBox
- Timestamp:
- Nov 23, 2011 4:25:04 PM (13 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 49 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r39078 r39402 218 218 * @returns VBox status code, see SELMToFlatEx and EMInterpretDisasOneEx for 219 219 * details. 220 * @retval VERR_ INTERNAL_ERROR on DISCoreOneEx failure.220 * @retval VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure. 221 221 * 222 222 * @param pVM The VM handle. … … 246 246 * 247 247 * @returns VBox status code. 248 * @retval VERR_ INTERNAL_ERROR on DISCoreOneEx failure.248 * @retval VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure. 249 249 * 250 250 * @param pVM The VM handle. … … 291 291 return VINF_SUCCESS; 292 292 AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%RGv rc=%Rrc\n", GCPtrInstr, rc)); 293 return VERR_ INTERNAL_ERROR;293 return VERR_EM_INTERNAL_DISAS_ERROR; 294 294 } 295 295 -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r39302 r39402 154 154 /** Used to shut up GCC warnings about variables that 'may be used uninitialized' 155 155 * due to GCC lacking knowledge about the value range of a switch. */ 156 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_I NTERNAL_ERROR_4)156 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE) 157 157 158 158 /** -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r39178 r39402 95 95 AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) != IOMMMIO_FLAGS_WRITE_PASSTHRU 96 96 || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING, 97 VERR_I NTERNAL_ERROR_5);98 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_I NTERNAL_ERROR_4);97 VERR_IOM_MMIO_IPE_1); 98 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2); 99 99 RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart); 100 100 bool const fReadMissing = (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) >= IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING; … … 189 189 break; 190 190 default: 191 AssertFailedReturn(VERR_I NTERNAL_ERROR_3);191 AssertFailedReturn(VERR_IOM_MMIO_IPE_3); 192 192 } 193 193 if (offAccess) … … 296 296 AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD 297 297 || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD, 298 VERR_I NTERNAL_ERROR_5);299 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_I NTERNAL_ERROR_4);298 VERR_IOM_MMIO_IPE_1); 299 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2); 300 300 RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart); 301 301 … … 1788 1788 */ 1789 1789 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys); 1790 AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));1791 1790 if (!pRange) 1792 1791 { 1792 AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue)); 1793 1793 IOM_UNLOCK(pVM); 1794 return VERR_I NTERNAL_ERROR;1794 return VERR_IOM_MMIO_RANGE_NOT_FOUND; 1795 1795 } 1796 1796 #ifdef VBOX_WITH_STATISTICS … … 1917 1917 */ 1918 1918 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys); 1919 AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));1920 1919 if (!pRange) 1921 1920 { 1921 AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue)); 1922 1922 IOM_UNLOCK(pVM); 1923 return VERR_I NTERNAL_ERROR;1923 return VERR_IOM_MMIO_RANGE_NOT_FOUND; 1924 1924 } 1925 1925 #ifdef VBOX_WITH_STATISTICS -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r39060 r39402 352 352 { 353 353 #ifdef IN_RING3 354 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_I NTERNAL_ERROR);354 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_IGNORED); 355 355 #else 356 356 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_GENERAL_FAILURE); … … 402 402 Log(("PDMVMMDevHeapR3ToGCPhys: pv=%p pvVMMDevHeap=%p cbVMMDevHeap=%#x\n", 403 403 pv, pVM->pdm.s.pvVMMDevHeap, pVM->pdm.s.cbVMMDevHeap)); 404 return VERR_ INTERNAL_ERROR_3;404 return VERR_PDM_DEV_HEAP_R3_TO_GCPHYS; 405 405 } 406 406 -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp
r39078 r39402 482 482 VMMR3DECL(int) PDMR3CritSectEnterEx(PPDMCRITSECT pCritSect, bool fCallRing3) 483 483 { 484 int rc = PDMCritSectEnter(pCritSect, VERR_I NTERNAL_ERROR);484 int rc = PDMCritSectEnter(pCritSect, VERR_IGNORED); 485 485 if ( rc == VINF_SUCCESS 486 486 && fCallRing3 -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r39078 r39402 996 996 { 997 997 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK); 998 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);998 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 999 999 Assert((pPdpe->u & X86_PDPE_PG_MASK) == pShwPage->Core.Key); 1000 1000 … … 1032 1032 /* Fetch the pgm pool shadow descriptor. */ 1033 1033 PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK); 1034 AssertReturn(pShwPde, VERR_ INTERNAL_ERROR);1034 AssertReturn(pShwPde, VERR_PGM_POOL_GET_PAGE_FAILED); 1035 1035 1036 1036 *ppShwPde = pShwPde; … … 1095 1095 { 1096 1096 pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK); 1097 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1097 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1098 1098 1099 1099 pgmPoolCacheUsed(pPool, pShwPage); … … 1132 1132 { 1133 1133 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK); 1134 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1134 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1135 1135 1136 1136 pgmPoolCacheUsed(pPool, pShwPage); … … 1160 1160 PGM_LOCK_ASSERT_OWNER(pVCpu->CTX_SUFF(pVM)); 1161 1161 1162 AssertReturn(pPml4e, VERR_ INTERNAL_ERROR);1162 AssertReturn(pPml4e, VERR_PGM_PML4_MAPPING); 1163 1163 if (ppPml4e) 1164 1164 *ppPml4e = (PX86PML4E)pPml4e; … … 1172 1172 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1173 1173 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK); 1174 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1174 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1175 1175 1176 1176 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64; … … 1180 1180 1181 1181 pShwPage = pgmPoolGetPage(pPool, pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK); 1182 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1182 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1183 1183 1184 1184 *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage); … … 1228 1228 { 1229 1229 pShwPage = pgmPoolGetPage(pPool, pPml4e->u & EPT_PML4E_PG_MASK); 1230 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1230 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1231 1231 1232 1232 pgmPoolCacheUsed(pPool, pShwPage); … … 1257 1257 { 1258 1258 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & EPT_PDPTE_PG_MASK); 1259 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1259 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1260 1260 1261 1261 pgmPoolCacheUsed(pPool, pShwPage); … … 1323 1323 1324 1324 default: 1325 AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_I NTERNAL_ERROR_5);1325 AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 1326 1326 } 1327 1327 return rc; … … 2054 2054 } 2055 2055 AssertRCReturn(rc, rc); 2056 AssertRCSuccessReturn(rc, VERR_I NTERNAL_ERROR);2056 AssertRCSuccessReturn(rc, VERR_IPE_UNEXPECTED_INFO_STATUS); 2057 2057 } 2058 2058 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r39301 r39402 588 588 rc = pgmShwSyncPaePDPtr(pVCpu, pvFault, X86_PDPE_P, &pPDDst); /* RW, US and A are reserved in PAE mode. */ 589 589 # endif 590 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);590 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 591 591 592 592 # elif PGM_SHW_TYPE == PGM_TYPE_AMD64 … … 599 599 rc = pgmShwSyncLongModePDPtr(pVCpu, pvFault, GstWalk.Pml4e.u, GstWalk.Pdpe.u, &pPDDst); 600 600 # endif 601 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);601 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 602 602 603 603 # elif PGM_SHW_TYPE == PGM_TYPE_EPT … … 605 605 PEPTPD pPDDst; 606 606 rc = pgmShwGetEPTPDPtr(pVCpu, pvFault, NULL, &pPDDst); 607 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);607 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 608 608 # endif 609 609 Assert(pPDDst); … … 1091 1091 NOREF(uErr); NOREF(pRegFrame); NOREF(pvFault); 1092 1092 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 1093 return VERR_ INTERNAL_ERROR;1093 return VERR_PGM_NOT_USED_IN_MODE; 1094 1094 # endif 1095 1095 } … … 2276 2276 NOREF(PdeSrc); 2277 2277 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 2278 return VERR_ INTERNAL_ERROR;2278 return VERR_PGM_NOT_USED_IN_MODE; 2279 2279 #endif 2280 2280 } … … 2741 2741 } 2742 2742 else 2743 AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);2743 AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 2744 2744 /** @todo Why do we bother preserving X86_PDE_AVL_MASK here? 2745 2745 * Both PGM_PDFLAGS_MAPPING and PGM_PDFLAGS_TRACK_DIRTY should be … … 3170 3170 { 3171 3171 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,SyncPT), a); 3172 AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);3172 AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 3173 3173 } 3174 3174 … … 3219 3219 NOREF(iPDSrc); NOREF(pPDSrc); 3220 3220 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_SHW_TYPE, PGM_GST_TYPE)); 3221 return VERR_ INTERNAL_ERROR;3221 return VERR_PGM_NOT_USED_IN_MODE; 3222 3222 #endif 3223 3223 } … … 3553 3553 3554 3554 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 3555 return VERR_ INTERNAL_ERROR;3555 return VERR_PGM_NOT_USED_IN_MODE; 3556 3556 #endif /* PGM_SHW_TYPE == PGM_TYPE_EPT || PGM_SHW_TYPE == PGM_TYPE_NESTED */ 3557 3557 } … … 4435 4435 pgmLock(pVM); 4436 4436 PPGMPAGE pPageCR3 = pgmPhysGetPage(pVM, GCPhysCR3); 4437 AssertReturn(pPageCR3, VERR_ INTERNAL_ERROR_2);4437 AssertReturn(pPageCR3, VERR_PGM_INVALID_CR3_ADDR); 4438 4438 HCPhysGuestCR3 = PGM_PAGE_GET_HCPHYS(pPageCR3); 4439 4439 /** @todo this needs some reworking wrt. locking? */ … … 4484 4484 pgmLock(pVM); 4485 4485 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 4486 AssertReturn(pPage, VERR_ INTERNAL_ERROR_2);4486 AssertReturn(pPage, VERR_PGM_INVALID_PDPE_ADDR); 4487 4487 HCPhys = PGM_PAGE_GET_HCPHYS(pPage); 4488 4488 # if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r39078 r39402 727 727 } 728 728 AssertMsgFailed(("whu?\n")); 729 rc = VERR_ INTERNAL_ERROR;729 rc = VERR_PGM_PHYS_HANDLER_IPE; 730 730 } 731 731 else … … 792 792 793 793 Assert(pCur3 == pCur2); 794 rc = VERR_ INTERNAL_ERROR;794 rc = VERR_PGM_PHYS_HANDLER_IPE; 795 795 } 796 796 else … … 915 915 default: 916 916 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType)); 917 rc = VERR_ INTERNAL_ERROR;917 rc = VERR_PGM_PHYS_HANDLER_IPE; 918 918 break; 919 919 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r39294 r39402 116 116 } 117 117 } 118 else if (RT_UNLIKELY(rc == VERR_ INTERNAL_ERROR))118 else if (RT_UNLIKELY(rc == VERR_EM_INTERNAL_DISAS_ERROR)) 119 119 return rc; 120 120 break; … … 135 135 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n", 136 136 pRom->aPages[iPage].enmProt, iPage, GCPhysFault), 137 VERR_I NTERNAL_ERROR);137 VERR_IPE_NOT_REACHED_DEFAULT_CASE); 138 138 } 139 139 … … 513 513 && pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), 514 514 ("%u\n", pVM->pgm.s.cHandyPages), 515 VERR_ INTERNAL_ERROR);515 VERR_PGM_HANDY_PAGE_IPE); 516 516 } 517 517 else … … 1029 1029 if (idChunk == NIL_GMM_CHUNKID) 1030 1030 { 1031 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_ INTERNAL_ERROR_2);1031 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_1); 1032 1032 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2) 1033 1033 { 1034 1034 /* Lookup the MMIO2 range and use pvR3 to calc the address. */ 1035 1035 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys); 1036 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_ INTERNAL_ERROR_2);1036 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_2); 1037 1037 *ppv = (void *)((uintptr_t)pRam->pvR3 + (uintptr_t)((GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK) - pRam->GCPhys)); 1038 1038 } … … 1043 1043 * them, that would also avoid this mess. It would actually be kind of 1044 1044 * elegant... */ 1045 AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_ INTERNAL_ERROR_3);1045 AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_PGM_MAP_MMIO2_ALIAS_MMIO); 1046 1046 } 1047 1047 else 1048 1048 { 1049 1049 /** @todo handle MMIO2 */ 1050 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_ INTERNAL_ERROR_2);1050 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_3); 1051 1051 AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg, 1052 1052 ("pPage=%R[pgmpage]\n", pPage), 1053 VERR_ INTERNAL_ERROR_2);1053 VERR_PGM_PHYS_PAGE_MAP_IPE_4); 1054 1054 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg); 1055 1055 } … … 1306 1306 { 1307 1307 int rc; 1308 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1308 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1309 1309 PGM_LOCK_ASSERT_OWNER(pVM); 1310 1310 pVM->pgm.s.cDeprecatedPageLocks++; … … 1436 1436 { 1437 1437 int rc; 1438 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1438 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1439 1439 PGM_LOCK_ASSERT_OWNER(pVM); 1440 1440 … … 1499 1499 int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv, PPGMPAGEMAPLOCK pLock) 1500 1500 { 1501 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1501 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1502 1502 PGM_LOCK_ASSERT_OWNER(pVM); 1503 1503 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0); -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r39078 r39402 2030 2030 LogFlow(("pgmPoolCacheFreeOne: refuse CR3 mapping\n")); 2031 2031 pgmPoolCacheUsed(pPool, pPage); 2032 AssertLogRelReturn(iLoop < 8192, VERR_ INTERNAL_ERROR);2032 AssertLogRelReturn(iLoop < 8192, VERR_PGM_POOL_TOO_MANY_LOOPS); 2033 2033 } 2034 2034 … … 4998 4998 } 4999 4999 iNew = pPool->iFreeHead; 5000 AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_ INTERNAL_ERROR);5000 AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_PGM_POOL_IPE); 5001 5001 } 5002 5002 -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r39078 r39402 306 306 307 307 PPGMMAPPING pMap = pgmGetMapping(pVM, (RTGCPTR)GCPtr); 308 AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_ INTERNAL_ERROR);308 AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_PGM_MAPPING_IPE); 309 309 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 310 310 pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(pPT); -
trunk/src/VBox/VMM/VMMAll/TMAll.cpp
r39078 r39402 1347 1347 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1348 1348 STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerSet), a); 1349 return VERR_ INTERNAL_ERROR;1349 return VERR_TM_TIMER_UNSTABLE_STATE; 1350 1350 } 1351 1351 … … 1693 1693 { 1694 1694 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1695 rc = VERR_ INTERNAL_ERROR;1695 rc = VERR_TM_TIMER_UNSTABLE_STATE; 1696 1696 tmTimerSetRelativeNowWorker(pVM, enmClock, pu64Now); 1697 1697 break; … … 1922 1922 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1923 1923 STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerStop), a); 1924 return VERR_ INTERNAL_ERROR;1924 return VERR_TM_TIMER_UNSTABLE_STATE; 1925 1925 } 1926 1926 … … 2119 2119 default: 2120 2120 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2121 return VERR_ INTERNAL_ERROR;2121 return VERR_TM_TIMER_BAD_CLOCK; 2122 2122 } 2123 2123 } … … 2149 2149 default: 2150 2150 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2151 return VERR_ INTERNAL_ERROR;2151 return VERR_TM_TIMER_BAD_CLOCK; 2152 2152 } 2153 2153 } … … 2179 2179 default: 2180 2180 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2181 return VERR_ INTERNAL_ERROR;2181 return VERR_TM_TIMER_BAD_CLOCK; 2182 2182 } 2183 2183 } -
trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp
r39078 r39402 76 76 } 77 77 AssertFailed(); 78 return VERR_ INTERNAL_ERROR;78 return VERR_TM_TSC_ALREADY_TICKING; 79 79 } 80 80 … … 96 96 } 97 97 AssertFailed(); 98 return VERR_ INTERNAL_ERROR;98 return VERR_TM_TSC_ALREADY_PAUSED; 99 99 } 100 100 -
trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
r39078 r39402 964 964 * Worker for TMR3PauseClocks. 965 965 * 966 * @returns VINF_SUCCESS or VERR_ INTERNAL_ERROR(asserted).966 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted). 967 967 * @param pVM The VM handle. 968 968 */ … … 970 970 { 971 971 uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cVirtualTicking); 972 AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_ INTERNAL_ERROR);972 AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE); 973 973 if (c == 0) 974 974 { … … 984 984 * Worker for TMR3ResumeClocks. 985 985 * 986 * @returns VINF_SUCCESS or VERR_ INTERNAL_ERROR(asserted).986 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted). 987 987 * @param pVM The VM handle. 988 988 */ … … 990 990 { 991 991 uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cVirtualTicking); 992 AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_ INTERNAL_ERROR);992 AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE); 993 993 if (c == 1) 994 994 { -
trunk/src/VBox/VMM/VMMR0/GMMR0.cpp
r39084 r39402 595 595 596 596 /** Macro for obtaining and validating the g_pGMM pointer. 597 * On failure it will return from the invoking function with the specified return value. 597 * 598 * On failure it will return from the invoking function with the specified 599 * return value. 598 600 * 599 601 * @param pGMM The name of the pGMM variable. 600 * @param rc The return value on failure. Use VERR_ INTERNAL_ERROR for601 * VBoxstatus codes.602 * @param rc The return value on failure. Use VERR_GMM_INSTANCE for VBox 603 * status codes. 602 604 */ 603 605 #define GMM_GET_VALID_INSTANCE(pGMM, rc) \ … … 608 610 } while (0) 609 611 610 /** Macro for obtaining and validating the g_pGMM pointer, void function variant. 611 * On failure it will return from the invoking function. 612 /** Macro for obtaining and validating the g_pGMM pointer, void function 613 * variant. 614 * 615 * On failure it will return from the invoking function. 612 616 * 613 617 * @param pGMM The name of the pGMM variable. … … 1097 1101 static int gmmR0ChunkMutexDropGiant(PGMMR0CHUNKMTXSTATE pMtxState) 1098 1102 { 1099 AssertReturn(pMtxState->fFlags == GMMR0CHUNK_MTX_KEEP_GIANT, VERR_ INTERNAL_ERROR_2);1103 AssertReturn(pMtxState->fFlags == GMMR0CHUNK_MTX_KEEP_GIANT, VERR_GMM_MTX_FLAGS); 1100 1104 Assert(pMtxState->pGMM->hMtxOwner == RTThreadNativeSelf()); 1101 1105 pMtxState->fFlags = GMMR0CHUNK_MTX_RETAKE_GIANT; … … 1458 1462 */ 1459 1463 PGMM pGMM; 1460 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);1464 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 1461 1465 PGVM pGVM; 1462 1466 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 1502 1506 } 1503 1507 else 1504 rc = VERR_ INTERNAL_ERROR_5;1508 rc = VERR_GMM_IS_NOT_SANE; 1505 1509 gmmR0MutexRelease(pGMM); 1506 1510 LogFlow(("GMMR0InitialReservation: returns %Rrc\n", rc)); … … 1555 1559 */ 1556 1560 PGMM pGMM; 1557 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);1561 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 1558 1562 PGVM pGVM; 1559 1563 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 1596 1600 } 1597 1601 else 1598 rc = VERR_ INTERNAL_ERROR_5;1602 rc = VERR_GMM_IS_NOT_SANE; 1599 1603 gmmR0MutexRelease(pGMM); 1600 1604 LogFlow(("GMMR0UpdateReservation: returns %Rrc\n", rc)); … … 2070 2074 2071 2075 /* bail out */ 2072 rc = VERR_ INTERNAL_ERROR;2076 rc = VERR_GMM_CHUNK_INSERT; 2073 2077 } 2074 2078 else 2075 rc = VERR_ INTERNAL_ERROR_5;2079 rc = VERR_GMM_IS_NOT_SANE; 2076 2080 gmmR0MutexRelease(pGMM); 2077 2081 } … … 2415 2419 break; 2416 2420 default: 2417 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_I NTERNAL_ERROR);2421 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 2418 2422 } 2419 2423 … … 2439 2443 case GMMACCOUNT_SHADOW: pGVM->gmm.s.Allocated.cShadowPages += cPages; break; 2440 2444 case GMMACCOUNT_FIXED: pGVM->gmm.s.Allocated.cFixedPages += cPages; break; 2441 default: AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_I NTERNAL_ERROR);2445 default: AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 2442 2446 } 2443 2447 pGVM->gmm.s.cPrivatePages += cPages; … … 2451 2455 { 2452 2456 iPage = gmmR0AllocatePagesInBoundMode(pGVM, iPage, cPages, paPages); 2453 AssertReleaseReturn(iPage == cPages, VERR_ INTERNAL_ERROR_3);2457 AssertReleaseReturn(iPage == cPages, VERR_GMM_ALLOC_PAGES_IPE); 2454 2458 return VINF_SUCCESS; 2455 2459 } … … 2528 2532 case GMMACCOUNT_SHADOW: pGVM->gmm.s.Allocated.cShadowPages -= cPages; break; 2529 2533 case GMMACCOUNT_FIXED: pGVM->gmm.s.Allocated.cFixedPages -= cPages; break; 2530 default: AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_I NTERNAL_ERROR);2534 default: AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 2531 2535 } 2532 2536 … … 2599 2603 */ 2600 2604 PGMM pGMM; 2601 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);2605 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 2602 2606 PGVM pGVM; 2603 2607 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 2755 2759 } 2756 2760 else 2757 rc = VERR_ INTERNAL_ERROR_5;2761 rc = VERR_GMM_IS_NOT_SANE; 2758 2762 gmmR0MutexRelease(pGMM); 2759 2763 LogFlow(("GMMR0AllocateHandyPages: returns %Rrc\n", rc)); … … 2793 2797 */ 2794 2798 PGMM pGMM; 2795 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);2799 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 2796 2800 PGVM pGVM; 2797 2801 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 2830 2834 } 2831 2835 else 2832 rc = VERR_ INTERNAL_ERROR_5;2836 rc = VERR_GMM_IS_NOT_SANE; 2833 2837 gmmR0MutexRelease(pGMM); 2834 2838 LogFlow(("GMMR0AllocatePages: returns %Rrc\n", rc)); … … 2892 2896 */ 2893 2897 PGMM pGMM; 2894 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);2898 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 2895 2899 PGVM pGVM; 2896 2900 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 2969 2973 { 2970 2974 gmmR0MutexRelease(pGMM); 2971 rc = VERR_ INTERNAL_ERROR_5;2975 rc = VERR_GMM_IS_NOT_SANE; 2972 2976 } 2973 2977 … … 2993 2997 */ 2994 2998 PGMM pGMM; 2995 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);2999 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 2996 3000 PGVM pGVM; 2997 3001 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 3036 3040 } 3037 3041 else 3038 rc = VERR_ INTERNAL_ERROR_5;3042 rc = VERR_GMM_IS_NOT_SANE; 3039 3043 3040 3044 gmmR0MutexRelease(pGMM); … … 3310 3314 break; 3311 3315 default: 3312 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_I NTERNAL_ERROR);3316 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 3313 3317 } 3314 3318 … … 3381 3385 case GMMACCOUNT_FIXED: pGVM->gmm.s.Allocated.cFixedPages -= iPage; break; 3382 3386 default: 3383 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_I NTERNAL_ERROR);3387 AssertMsgFailedReturn(("enmAccount=%d\n", enmAccount), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 3384 3388 } 3385 3389 … … 3415 3419 */ 3416 3420 PGMM pGMM; 3417 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);3421 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 3418 3422 PGVM pGVM; 3419 3423 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 3440 3444 } 3441 3445 else 3442 rc = VERR_ INTERNAL_ERROR_5;3446 rc = VERR_GMM_IS_NOT_SANE; 3443 3447 gmmR0MutexRelease(pGMM); 3444 3448 LogFlow(("GMMR0FreePages: returns %Rrc\n", rc)); … … 3507 3511 */ 3508 3512 PGMM pGMM; 3509 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);3513 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 3510 3514 PGVM pGVM; 3511 3515 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 3606 3610 } 3607 3611 else 3608 rc = VERR_ INTERNAL_ERROR_5;3612 rc = VERR_GMM_IS_NOT_SANE; 3609 3613 3610 3614 gmmR0MutexRelease(pGMM); … … 3658 3662 */ 3659 3663 PGMM pGMM; 3660 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);3664 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 3661 3665 pReq->cAllocPages = pGMM->cAllocatedPages; 3662 3666 pReq->cFreePages = (pGMM->cChunks << (GMM_CHUNK_SHIFT- PAGE_SHIFT)) - pGMM->cAllocatedPages; … … 3692 3696 */ 3693 3697 PGMM pGMM; 3694 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);3698 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 3695 3699 PGVM pGVM; 3696 3700 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 3710 3714 } 3711 3715 else 3712 rc = VERR_ INTERNAL_ERROR_5;3716 rc = VERR_GMM_IS_NOT_SANE; 3713 3717 3714 3718 gmmR0MutexRelease(pGMM); … … 3977 3981 */ 3978 3982 PGMM pGMM; 3979 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);3983 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 3980 3984 PGVM pGVM; 3981 3985 int rc = GVMMR0ByVM(pVM, &pGVM); … … 4042 4046 } 4043 4047 else 4044 rc = VERR_ INTERNAL_ERROR_5;4048 rc = VERR_GMM_IS_NOT_SANE; 4045 4049 gmmR0MutexRelease(pGMM); 4046 4050 … … 4087 4091 */ 4088 4092 PGMM pGMM; 4089 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4093 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4090 4094 PGVM pGVM; 4091 4095 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 4174 4178 */ 4175 4179 PGMM pGMM; 4176 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4180 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4177 4181 PGVM pGVM; 4178 4182 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 4322 4326 } 4323 4327 else 4324 rc = VERR_ INTERNAL_ERROR_5;4328 rc = VERR_GMM_IS_NOT_SANE; 4325 4329 4326 4330 end: … … 4378 4382 */ 4379 4383 PGMM pGMM; 4380 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4384 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4381 4385 PGVM pGVM; 4382 4386 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 4443 4447 } 4444 4448 else 4445 rc = VERR_ INTERNAL_ERROR_5;4449 rc = VERR_GMM_IS_NOT_SANE; 4446 4450 4447 4451 gmmR0MutexRelease(pGMM); … … 4553 4557 int rc = VINF_SUCCESS; 4554 4558 PGMM pGMM; 4555 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4559 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4556 4560 unsigned cPages = pModule->aRegions[idxRegion].cbRegion >> PAGE_SHIFT; 4557 4561 … … 4701 4705 * RTAvlGCPtrDestroy callback. 4702 4706 * 4703 * @returns 0 or VERR_ INTERNAL_ERROR.4707 * @returns 0 or VERR_GMM_INSTANCE. 4704 4708 * @param pNode The node to destroy. 4705 4709 * @param pvGVM The GVM handle. … … 4727 4731 /* Remove from the tree and free memory. */ 4728 4732 PGMM pGMM; 4729 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4733 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4730 4734 RTAvlGCPtrRemove(&pGMM->pGlobalSharedModuleTree, pRec->Core.Key); 4731 4735 RTMemFree(pRec); … … 4772 4776 */ 4773 4777 PGMM pGMM; 4774 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4778 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4775 4779 PGVM pGVM; 4776 4780 int rc = GVMMR0ByVMAndEMT(pVM, idCpu, &pGVM); … … 4791 4795 } 4792 4796 else 4793 rc = VERR_ INTERNAL_ERROR_5;4797 rc = VERR_GMM_IS_NOT_SANE; 4794 4798 4795 4799 gmmR0MutexRelease(pGMM); … … 4845 4849 */ 4846 4850 PGMM pGMM; 4847 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4851 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4848 4852 4849 4853 /* … … 4852 4856 gmmR0MutexAcquire(pGMM); 4853 4857 if (!GMM_CHECK_SANITY_UPON_ENTERING(pGMM)) 4854 rc = VERR_ INTERNAL_ERROR_5;4858 rc = VERR_GMM_IS_NOT_SANE; 4855 4859 else 4856 4860 rc = VINF_SUCCESS; … … 4871 4875 */ 4872 4876 PGMM pGMM; 4873 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4877 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4874 4878 4875 4879 gmmR0MutexRelease(pGMM); … … 4893 4897 */ 4894 4898 PGMM pGMM; 4895 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);4899 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 4896 4900 PGVM pGVM; 4897 4901 int rc = GVMMR0ByVMAndEMT(pVM, pVCpu->idCpu, &pGVM); … … 4923 4927 } 4924 4928 else 4925 rc = VERR_ INTERNAL_ERROR_5;4929 rc = VERR_GMM_IS_NOT_SANE; 4926 4930 4927 4931 # ifndef DEBUG_sandervl … … 5007 5011 5008 5012 PGMM pGMM; 5009 GMM_GET_VALID_INSTANCE(pGMM, VERR_ INTERNAL_ERROR);5013 GMM_GET_VALID_INSTANCE(pGMM, VERR_GMM_INSTANCE); 5010 5014 5011 5015 PGVM pGVM; … … 5052 5056 } 5053 5057 else 5054 rc = VERR_ INTERNAL_ERROR_5;5058 rc = VERR_GMM_IS_NOT_SANE; 5055 5059 5056 5060 gmmR0MutexRelease(pGMM); -
trunk/src/VBox/VMM/VMMR0/GVMMR0.cpp
r39303 r39402 272 272 * 273 273 * @param pGVMM The name of the pGVMM variable. 274 * @param rc The return value on failure. Use VERR_ INTERNAL_ERROR for275 * VBoxstatus codes.274 * @param rc The return value on failure. Use VERR_GVMM_INSTANCE for VBox 275 * status codes. 276 276 */ 277 277 #define GVMM_GET_VALID_INSTANCE(pGVMM, rc) \ … … 322 322 */ 323 323 uint32_t cHostCpus = RTMpGetArraySize(); 324 AssertMsgReturn(cHostCpus > 0 && cHostCpus < _64K, ("%d", (int)cHostCpus), VERR_ INTERNAL_ERROR_2);324 AssertMsgReturn(cHostCpus > 0 && cHostCpus < _64K, ("%d", (int)cHostCpus), VERR_GVMM_HOST_CPU_RANGE); 325 325 326 326 PGVMM pGVMM = (PGVMM)RTMemAllocZ(RT_UOFFSETOF(GVMM, aHostCpus[cHostCpus])); … … 535 535 */ 536 536 PGVMM pGVMM; 537 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);537 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 538 538 AssertPtrReturn(pSession, VERR_INVALID_HANDLE); 539 539 AssertPtrReturn(pszName, VERR_INVALID_POINTER); … … 602 602 */ 603 603 PGVMM pGVMM; 604 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);604 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 605 605 AssertPtrReturn(pSession, VERR_INVALID_HANDLE); 606 606 AssertPtrReturn(pszName, VERR_INVALID_POINTER); … … 740 740 LogFlow(("GVMMR0CreateVM: pSession=%p\n", pSession)); 741 741 PGVMM pGVMM; 742 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);742 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 743 743 744 744 AssertPtrReturn(ppVM, VERR_INVALID_POINTER); … … 750 750 751 751 RTNATIVETHREAD hEMT0 = RTThreadNativeSelf(); 752 AssertReturn(hEMT0 != NIL_RTNATIVETHREAD, VERR_ INTERNAL_ERROR);752 AssertReturn(hEMT0 != NIL_RTNATIVETHREAD, VERR_GVMM_BROKEN_IPRT); 753 753 RTNATIVETHREAD ProcId = RTProcSelf(); 754 AssertReturn(ProcId != NIL_RTPROCESS, VERR_ INTERNAL_ERROR);754 AssertReturn(ProcId != NIL_RTPROCESS, VERR_GVMM_BROKEN_IPRT); 755 755 756 756 /* … … 927 927 } 928 928 else 929 rc = VERR_ INTERNAL_ERROR;929 rc = VERR_GVMM_IPE_1; 930 930 } 931 931 else … … 1066 1066 LogFlow(("GVMMR0DestroyVM: pVM=%p\n", pVM)); 1067 1067 PGVMM pGVMM; 1068 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);1068 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 1069 1069 1070 1070 … … 1118 1118 pHandle, pHandle->pVM, pHandle->hEMT0, pHandle->ProcId, pHandle->pvObj, pVM, hSelf); 1119 1119 gvmmR0CreateDestroyUnlock(pGVMM); 1120 rc = VERR_ INTERNAL_ERROR;1120 rc = VERR_GVMM_IPE_2; 1121 1121 } 1122 1122 … … 1391 1391 RTPROCESS ProcId = RTProcSelf(); 1392 1392 PGVMM pGVMM; 1393 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);1393 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 1394 1394 1395 1395 /* … … 1484 1484 { 1485 1485 PGVMM pGVMM; 1486 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);1486 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 1487 1487 1488 1488 /* … … 1503 1503 RTPROCESS ProcId = RTProcSelf(); 1504 1504 AssertReturn(pHandle->ProcId == ProcId, VERR_NOT_OWNER); 1505 AssertPtrReturn(pHandle->pvObj, VERR_ INTERNAL_ERROR);1505 AssertPtrReturn(pHandle->pvObj, VERR_NOT_OWNER); 1506 1506 1507 1507 PGVM pGVM = pHandle->pGVM; 1508 AssertPtrReturn(pGVM, VERR_ INTERNAL_ERROR);1509 AssertReturn(pGVM->pVM == pVM, VERR_ INTERNAL_ERROR);1508 AssertPtrReturn(pGVM, VERR_NOT_OWNER); 1509 AssertReturn(pGVM->pVM == pVM, VERR_NOT_OWNER); 1510 1510 RTNATIVETHREAD hAllegedEMT = RTThreadNativeSelf(); 1511 1511 AssertReturn(idCpu < pGVM->cCpus, VERR_INVALID_CPU_ID); 1512 AssertReturn(pGVM->aCpus[idCpu].hEMT == hAllegedEMT, VERR_ INTERNAL_ERROR);1512 AssertReturn(pGVM->aCpus[idCpu].hEMT == hAllegedEMT, VERR_NOT_OWNER); 1513 1513 1514 1514 *ppGVM = pGVM; … … 2352 2352 else 2353 2353 { 2354 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);2354 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 2355 2355 memset(&pStats->SchedVM, 0, sizeof(pStats->SchedVM)); 2356 2356 … … 2501 2501 else 2502 2502 { 2503 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_ INTERNAL_ERROR);2503 GVMM_GET_VALID_INSTANCE(pGVMM, VERR_GVMM_INSTANCE); 2504 2504 2505 2505 int rc = gvmmR0UsedLock(pGVMM); -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r39078 r39402 926 926 * notification. Kind of unlikely though, so ignored for now. 927 927 */ 928 AssertReturn(!g_HvmR0.fEnabled, VERR_ INTERNAL_ERROR_3);928 AssertReturn(!g_HvmR0.fEnabled, VERR_HM_ALREADY_ENABLED_IPE); 929 929 ASMAtomicWriteBool(&g_HvmR0.fEnabled, true); 930 930 -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r39078 r39402 280 280 SVM_VMCB *pVMCB = (SVM_VMCB *)pVM->aCpus[i].hwaccm.s.svm.pVMCB; 281 281 282 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_ EM_INTERNAL_ERROR);282 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_HMSVM_INVALID_PVMCB); 283 283 284 284 /* Program the control fields. Most of them never have to be changed again. */ … … 661 661 662 662 pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB; 663 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_ EM_INTERNAL_ERROR);663 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_HMSVM_INVALID_PVMCB); 664 664 665 665 /* Guest CPU context: ES, CS, SS, DS, FS, GS. */ … … 979 979 980 980 pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB; 981 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_ EM_INTERNAL_ERROR);981 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_HMSVM_INVALID_PVMCB); 982 982 983 983 /* We can jump to this point to resume execution after determining that a VM-exit is innocent. … … 1850 1850 default: 1851 1851 AssertMsgFailed(("Unexpected vm-exit caused by exception %x\n", vector)); 1852 rc = VERR_ EM_INTERNAL_ERROR;1852 rc = VERR_HMSVM_UNEXPECTED_XCPT_EXIT; 1853 1853 break; 1854 1854 … … 2516 2516 default: 2517 2517 /* Unexpected exit codes. */ 2518 rc = VERR_ EM_INTERNAL_ERROR;2518 rc = VERR_HMSVM_UNEXPECTED_EXIT; 2519 2519 AssertMsgFailed(("Unexpected exit code %x\n", exitCode)); /* Can't happen. */ 2520 2520 break; … … 2620 2620 break; 2621 2621 default: 2622 AssertMsgFailedReturn(("Unexpected type %d\n", pPatch->enmType), VERR_ INTERNAL_ERROR);2622 AssertMsgFailedReturn(("Unexpected type %d\n", pPatch->enmType), VERR_HMSVM_UNEXPECTED_PATCH_TYPE); 2623 2623 } 2624 2624 } … … 2793 2793 2794 2794 pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB; 2795 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_ EM_INTERNAL_ERROR);2795 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_HMSVM_INVALID_PVMCB); 2796 2796 2797 2797 #if HC_ARCH_BITS == 32 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r39078 r39402 2138 2138 default: 2139 2139 AssertFailed(); 2140 return VERR_ INTERNAL_ERROR;2140 return VERR_HM_UNEXPECTED_LD_ST_MSR; 2141 2141 } 2142 2142 } … … 4817 4817 RTHCUINTREG uOldEFlags; 4818 4818 4819 AssertReturn(pVM->hwaccm.s.pfnHost32ToGuest64R0, VERR_ INTERNAL_ERROR);4819 AssertReturn(pVM->hwaccm.s.pfnHost32ToGuest64R0, VERR_HM_NO_32_TO_64_SWITCHER); 4820 4820 Assert(pfnHandler); 4821 4821 Assert(pVCpu->hwaccm.s.vmx.VMCSCache.Write.cValidEntries <= RT_ELEMENTS(pVCpu->hwaccm.s.vmx.VMCSCache.Write.aField)); -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r39078 r39402 80 80 */ 81 81 uint32_t iFirst = pVM->pgm.s.cHandyPages; 82 AssertReturn(iFirst <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), VERR_ INTERNAL_ERROR);82 AssertReturn(iFirst <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), VERR_PGM_HANDY_PAGE_IPE); 83 83 uint32_t cPages = RT_ELEMENTS(pVM->pgm.s.aHandyPages) - iFirst; 84 84 if (!cPages) … … 589 589 #else 590 590 AssertLogRelFailed(); 591 return VERR_ INTERNAL_ERROR_4;592 #endif 593 } 594 591 return VERR_PGM_NOT_USED_IN_MODE; 592 #endif 593 } 594 -
trunk/src/VBox/VMM/VMMR0/VMMR0JmpA-amd64.asm
r37227 r39402 21 21 %include "VBox/asmdefs.mac" 22 22 %include "VMMInternal.mac" 23 %include " iprt/err.mac"23 %include "VBox/err.mac" 24 24 %include "VBox/param.mac" 25 25 … … 173 173 174 174 .entry_error: 175 mov eax, VERR_ INTERNAL_ERROR_2175 mov eax, VERR_VMM_SET_JMP_ERROR 176 176 jmp .proper_return 177 177 178 178 .stack_overflow: 179 mov eax, VERR_ INTERNAL_ERROR_5179 mov eax, VERR_VMM_SET_JMP_STACK_OVERFLOW 180 180 jmp .proper_return 181 181 … … 195 195 mov r14, [xDX + VMMR0JMPBUF.r14] 196 196 mov r15, [xDX + VMMR0JMPBUF.r15] 197 mov eax, VERR_ INTERNAL_ERROR_3 ; todo better return code!197 mov eax, VERR_VMM_SET_JMP_ABORTED_RESUME 198 198 leave 199 199 ret … … 413 413 .magic_ok: 414 414 %endif 415 mov eax, VERR_ INTERNAL_ERROR_4415 mov eax, VERR_VMM_LONG_JMP_ERROR 416 416 %ifdef RT_OS_WINDOWS 417 417 add rsp, 0a0h ; skip XMM registers since they are unmodified. -
trunk/src/VBox/VMM/VMMR0/VMMR0JmpA-x86.asm
r35334 r39402 179 179 180 180 .entry_error: 181 mov eax, VERR_ INTERNAL_ERROR_2181 mov eax, VERR_VMM_SET_JMP_ERROR 182 182 jmp .proper_return 183 183 184 184 .stack_overflow: 185 mov eax, VERR_ INTERNAL_ERROR_5185 mov eax, VERR_VMM_SET_JMP_STACK_OVERFLOW 186 186 mov edx, ebx 187 187 jmp .proper_return 188 188 189 189 .stack_overflow_almost: 190 mov eax, VERR_ INTERNAL_ERROR190 mov eax, VERR_VMM_SET_JMP_STACK_OVERFLOW 191 191 mov edx, ebx 192 192 jmp .proper_return … … 200 200 mov esi, [xDX + VMMR0JMPBUF.esi] 201 201 mov ebx, [xDX + VMMR0JMPBUF.ebx] 202 mov eax, VERR_ INTERNAL_ERROR_3 ; todo better return code!202 mov eax, VERR_VMM_SET_JMP_ABORTED_RESUME 203 203 ret 204 204 … … 373 373 pop esi 374 374 pop edi 375 mov eax, VERR_ INTERNAL_ERROR_4375 mov eax, VERR_VMM_LONG_JMP_ERROR 376 376 leave 377 377 ret -
trunk/src/VBox/VMM/VMMR3/HWACCM.cpp
r39078 r39402 2561 2561 2562 2562 default: 2563 AssertFailed(); 2564 return VERR_INTERNAL_ERROR; 2563 AssertLogRelFailedReturn(VERR_INTERNAL_ERROR); 2565 2564 } 2566 2565 -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r39111 r39402 952 952 AssertMsgFailed(("This cannot happen!\n")); 953 953 MMHyperFree(pVM, pRangeNew); 954 rc = VERR_I NTERNAL_ERROR;954 rc = VERR_IOM_IOPORT_IPE_1; 955 955 } 956 956 break; … … 1035 1035 AssertMsgFailed(("This cannot happen!\n")); 1036 1036 MMHyperFree(pVM, pRangeNew); 1037 rc = VERR_I NTERNAL_ERROR;1037 rc = VERR_IOM_IOPORT_IPE_1; 1038 1038 } 1039 1039 break; … … 1117 1117 AssertMsgFailed(("This cannot happen!\n")); 1118 1118 MMHyperFree(pVM, pRangeNew); 1119 rc = VERR_I NTERNAL_ERROR;1119 rc = VERR_IOM_IOPORT_IPE_1; 1120 1120 } 1121 1121 break; … … 1153 1153 default: 1154 1154 AssertReleaseMsgFailed(("cb=%d\n", cb)); 1155 return VERR_I NTERNAL_ERROR;1155 return VERR_IOM_IOPORT_IPE_2; 1156 1156 } 1157 1157 return VINF_SUCCESS; … … 1489 1489 DBGFR3Info(pVM, "mmio", NULL, NULL); 1490 1490 AssertMsgFailed(("This cannot happen!\n")); 1491 rc = VERR_I NTERNAL_ERROR;1491 rc = VERR_IOM_IOPORT_IPE_3; 1492 1492 } 1493 1493 else -
trunk/src/VBox/VMM/VMMR3/MMHyper.cpp
r39078 r39402 582 582 RTHCPHYS HCPhys; 583 583 rc = PGMR3PhysMMIO2GetHCPhys(pVM, pDevIns, iRegion, offCur, &HCPhys); 584 AssertRCReturn(rc, VERR_INTERNAL_ERROR);584 AssertRCReturn(rc, rc); 585 585 rc = PGMMap(pVM, GCPtr + (offCur - off), HCPhys, PAGE_SIZE, 0); 586 586 if (RT_FAILURE(rc)) -
trunk/src/VBox/VMM/VMMR3/PDM.cpp
r39078 r39402 739 739 { 740 740 LogFlow(("pdmR3LiveExec:\n")); 741 AssertReturn(uPass == 0, VERR_ INTERNAL_ERROR_4);741 AssertReturn(uPass == 0, VERR_SSM_UNEXPECTED_PASS); 742 742 pdmR3SaveBoth(pVM, pSSM); 743 743 return VINF_SSM_DONT_CALL_AGAIN; -
trunk/src/VBox/VMM/VMMR3/PDMCritSect.cpp
r37466 r39402 429 429 PVM pVM = pCritSect->s.pVMR3; 430 430 PUVM pUVM = pVM->pUVM; 431 AssertReleaseReturn(pVM, VERR_ INTERNAL_ERROR);431 AssertReleaseReturn(pVM, VERR_PDM_CRITSECT_IPE); 432 432 PPDMCRITSECTINT pPrev = NULL; 433 433 RTCritSectEnter(&pUVM->pdm.s.ListCritSect); … … 448 448 RTCritSectLeave(&pUVM->pdm.s.ListCritSect); 449 449 AssertReleaseMsgFailed(("pCritSect=%p wasn't found!\n", pCritSect)); 450 return VERR_ INTERNAL_ERROR;450 return VERR_PDM_CRITSECT_NOT_FOUND; 451 451 } 452 452 … … 518 518 519 519 #ifdef PDMCRITSECT_STRICT 520 int rc = PDMCritSectEnterDebug(pCritSect, VERR_I NTERNAL_ERROR,520 int rc = PDMCritSectEnterDebug(pCritSect, VERR_IGNORED, 521 521 SrcPos.uId, SrcPos.pszFile, SrcPos.uLine, SrcPos.pszFunction); 522 522 #else 523 int rc = PDMCritSectEnter(pCritSect, VERR_I NTERNAL_ERROR);523 int rc = PDMCritSectEnter(pCritSect, VERR_IGNORED); 524 524 #endif 525 525 AssertLogRelRC(rc); -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r39136 r39402 1093 1093 */ 1094 1094 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n")); 1095 return VERR_ INTERNAL_ERROR;1095 return VERR_PDM_ONE_PCI_FUNCTION_PER_DEVICE; 1096 1096 } 1097 1097 … … 1136 1136 if (RT_SUCCESS(rc)) 1137 1137 { 1138 if (u8Device > 31) 1139 { 1140 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n", 1141 u8Device, pDevIns->pReg->szName, pDevIns->iInstance)); 1142 return VERR_INTERNAL_ERROR; 1143 } 1144 1145 uint8_t u8Function; 1138 AssertMsgReturn(u8Device <= 31, 1139 ("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n", 1140 u8Device, pDevIns->pReg->szName, pDevIns->iInstance), 1141 VERR_PDM_BAD_PCI_CONFIG); 1142 1143 uint8_t u8Function; 1146 1144 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function); 1147 if (RT_FAILURE(rc)) 1148 { 1149 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n", 1150 rc, pDevIns->pReg->szName, pDevIns->iInstance)); 1151 return rc; 1152 } 1153 if (u8Function > 7) 1154 { 1155 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n", 1156 u8Function, pDevIns->pReg->szName, pDevIns->iInstance)); 1157 return VERR_INTERNAL_ERROR; 1158 } 1145 AssertMsgRCReturn(rc, ("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n", 1146 rc, pDevIns->pReg->szName, pDevIns->iInstance), 1147 rc); 1148 AssertMsgReturn(u8Function <= 7, 1149 ("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n", 1150 u8Function, pDevIns->pReg->szName, pDevIns->iInstance), 1151 VERR_PDM_BAD_PCI_CONFIG); 1152 1159 1153 iDev = (u8Device << 3) | u8Function; 1160 1154 } … … 1610 1604 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER); 1611 1605 1612 AssertReturn(pDevIns->pCritSectRoR3, VERR_ INTERNAL_ERROR_4);1606 AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1); 1613 1607 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER); 1614 1608 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER); -
trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp
r36820 r39402 579 579 { 580 580 PPDMIHPETLEGACYNOTIFY pPort = PDMIBASE_QUERY_INTERFACE(pBase, PDMIHPETLEGACYNOTIFY); 581 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_ INTERNAL_ERROR_3);581 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_PDM_HPET_LEGACY_NOTIFY_MISSING); 582 582 pPort->pfnModeChanged(pPort, fActivated); 583 583 } -
trunk/src/VBox/VMM/VMMR3/PDMThread.cpp
r36437 r39402 86 86 default: 87 87 AssertMsgFailed(("%d\n", pThread->Internal.s.enmType)); 88 rc = VERR_ INTERNAL_ERROR;88 rc = VERR_PDM_THREAD_IPE_1; 89 89 break; 90 90 } … … 156 156 if ( RT_SUCCESS(rc) 157 157 && pThread->enmState != PDMTHREADSTATE_SUSPENDED) 158 rc = VERR_ INTERNAL_ERROR;158 rc = VERR_PDM_THREAD_IPE_2; 159 159 if (RT_SUCCESS(rc)) 160 160 { … … 409 409 default: 410 410 AssertMsgFailed(("enmState=%d\n", enmState)); 411 rc = VERR_ INTERNAL_ERROR;411 rc = VERR_PDM_THREAD_IPE_2; 412 412 break; 413 413 } … … 668 668 669 669 if (RT_SUCCESS(rc)) 670 rc = VERR_ INTERNAL_ERROR;670 rc = VERR_PDM_THREAD_IPE_2; 671 671 } 672 672 } … … 732 732 * Assert sanity. 733 733 */ 734 AssertReturn(pThread->enmState > PDMTHREADSTATE_INVALID && pThread->enmState < PDMTHREADSTATE_TERMINATED, VERR_ INTERNAL_ERROR);735 AssertReturn(pThread->Thread == RTThreadSelf(), VERR_ INTERNAL_ERROR);734 AssertReturn(pThread->enmState > PDMTHREADSTATE_INVALID && pThread->enmState < PDMTHREADSTATE_TERMINATED, VERR_PDM_THREAD_IPE_2); 735 AssertReturn(pThread->Thread == RTThreadSelf(), VERR_PDM_THREAD_INVALID_CALLER); 736 736 737 737 /* … … 798 798 default: 799 799 AssertMsgFailed(("%d\n", pThread->Internal.s.enmType)); 800 rc = VERR_ INTERNAL_ERROR;800 rc = VERR_PDM_THREAD_IPE_1; 801 801 break; 802 802 } … … 947 947 if ( RT_SUCCESS(rc) 948 948 && pThread->enmState != PDMTHREADSTATE_SUSPENDED) 949 rc = VERR_ INTERNAL_ERROR;949 rc = VERR_PDM_THREAD_IPE_2; 950 950 if (RT_SUCCESS(rc)) 951 951 return rc; … … 1040 1040 if ( RT_SUCCESS(rc) 1041 1041 && pThread->enmState != PDMTHREADSTATE_RUNNING) 1042 rc = VERR_ INTERNAL_ERROR;1042 rc = VERR_PDM_THREAD_IPE_2; 1043 1043 if (RT_SUCCESS(rc)) 1044 1044 return rc; -
trunk/src/VBox/VMM/VMMR3/PGM.cpp
r39084 r39402 2216 2216 } 2217 2217 #else 2218 AssertLogRelReturn(!pVM->pgm.s.fPciPassthrough, VERR_ INTERNAL_ERROR_5);2218 AssertLogRelReturn(!pVM->pgm.s.fPciPassthrough, VERR_PGM_PCI_PASSTHRU_MISCONFIG); 2219 2219 #endif 2220 2220 break; -
trunk/src/VBox/VMM/VMMR3/PGMMap.cpp
r39078 r39402 551 551 AssertMsgReturn(cb && !(cb & X86_PAGE_4M_OFFSET_MASK), ("cb (%#x) is 0 or not aligned on a 4MB address!\n", cb), 552 552 VERR_INVALID_PARAMETER); 553 AssertReturn(pgmMapAreMappingsEnabled(pVM), VERR_ INTERNAL_ERROR_3);554 AssertReturn(pVM->cCpus == 1, VERR_ INTERNAL_ERROR_4);553 AssertReturn(pgmMapAreMappingsEnabled(pVM), VERR_PGM_MAPPINGS_DISABLED); 554 AssertReturn(pVM->cCpus == 1, VERR_PGM_MAPPINGS_SMP); 555 555 556 556 /* … … 684 684 VMMR3DECL(int) PGMR3MappingsDisable(PVM pVM) 685 685 { 686 AssertReturn(!pVM->pgm.s.fMappingsFixed, VERR_ INTERNAL_ERROR_4);687 AssertReturn(!pVM->pgm.s.fMappingsFixedRestored, VERR_ INTERNAL_ERROR_4);686 AssertReturn(!pVM->pgm.s.fMappingsFixed, VERR_PGM_MAPPINGS_FIXED); 687 AssertReturn(!pVM->pgm.s.fMappingsFixedRestored, VERR_PGM_MAPPINGS_FIXED); 688 688 if (pVM->pgm.s.fMappingsDisabled) 689 689 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r39084 r39402 3394 3394 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhys=%RGp\n", 3395 3395 pRom->aPages[iPage].enmProt, iPage, GCPhys), 3396 VERR_I NTERNAL_ERROR);3396 VERR_IPE_NOT_REACHED_DEFAULT_CASE); 3397 3397 } 3398 3398 } … … 3432 3432 { 3433 3433 pShadowPage = pgmPhysGetPage(pVM, GCPhys); 3434 AssertLogRelReturn(pShadowPage, VERR_ INTERNAL_ERROR);3434 AssertLogRelReturn(pShadowPage, VERR_PGM_PHYS_PAGE_GET_IPE); 3435 3435 } 3436 3436 … … 3450 3450 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhys=%RGp\n", 3451 3451 pRom->aPages[iPage].enmProt, iPage, GCPhys), 3452 VERR_I NTERNAL_ERROR);3452 VERR_IPE_NOT_REACHED_DEFAULT_CASE); 3453 3453 } 3454 3454 } … … 4240 4240 */ 4241 4241 uint32_t iClear = pVM->pgm.s.cHandyPages; 4242 AssertMsgReturn(iClear <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d", iClear), VERR_ INTERNAL_ERROR);4242 AssertMsgReturn(iClear <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d", iClear), VERR_PGM_HANDY_PAGE_IPE); 4243 4243 Log(("PGMR3PhysAllocateHandyPages: %d -> %d\n", iClear, RT_ELEMENTS(pVM->pgm.s.aHandyPages))); 4244 4244 int rcAlloc = VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r39078 r39402 459 459 { 460 460 PPGMPOOL pPool = pVM->pgm.s.pPoolR3; 461 AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_ INTERNAL_ERROR);461 AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY); 462 462 463 463 pgmLock(pVM); -
trunk/src/VBox/VMM/VMMR3/PGMSavedState.cpp
r39082 r39402 1998 1998 { 1999 1999 pgmUnlock(pVM); 2000 AssertLogRelFailedReturn(VERR_ INTERNAL_ERROR_2);2000 AssertLogRelFailedReturn(VERR_PGM_WRITE_MONITOR_ENGAGED); 2001 2001 } 2002 2002 pVM->pgm.s.fPhysWriteMonitoringEngaged = true; … … 2266 2266 rc = pgmR3LoadPageBitsOld(pVM, pSSM, uType, pPage, GCPhys, pRam); 2267 2267 else 2268 rc = VERR_ INTERNAL_ERROR;2268 rc = VERR_PGM_INVALID_SAVED_PAGE_STATE; 2269 2269 AssertLogRelMsgRCReturn(rc, ("pPage=%R[pgmpage] uState=%d uType=%d GCPhys=%RGp %s rc=%Rrc\n", 2270 2270 pPage, uState, uType, GCPhys, pRam->pszDesc, rc), … … 2291 2291 */ 2292 2292 PPGMROMPAGE pRomPage = pgmR3GetRomPage(pVM, GCPhys); 2293 AssertLogRelMsgReturn(pRomPage, ("GCPhys=%RGp %s\n", GCPhys, pRam->pszDesc), VERR_ INTERNAL_ERROR);2293 AssertLogRelMsgReturn(pRomPage, ("GCPhys=%RGp %s\n", GCPhys, pRam->pszDesc), VERR_PGM_SAVED_ROM_PAGE_NOT_FOUND); 2294 2294 2295 2295 uint8_t uProt; … … 2306 2306 rc = PGMR3PhysRomProtect(pVM, GCPhys, PAGE_SIZE, enmProt); 2307 2307 AssertLogRelRCReturn(rc, rc); 2308 AssertLogRelReturn(pRomPage->enmProt == enmProt, VERR_ INTERNAL_ERROR);2308 AssertLogRelReturn(pRomPage->enmProt == enmProt, VERR_PGM_SAVED_ROM_PAGE_PROT); 2309 2309 } 2310 2310 … … 2677 2677 } 2678 2678 2679 AssertLogRelMsgReturn(PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_ALLOCATED, ("GCPhys=%RGp %R[pgmpage]\n", GCPhys, pPage), VERR_ INTERNAL_ERROR_5);2679 AssertLogRelMsgReturn(PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_ALLOCATED, ("GCPhys=%RGp %R[pgmpage]\n", GCPhys, pPage), VERR_PGM_UNEXPECTED_PAGE_STATE); 2680 2680 2681 2681 /* If this is a ROM page, we must clear it and not try … … 2717 2717 AssertLogRelMsgReturn( PGM_PAGE_GET_PDE_TYPE(pPage) != PGM_PAGE_PDE_TYPE_PDE 2718 2718 && PGM_PAGE_GET_PDE_TYPE(pPage) != PGM_PAGE_PDE_TYPE_PDE_DISABLED, 2719 ("GCPhys=%RGp %R[pgmpage]\n", GCPhys, pPage), VERR_ INTERNAL_ERROR_5);2719 ("GCPhys=%RGp %R[pgmpage]\n", GCPhys, pPage), VERR_PGM_LOAD_UNEXPECTED_PAGE_TYPE); 2720 2720 2721 2721 rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPage, GCPhys); … … 2741 2741 2742 2742 default: 2743 AssertMsgFailedReturn(("%#x\n", u8), VERR_ INTERNAL_ERROR);2743 AssertMsgFailedReturn(("%#x\n", u8), VERR_PGM_SAVED_REC_TYPE); 2744 2744 } 2745 2745 id = UINT8_MAX; … … 2771 2771 if (pMmio2->idSavedState == id) 2772 2772 break; 2773 AssertLogRelMsgReturn(pMmio2, ("id=%#u iPage=%#x\n", id, iPage), VERR_ INTERNAL_ERROR);2773 AssertLogRelMsgReturn(pMmio2, ("id=%#u iPage=%#x\n", id, iPage), VERR_PGM_SAVED_MMIO2_RANGE_NOT_FOUND); 2774 2774 } 2775 AssertLogRelMsgReturn(iPage < (pMmio2->RamRange.cb >> PAGE_SHIFT), ("iPage=%#x cb=%RGp %s\n", iPage, pMmio2->RamRange.cb, pMmio2->RamRange.pszDesc), VERR_ INTERNAL_ERROR);2775 AssertLogRelMsgReturn(iPage < (pMmio2->RamRange.cb >> PAGE_SHIFT), ("iPage=%#x cb=%RGp %s\n", iPage, pMmio2->RamRange.cb, pMmio2->RamRange.pszDesc), VERR_PGM_SAVED_MMIO2_PAGE_NOT_FOUND); 2776 2776 void *pvDstPage = (uint8_t *)pMmio2->RamRange.pvR3 + ((size_t)iPage << PAGE_SHIFT); 2777 2777 … … 2817 2817 if (pRom->idSavedState == id) 2818 2818 break; 2819 AssertLogRelMsgReturn(pRom, ("id=%#u iPage=%#x\n", id, iPage), VERR_ INTERNAL_ERROR);2819 AssertLogRelMsgReturn(pRom, ("id=%#u iPage=%#x\n", id, iPage), VERR_PGM_SAVED_ROM_RANGE_NOT_FOUND); 2820 2820 } 2821 AssertLogRelMsgReturn(iPage < (pRom->cb >> PAGE_SHIFT), ("iPage=%#x cb=%RGp %s\n", iPage, pRom->cb, pRom->pszDesc), VERR_ INTERNAL_ERROR);2821 AssertLogRelMsgReturn(iPage < (pRom->cb >> PAGE_SHIFT), ("iPage=%#x cb=%RGp %s\n", iPage, pRom->cb, pRom->pszDesc), VERR_PGM_SAVED_ROM_PAGE_NOT_FOUND); 2822 2822 PPGMROMPAGE pRomPage = &pRom->aPages[iPage]; 2823 2823 GCPhys = pRom->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT); … … 2831 2831 return rc; 2832 2832 PGMROMPROT enmProt = (PGMROMPROT)u8Prot; 2833 AssertLogRelMsgReturn(enmProt > PGMROMPROT_INVALID && enmProt < PGMROMPROT_END, ("GCPhys=%RGp enmProt=%d\n", GCPhys, enmProt), VERR_ INTERNAL_ERROR);2833 AssertLogRelMsgReturn(enmProt > PGMROMPROT_INVALID && enmProt < PGMROMPROT_END, ("GCPhys=%RGp enmProt=%d\n", GCPhys, enmProt), VERR_PGM_SAVED_ROM_PAGE_PROT); 2834 2834 2835 2835 if (enmProt != pRomPage->enmProt) … … 2841 2841 rc = PGMR3PhysRomProtect(pVM, GCPhys, PAGE_SIZE, enmProt); 2842 2842 AssertLogRelMsgRCReturn(rc, ("GCPhys=%RGp rc=%Rrc\n", GCPhys, rc), rc); 2843 AssertLogRelReturn(pRomPage->enmProt == enmProt, VERR_ INTERNAL_ERROR);2843 AssertLogRelReturn(pRomPage->enmProt == enmProt, VERR_PGM_SAVED_ROM_PAGE_PROT); 2844 2844 } 2845 2845 if ((u8 & ~PGM_STATE_REC_FLAG_ADDR) == PGM_STATE_REC_ROM_PROT) … … 2871 2871 break; 2872 2872 2873 default: AssertLogRelFailedReturn(VERR_I NTERNAL_ERROR); /* shut up gcc */2873 default: AssertLogRelFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE); /* shut up gcc */ 2874 2874 } 2875 2875 if (!pRealPage) … … 2925 2925 */ 2926 2926 default: 2927 AssertLogRelMsgFailedReturn(("%#x\n", u8), VERR_ INTERNAL_ERROR);2927 AssertLogRelMsgFailedReturn(("%#x\n", u8), VERR_PGM_SAVED_REC_TYPE); 2928 2928 } 2929 2929 } /* forever */ -
trunk/src/VBox/VMM/VMMR3/SELM.cpp
r39078 r39402 1719 1719 { 1720 1720 Log(("SELMR3DebugCheck: ldt is out of bound SelLdt=%#x\n", SelLdt)); 1721 return VERR_ INTERNAL_ERROR;1721 return VERR_SELM_LDT_OUT_OF_BOUNDS; 1722 1722 } 1723 1723 X86DESC LDTDesc; … … 1745 1745 { 1746 1746 Log(("SELmR3DebugCheck: Invalid LDT %04x!\n", SelLdt)); 1747 return VERR_ INTERNAL_ERROR;1747 return VERR_SELM_INVALID_LDT; 1748 1748 } 1749 1749 -
trunk/src/VBox/VMM/VMMR3/SSM.cpp
r39368 r39402 964 964 } 965 965 AssertFailed(); 966 return VERR_ INTERNAL_ERROR_3;966 return VERR_SSM_UNEXPECTED_PASS; 967 967 } 968 968 … … 2769 2769 { 2770 2770 uint64_t offCur = ssmR3StrmTell(pStrm); 2771 AssertReturn(offCur <= offDst, VERR_ INTERNAL_ERROR_4);2771 AssertReturn(offCur <= offDst, VERR_SSM_SKIP_BACKWARDS); 2772 2772 if (offCur == offDst) 2773 2773 return VINF_SUCCESS; … … 3188 3188 } 3189 3189 else 3190 AssertLogRelMsgFailedReturn(("cb=%#x\n", cb), pSSM->rc = VERR_ INTERNAL_ERROR);3190 AssertLogRelMsgFailedReturn(("cb=%#x\n", cb), pSSM->rc = VERR_SSM_MEM_TOO_BIG); 3191 3191 3192 3192 Log3(("ssmR3DataWriteRecHdr: %08llx|%08llx/%08x: Type=%02x fImportant=%RTbool cbHdr=%u\n", … … 4257 4257 break; 4258 4258 default: 4259 rc = VERR_ INTERNAL_ERROR;4259 rc = VERR_SSM_IPE_1; 4260 4260 break; 4261 4261 } … … 4605 4605 break; 4606 4606 default: 4607 rc = VERR_ INTERNAL_ERROR;4607 rc = VERR_SSM_IPE_1; 4608 4608 break; 4609 4609 } … … 4692 4692 break; 4693 4693 default: 4694 rc = VERR_ INTERNAL_ERROR;4694 rc = VERR_SSM_IPE_1; 4695 4695 break; 4696 4696 } … … 5032 5032 break; 5033 5033 default: 5034 rc = VERR_ INTERNAL_ERROR;5034 rc = VERR_SSM_IPE_1; 5035 5035 break; 5036 5036 } … … 5170 5170 break; 5171 5171 default: 5172 rc = VERR_ INTERNAL_ERROR;5172 rc = VERR_SSM_IPE_1; 5173 5173 break; 5174 5174 } … … 5327 5327 break; 5328 5328 default: 5329 rc = VERR_ INTERNAL_ERROR;5329 rc = VERR_SSM_IPE_1; 5330 5330 break; 5331 5331 } … … 5904 5904 break; 5905 5905 default: 5906 return VERR_I NTERNAL_ERROR;5906 return VERR_IPE_NOT_REACHED_DEFAULT_CASE; 5907 5907 } 5908 5908 … … 5952 5952 break; 5953 5953 default: 5954 return VERR_I NTERNAL_ERROR;5954 return VERR_IPE_NOT_REACHED_DEFAULT_CASE; 5955 5955 } 5956 5956 … … 6072 6072 6073 6073 default: 6074 AssertMsgFailedReturn(("%x\n", pSSM->u.Read.u8TypeAndFlags), VERR_ INTERNAL_ERROR_5);6074 AssertMsgFailedReturn(("%x\n", pSSM->u.Read.u8TypeAndFlags), VERR_SSM_BAD_REC_TYPE); 6075 6075 } 6076 6076 … … 6173 6173 6174 6174 default: 6175 AssertMsgFailedReturn(("%x\n", pSSM->u.Read.u8TypeAndFlags), VERR_ INTERNAL_ERROR_5);6175 AssertMsgFailedReturn(("%x\n", pSSM->u.Read.u8TypeAndFlags), VERR_SSM_BAD_REC_TYPE); 6176 6176 } 6177 6177 /*pSSM->u.Read.offDataBuffer = 0;*/ … … 7483 7483 } 7484 7484 else 7485 AssertFailedReturn(VERR_ INTERNAL_ERROR);7485 AssertFailedReturn(VERR_SSM_IPE_2); 7486 7486 if (!pSSM->u.Read.fStreamCrc32) 7487 7487 ssmR3StrmDisableChecksumming(&pSSM->Strm); … … 7581 7581 } 7582 7582 else 7583 AssertFailedReturn(VERR_ INTERNAL_ERROR);7583 AssertFailedReturn(VERR_SSM_IPE_1); 7584 7584 7585 7585 /* … … 7894 7894 break; 7895 7895 default: 7896 rc = VERR_ INTERNAL_ERROR;7896 rc = VERR_SSM_IPE_1; 7897 7897 break; 7898 7898 } … … 8156 8156 break; 8157 8157 default: 8158 rc = VERR_ INTERNAL_ERROR;8158 rc = VERR_SSM_IPE_1; 8159 8159 break; 8160 8160 } … … 8323 8323 break; 8324 8324 default: 8325 rc = VERR_ INTERNAL_ERROR;8325 rc = VERR_SSM_IPE_1; 8326 8326 break; 8327 8327 } … … 8394 8394 break; 8395 8395 default: 8396 rc = VERR_ INTERNAL_ERROR;8396 rc = VERR_SSM_IPE_1; 8397 8397 break; 8398 8398 } … … 9121 9121 { 9122 9122 AssertLogRelMsgFailed(("fCancelled=%RX32 enmOp=%d\n", u32Old, pSSM->enmOp)); 9123 rc = VERR_ INTERNAL_ERROR_2;9123 rc = VERR_SSM_IPE_3; 9124 9124 } 9125 9125 } -
trunk/src/VBox/VMM/VMMR3/TM.cpp
r39078 r39402 224 224 */ 225 225 pVM->tm.s.pvGIPR3 = (void *)g_pSUPGlobalInfoPage; 226 AssertMsgReturn(pVM->tm.s.pvGIPR3, ("GIP support is now required!\n"), VERR_ INTERNAL_ERROR);226 AssertMsgReturn(pVM->tm.s.pvGIPR3, ("GIP support is now required!\n"), VERR_TM_GIP_REQUIRED); 227 227 AssertMsgReturn((g_pSUPGlobalInfoPage->u32Version >> 16) == (SUPGLOBALINFOPAGE_VERSION >> 16), 228 ("Unsupported GIP version!\n"), VERR_ INTERNAL_ERROR);228 ("Unsupported GIP version!\n"), VERR_TM_GIP_VERSION); 229 229 230 230 RTHCPHYS HCPhysGIP; … … 251 251 if ( g_pSUPGlobalInfoPage->u32Magic == SUPGLOBALINFOPAGE_MAGIC 252 252 && g_pSUPGlobalInfoPage->u32UpdateIntervalNS >= 250000000 /* 0.25s */) 253 return VMSetError(pVM, VERR_ INTERNAL_ERROR, RT_SRC_POS,253 return VMSetError(pVM, VERR_TM_GIP_UPDATE_INTERVAL_TOO_BIG, RT_SRC_POS, 254 254 N_("The GIP update interval is too big. u32UpdateIntervalNS=%RU32 (u32UpdateHz=%RU32)"), 255 255 g_pSUPGlobalInfoPage->u32UpdateIntervalNS, g_pSUPGlobalInfoPage->u32UpdateHz); … … 282 282 pVM->tm.s.VirtualGetRawDataRC.pu64Prev = MMHyperR3ToRC(pVM, (void *)&pVM->tm.s.u64VirtualRawPrev); 283 283 pVM->tm.s.VirtualGetRawDataR0.pu64Prev = MMHyperR3ToR0(pVM, (void *)&pVM->tm.s.u64VirtualRawPrev); 284 AssertRe turn(pVM->tm.s.VirtualGetRawDataR0.pu64Prev, VERR_INTERNAL_ERROR);284 AssertRelease(pVM->tm.s.VirtualGetRawDataR0.pu64Prev); 285 285 /* The rest is done in TMR3InitFinalize since it's too early to call PDM. */ 286 286 … … 1994 1994 PPDMCRITSECT pCritSect = pTimer->pCritSect; 1995 1995 if (pCritSect) 1996 PDMCritSectEnter(pCritSect, VERR_I NTERNAL_ERROR);1996 PDMCritSectEnter(pCritSect, VERR_IGNORED); 1997 1997 Log2(("tmR3TimerQueueRun: %p:{.enmState=%s, .enmClock=%d, .enmType=%d, u64Expire=%llx (now=%llx) .pszDesc=%s}\n", 1998 1998 pTimer, tmTimerState(pTimer->enmState), pTimer->enmClock, pTimer->enmType, pTimer->u64Expire, u64Now, pTimer->pszDesc)); … … 2181 2181 PPDMCRITSECT pCritSect = pTimer->pCritSect; 2182 2182 if (pCritSect) 2183 PDMCritSectEnter(pCritSect, VERR_I NTERNAL_ERROR);2183 PDMCritSectEnter(pCritSect, VERR_IGNORED); 2184 2184 2185 2185 Log2(("tmR3TimerQueueRun: %p:{.enmState=%s, .enmClock=%d, .enmType=%d, u64Expire=%llx (now=%llx) .pszDesc=%s}\n", -
trunk/src/VBox/VMM/VMMR3/VM.cpp
r39078 r39402 1218 1218 AssertMsgReturn(enmVMState == VMSTATE_POWERING_ON, 1219 1219 ("%s\n", VMR3GetStateName(enmVMState)), 1220 VERR_ INTERNAL_ERROR_4);1220 VERR_VM_UNEXPECTED_UNSTABLE_STATE); 1221 1221 1222 1222 /* … … 1311 1311 || enmVMState == VMSTATE_SUSPENDING_EXT_LS, 1312 1312 ("%s\n", VMR3GetStateName(enmVMState)), 1313 VERR_ INTERNAL_ERROR_4);1313 VERR_VM_UNEXPECTED_UNSTABLE_STATE); 1314 1314 1315 1315 /* … … 1325 1325 VMSTATE_SUSPENDED_EXT_LS, VMSTATE_SUSPENDING_EXT_LS); 1326 1326 if (RT_FAILURE(rc)) 1327 return VERR_ INTERNAL_ERROR_3;1327 return VERR_VM_UNEXPECTED_UNSTABLE_STATE; 1328 1328 } 1329 1329 … … 1389 1389 AssertMsgReturn(enmVMState == VMSTATE_RESUMING, 1390 1390 ("%s\n", VMR3GetStateName(enmVMState)), 1391 VERR_ INTERNAL_ERROR_4);1391 VERR_VM_UNEXPECTED_UNSTABLE_STATE); 1392 1392 1393 1393 #if 0 … … 1504 1504 default: 1505 1505 AssertMsgFailed(("%s\n", VMR3GetStateName(enmVMState))); 1506 rc = VERR_ INTERNAL_ERROR_3;1506 rc = VERR_VM_UNEXPECTED_VM_STATE; 1507 1507 break; 1508 1508 } … … 1518 1518 AssertMsgReturn(enmVMState == VMSTATE_SUSPENDING_LS, 1519 1519 ("%s\n", VMR3GetStateName(enmVMState)), 1520 VERR_ INTERNAL_ERROR_4);1520 VERR_VM_UNEXPECTED_UNSTABLE_STATE); 1521 1521 1522 1522 /* … … 1529 1529 VMSTATE_SUSPENDED_LS, VMSTATE_SUSPENDING_LS); 1530 1530 if (RT_FAILURE(rc)) 1531 return VERR_ INTERNAL_ERROR_3;1531 return VERR_VM_UNEXPECTED_UNSTABLE_STATE; 1532 1532 1533 1533 *pfSuspended = true; … … 2551 2551 for (PVMREQ pReq = pReqHead; pReq; pReq = pReq->pNext) 2552 2552 { 2553 ASMAtomicUoWriteS32(&pReq->iStatus, VERR_ INTERNAL_ERROR);2553 ASMAtomicUoWriteS32(&pReq->iStatus, VERR_VM_REQUEST_KILLED); 2554 2554 ASMAtomicWriteSize(&pReq->enmState, VMREQSTATE_INVALID); 2555 2555 RTSemEventSignal(pReq->EventSem); … … 2581 2581 for (PVMREQ pReq = pReqHead; pReq; pReq = pReq->pNext) 2582 2582 { 2583 ASMAtomicUoWriteS32(&pReq->iStatus, VERR_ INTERNAL_ERROR);2583 ASMAtomicUoWriteS32(&pReq->iStatus, VERR_VM_REQUEST_KILLED); 2584 2584 ASMAtomicWriteSize(&pReq->enmState, VMREQSTATE_INVALID); 2585 2585 RTSemEventSignal(pReq->EventSem); … … 2797 2797 || enmVMState == VMSTATE_RESETTING_LS, 2798 2798 ("%s\n", VMR3GetStateName(enmVMState)), 2799 VERR_ INTERNAL_ERROR_4);2799 VERR_VM_UNEXPECTED_UNSTABLE_STATE); 2800 2800 2801 2801 /* -
trunk/src/VBox/VMM/VMMR3/VMEmt.cpp
r39078 r39402 307 307 if (pUVCpu->pVM) 308 308 VM_FF_SET(pUVCpu->pVM, VM_FF_CHECK_VM_STATE); 309 return VERR_ INTERNAL_ERROR;309 return VERR_VM_FATAL_WAIT_ERROR; 310 310 } 311 311 -
trunk/src/VBox/VMM/VMMR3/VMM.cpp
r39303 r39402 526 526 LogRel(("R0 init failed, rc=%Rra\n", rc)); 527 527 if (RT_SUCCESS(rc)) 528 rc = VERR_I NTERNAL_ERROR;528 rc = VERR_IPE_UNEXPECTED_INFO_STATUS; 529 529 } 530 530 return rc; … … 602 602 VMMR3FatalDump(pVM, pVCpu, rc); 603 603 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) 604 rc = VERR_I NTERNAL_ERROR;604 rc = VERR_IPE_UNEXPECTED_INFO_STATUS; 605 605 } 606 606 AssertRC(rc); … … 736 736 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc)); 737 737 if (RT_SUCCESS(rc)) 738 rc = VERR_I NTERNAL_ERROR;738 rc = VERR_IPE_UNEXPECTED_INFO_STATUS; 739 739 } 740 740 … … 1972 1972 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc), 1973 1973 ("uOperation=%u rc=%Rrc\n", uOperation, rc), 1974 VERR_I NTERNAL_ERROR);1974 VERR_IPE_UNEXPECTED_INFO_STATUS); 1975 1975 return rc; 1976 1976 } … … 2194 2194 default: 2195 2195 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation)); 2196 return VERR_ INTERNAL_ERROR;2196 return VERR_VMM_UNKNOWN_RING3_CALL; 2197 2197 } 2198 2198 -
trunk/src/VBox/VMM/VMMR3/VMMSwitcher.cpp
r39078 r39402 992 992 /** @todo r=bird: I would suggest that we create a dummy switcher which just does something like: 993 993 * @code 994 * mov eax, VERR_ INTERNAL_ERROR994 * mov eax, VERR_VMM_DUMMY_SWITCHER 995 995 * ret 996 996 * @endcode -
trunk/src/VBox/VMM/VMMR3/VMReq.cpp
r39327 r39402 1186 1186 default: 1187 1187 AssertReleaseMsgFailed(("cArgs=%d\n", pReq->u.Internal.cArgs)); 1188 rcRet = rcReq = VERR_ INTERNAL_ERROR;1188 rcRet = rcReq = VERR_VM_REQUEST_TOO_MANY_ARGS_IPE; 1189 1189 break; 1190 1190 } -
trunk/src/VBox/VMM/VMMRC/IOMRC.cpp
r35346 r39402 87 87 default: 88 88 AssertMsgFailed(("Unknown I/O port access opcode %d.\n", pCpu->pCurInstr->opcode)); 89 return VERR_I NTERNAL_ERROR;89 return VERR_IOM_IOPORT_UNKNOWN_OPCODE; 90 90 } 91 91 } -
trunk/src/VBox/VMM/VMMRC/MMRamRC.cpp
r35346 r39402 143 143 { 144 144 /* Must be a read violation. */ 145 AssertReturn(!(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW), VERR_ INTERNAL_ERROR);145 AssertReturn(!(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW), VERR_MM_BAD_TRAP_TYPE_IPE); 146 146 pRegFrame->eip = (uintptr_t)&MMGCRamRead_Error; 147 147 return VINF_SUCCESS; … … 155 155 { 156 156 /* Must be a write violation. */ 157 AssertReturn(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW, VERR_ INTERNAL_ERROR);157 AssertReturn(TRPMGetErrorCode(VMMGetCpu0(pVM)) & X86_TRAP_PF_RW, VERR_MM_BAD_TRAP_TYPE_IPE); 158 158 pRegFrame->eip = (uintptr_t)&MMGCRamWrite_Error; 159 159 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
r39078 r39402 344 344 */ 345 345 int rc = DBGFRZTrap01Handler(pVM, pVCpu, pRegFrame, uDr6); 346 AssertStmt(rc != VINF_EM_RAW_GUEST_TRAP, rc = VERR_ INTERNAL_ERROR_3);346 AssertStmt(rc != VINF_EM_RAW_GUEST_TRAP, rc = VERR_TRPM_IPE_1); 347 347 348 348 Log6(("TRPMGCHyper01: %Rrc (%04x:%08x %RTreg)\n", rc, pRegFrame->cs, pRegFrame->eip, uDr6)); … … 462 462 */ 463 463 int rc = DBGFRZTrap03Handler(pVM, pVCpu, pRegFrame); 464 AssertStmt(rc != VINF_EM_RAW_GUEST_TRAP, rc = VERR_ INTERNAL_ERROR_3);464 AssertStmt(rc != VINF_EM_RAW_GUEST_TRAP, rc = VERR_TRPM_IPE_2); 465 465 466 466 Log6(("TRPMGCHyper03: %Rrc (%04x:%08x)\n", rc, pRegFrame->cs, pRegFrame->eip)); … … 1317 1317 default: 1318 1318 AssertMsgFailed(("Invalid uUser=%#x\n", uUser)); 1319 return VERR_ INTERNAL_ERROR;1319 return VERR_TRPM_BAD_TRAP_IN_OP; 1320 1320 } 1321 1321 } … … 1379 1379 default: 1380 1380 AssertMsgFailed(("Invalid uUser=%#x\n", uUser)); 1381 return VERR_ INTERNAL_ERROR;1381 return VERR_TRPM_BAD_TRAP_IN_OP; 1382 1382 } 1383 1383 … … 1388 1388 1389 1389 AssertMsgFailed(("Impossible!\n")); 1390 return VERR_ INTERNAL_ERROR;1391 } 1392 1390 return VERR_TRPM_IPE_3; 1391 } 1392 -
trunk/src/VBox/VMM/VMMRZ/PGMRZDynMap.cpp
r39078 r39402 338 338 * Initializes the auto mapping sets for a VM. 339 339 * 340 * @returns VINF_SUCCESS on success, VERR_ INTERNAL_ERRORon failure.340 * @returns VINF_SUCCESS on success, VERR_PGM_DYNMAP_IPE on failure. 341 341 * @param pVM The VM in question. 342 342 */ … … 344 344 { 345 345 VMCPUID idCpu = pVM->cCpus; 346 AssertReturn(idCpu > 0 && idCpu <= VMM_MAX_CPU_COUNT, VERR_ INTERNAL_ERROR);346 AssertReturn(idCpu > 0 && idCpu <= VMM_MAX_CPU_COUNT, VERR_PGM_DYNMAP_IPE); 347 347 while (idCpu-- > 0) 348 348 { … … 400 400 break; 401 401 default: 402 rc = VERR_ INTERNAL_ERROR;402 rc = VERR_PGM_DYNMAP_IPE; 403 403 break; 404 404 } … … 489 489 */ 490 490 PPGMRZDYNMAP pThis = g_pPGMR0DynMap; 491 AssertPtrReturn(pThis, VERR_ INTERNAL_ERROR);491 AssertPtrReturn(pThis, VERR_PGM_DYNMAP_IPE); 492 492 rc = RTSemFastMutexRequest(pThis->hInitLock); 493 493 AssertLogRelRCReturn(rc, rc); … … 819 819 ASMIntEnable(); 820 820 if (i + 1 == pPgLvl->cLevels) 821 AssertReturn(pSeg->cPTs < cMaxPTs, VERR_ INTERNAL_ERROR);821 AssertReturn(pSeg->cPTs < cMaxPTs, VERR_PGM_DYNMAP_IPE); 822 822 else 823 823 { … … 872 872 i, pPgLvl->cLevels, uEntry, pPgLvl->a[i].fAndMask, pPgLvl->a[i].fResMask, uEntry & pPgLvl->a[i].fAndMask, 873 873 pPgLvl->a[i].u.pv, pvPage, iEntry, pThis->fLegacyMode)); 874 return VERR_ INTERNAL_ERROR;874 return VERR_PGM_DYNMAP_IPE; 875 875 } 876 876 /*Log(("#%d: iEntry=%4d uEntry=%#llx pvEntry=%p HCPhys=%RHp \n", i, iEntry, uEntry, pvEntry, pPgLvl->a[i].HCPhys));*/ … … 1007 1007 LogRel(("pgmR0DynMapAddSeg: internal error - page #%u HCPhysPage=%RHp HCPhysPte=%RHp pbPage=%p pvPte=%p\n", 1008 1008 iPage - pSeg->iPage, HCPhysPage, HCPhysPte, pbPage, pThis->paPages[iPage].uPte.pv)); 1009 rc = VERR_ INTERNAL_ERROR;1009 rc = VERR_PGM_DYNMAP_IPE; 1010 1010 break; 1011 1011 } … … 1089 1089 uint32_t cMinPages; 1090 1090 uint32_t cPages = pgmR0DynMapCalcNewSize(pThis, &cMinPages); 1091 AssertReturn(cPages, VERR_ INTERNAL_ERROR);1091 AssertReturn(cPages, VERR_PGM_DYNMAP_IPE); 1092 1092 int rc = pgmR0DynMapAddSeg(pThis, cPages); 1093 1093 if (rc == VERR_NO_MEMORY) … … 1132 1132 uint32_t cMinPages; 1133 1133 uint32_t cPages = pgmR0DynMapCalcNewSize(pThis, &cMinPages); 1134 AssertReturn(cPages, VERR_ INTERNAL_ERROR);1134 AssertReturn(cPages, VERR_PGM_DYNMAP_IPE); 1135 1135 if (pThis->cPages >= cPages) 1136 1136 return VINF_SUCCESS; … … 1578 1578 RTAssertMsg1Weak(#expr, __LINE__, __FILE__, __PRETTY_FUNCTION__); \ 1579 1579 RTAssertMsg2Weak a; \ 1580 return VERR_ INTERNAL_ERROR; \1580 return VERR_PGM_DYNMAP_IPE; \ 1581 1581 } \ 1582 1582 } while (0) … … 2529 2529 { 2530 2530 LogRel(("failed(%d): rc=%Rrc; pv=%p pv2=%p i=%p\n", __LINE__, rc, pv, pv2, i)); 2531 if (RT_SUCCESS(rc)) rc = VERR_ INTERNAL_ERROR;2531 if (RT_SUCCESS(rc)) rc = VERR_PGM_DYNMAP_IPE; 2532 2532 } 2533 2533 else if (pSet->cEntries != 5) 2534 2534 { 2535 2535 LogRel(("failed(%d): cEntries=%d expected %d\n", __LINE__, pSet->cEntries, RT_ELEMENTS(pSet->aEntries) / 2)); 2536 rc = VERR_ INTERNAL_ERROR;2536 rc = VERR_PGM_DYNMAP_IPE; 2537 2537 } 2538 2538 else if ( pSet->aEntries[4].cRefs != UINT16_MAX - 1 … … 2546 2546 LogRel(("[%d]=%d, ", i, pSet->aEntries[i].cRefs)); 2547 2547 LogRel(("\n")); 2548 rc = VERR_ INTERNAL_ERROR;2548 rc = VERR_PGM_DYNMAP_IPE; 2549 2549 } 2550 2550 if (RT_SUCCESS(rc)) … … 2568 2568 { 2569 2569 LogRel(("failed(%d): rc=%Rrc; pv=%p pv2=%p i=%d\n", __LINE__, rc, pv, pv2, i)); 2570 if (RT_SUCCESS(rc)) rc = VERR_ INTERNAL_ERROR;2570 if (RT_SUCCESS(rc)) rc = VERR_PGM_DYNMAP_IPE; 2571 2571 } 2572 2572 else if (pSet->cEntries != RT_ELEMENTS(pSet->aEntries)) 2573 2573 { 2574 2574 LogRel(("failed(%d): cEntries=%d expected %d\n", __LINE__, pSet->cEntries, RT_ELEMENTS(pSet->aEntries))); 2575 rc = VERR_ INTERNAL_ERROR;2575 rc = VERR_PGM_DYNMAP_IPE; 2576 2576 } 2577 2577 LogRel(("Load=%u/%u/%u Set=%u/%u\n", pThis->cLoad, pThis->cMaxLoad, pThis->cPages - pThis->cPages, pSet->cEntries, RT_ELEMENTS(pSet->aEntries))); … … 2611 2611 LogRel(("failed(%d): rc=%Rrc, wanted %d ; pv2=%p Set=%u/%u; i=%d\n", __LINE__, 2612 2612 rc, VERR_PGM_DYNMAP_FULL_SET, pv2, pSet->cEntries, RT_ELEMENTS(pSet->aEntries), i)); 2613 if (RT_SUCCESS(rc)) rc = VERR_ INTERNAL_ERROR;2613 if (RT_SUCCESS(rc)) rc = VERR_PGM_DYNMAP_IPE; 2614 2614 } 2615 2615 } … … 2649 2649 LogRel(("failed(%d): cFailures=%d pu32Real=%p pu32=%p u32Expect=%#x *pu32=%#x\n", __LINE__, 2650 2650 Test.cFailures, pu32Real, Test.pu32, Test.u32Expect, *Test.pu32)); 2651 rc = VERR_ INTERNAL_ERROR;2651 rc = VERR_PGM_DYNMAP_IPE; 2652 2652 } 2653 2653 else -
trunk/src/VBox/VMM/VMMRZ/VMMRZ.cpp
r35346 r39402 80 80 pVCpu->vmm.s.enmCallRing3Operation = enmOperation; 81 81 pVCpu->vmm.s.u64CallRing3Arg = uArg; 82 pVCpu->vmm.s.rcCallRing3 = VERR_ INTERNAL_ERROR;82 pVCpu->vmm.s.rcCallRing3 = VERR_VMM_RING3_CALL_NO_RC; 83 83 #ifdef IN_RC 84 84 pVM->vmm.s.pfnGuestToHostRC(VINF_VMM_CALL_HOST); -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r39127 r39402 75 75 static VBOXSTRICTRC a_Name(PIEMCPU pIemCpu, a_Type0 a_Name0, a_Type1 a_Name1) RT_NO_THROW 76 76 77 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: return VERR_I NTERNAL_ERROR_477 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: return VERR_IPE_NOT_REACHED_DEFAULT_CASE 78 78 79 79 #define IEM_OPCODE_GET_NEXT_U8(a_pu8) do { *(a_pu8) = g_bRandom; CHK_PTYPE(uint8_t *, a_pu8); } while (0)
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