Changeset 40280 in vbox for trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
- Timestamp:
- Feb 28, 2012 7:47:00 PM (13 years ago)
- File:
-
- 1 edited
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- Added
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trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r39078 r40280 213 213 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 214 214 * status code must be passed on to EM. 215 * @retval VINF_IOM_ HC_IOPORT_READ Defer the read to ring-3. (R0/GC only)215 * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only) 216 216 * 217 217 * @param pVM VM handle. … … 228 228 #ifndef IN_RING3 229 229 if (rc2 == VERR_SEM_BUSY) 230 return VINF_IOM_ HC_IOPORT_READ;230 return VINF_IOM_R3_IOPORT_READ; 231 231 #endif 232 232 AssertRC(rc2); … … 271 271 STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); }); 272 272 IOM_UNLOCK(pVM); 273 return VINF_IOM_ HC_IOPORT_READ;273 return VINF_IOM_R3_IOPORT_READ; 274 274 } 275 275 #endif … … 281 281 * Call the device. 282 282 */ 283 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_ HC_IOPORT_READ);283 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_READ); 284 284 if (rcStrict != VINF_SUCCESS) 285 285 { … … 303 303 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In)); 304 304 # ifndef IN_RING3 305 else if (rcStrict == VINF_IOM_ HC_IOPORT_READ && pStats)305 else if (rcStrict == VINF_IOM_R3_IOPORT_READ && pStats) 306 306 STAM_COUNTER_INC(&pStats->InRZToR3); 307 307 # endif … … 337 337 # endif 338 338 IOM_UNLOCK(pVM); 339 return VINF_IOM_ HC_IOPORT_READ;339 return VINF_IOM_R3_IOPORT_READ; 340 340 } 341 341 #endif … … 352 352 /* Ring-3 will have to create the statistics record. */ 353 353 IOM_UNLOCK(pVM); 354 return VINF_IOM_ HC_IOPORT_READ;354 return VINF_IOM_R3_IOPORT_READ; 355 355 # else 356 356 pStats = iomR3IOPortStatsCreate(pVM, Port, NULL); … … 386 386 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 387 387 * status code must be passed on to EM. 388 * @retval VINF_IOM_ HC_IOPORT_READ Defer the read to ring-3. (R0/GC only)388 * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only) 389 389 * 390 390 * @param pVM VM handle. … … 400 400 #ifndef IN_RING3 401 401 if (rc2 == VERR_SEM_BUSY) 402 return VINF_IOM_ HC_IOPORT_READ;402 return VINF_IOM_R3_IOPORT_READ; 403 403 #endif 404 404 AssertRC(rc2); … … 446 446 STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->InRZToR3); }); 447 447 IOM_UNLOCK(pVM); 448 return VINF_IOM_ HC_IOPORT_READ;448 return VINF_IOM_R3_IOPORT_READ; 449 449 } 450 450 #endif … … 456 456 * Call the device. 457 457 */ 458 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_ HC_IOPORT_READ);458 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_READ); 459 459 if (rcStrict != VINF_SUCCESS) 460 460 { … … 478 478 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In)); 479 479 # ifndef IN_RING3 480 else if (rcStrict == VINF_IOM_ HC_IOPORT_READ && pStats)480 else if (rcStrict == VINF_IOM_R3_IOPORT_READ && pStats) 481 481 STAM_COUNTER_INC(&pStats->InRZToR3); 482 482 # endif … … 499 499 # endif 500 500 IOM_UNLOCK(pVM); 501 return VINF_IOM_ HC_IOPORT_READ;501 return VINF_IOM_R3_IOPORT_READ; 502 502 } 503 503 #endif … … 514 514 /* Ring-3 will have to create the statistics record. */ 515 515 IOM_UNLOCK(pVM); 516 return VINF_IOM_ HC_IOPORT_READ;516 return VINF_IOM_R3_IOPORT_READ; 517 517 # else 518 518 pStats = iomR3IOPortStatsCreate(pVM, Port, NULL); … … 538 538 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 539 539 * status code must be passed on to EM. 540 * @retval VINF_IOM_ HC_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)540 * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only) 541 541 * 542 542 * @param pVM VM handle. … … 551 551 #ifndef IN_RING3 552 552 if (rc2 == VERR_SEM_BUSY) 553 return VINF_IOM_ HC_IOPORT_WRITE;553 return VINF_IOM_R3_IOPORT_WRITE; 554 554 #endif 555 555 AssertRC(rc2); … … 596 596 STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); }); 597 597 IOM_UNLOCK(pVM); 598 return VINF_IOM_ HC_IOPORT_WRITE;598 return VINF_IOM_R3_IOPORT_WRITE; 599 599 } 600 600 #endif … … 606 606 * Call the device. 607 607 */ 608 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_ HC_IOPORT_WRITE);608 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_WRITE); 609 609 if (rcStrict != VINF_SUCCESS) 610 610 { … … 628 628 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out)); 629 629 # ifndef IN_RING3 630 else if (rcStrict == VINF_IOM_ HC_IOPORT_WRITE && pStats)630 else if (rcStrict == VINF_IOM_R3_IOPORT_WRITE && pStats) 631 631 STAM_COUNTER_INC(&pStats->OutRZToR3); 632 632 # endif … … 648 648 # endif 649 649 IOM_UNLOCK(pVM); 650 return VINF_IOM_ HC_IOPORT_WRITE;650 return VINF_IOM_R3_IOPORT_WRITE; 651 651 } 652 652 #endif … … 664 664 /* R3 will have to create the statistics record. */ 665 665 IOM_UNLOCK(pVM); 666 return VINF_IOM_ HC_IOPORT_WRITE;666 return VINF_IOM_R3_IOPORT_WRITE; 667 667 # else 668 668 pStats = iomR3IOPortStatsCreate(pVM, Port, NULL); … … 686 686 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 687 687 * status code must be passed on to EM. 688 * @retval VINF_IOM_ HC_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)688 * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only) 689 689 * 690 690 * @param pVM VM handle. … … 700 700 #ifndef IN_RING3 701 701 if (rc2 == VERR_SEM_BUSY) 702 return VINF_IOM_ HC_IOPORT_WRITE;702 return VINF_IOM_R3_IOPORT_WRITE; 703 703 #endif 704 704 AssertRC(rc2); … … 746 746 STAM_STATS({ if (pStats) STAM_COUNTER_INC(&pStats->OutRZToR3); }); 747 747 IOM_UNLOCK(pVM); 748 return VINF_IOM_ HC_IOPORT_WRITE;748 return VINF_IOM_R3_IOPORT_WRITE; 749 749 } 750 750 #endif … … 756 756 * Call the device. 757 757 */ 758 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_ HC_IOPORT_WRITE);758 VBOXSTRICTRC rcStrict = PDMCritSectEnter(pDevIns->CTX_SUFF(pCritSectRo), VINF_IOM_R3_IOPORT_WRITE); 759 759 if (rcStrict != VINF_SUCCESS) 760 760 { … … 778 778 STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out)); 779 779 # ifndef IN_RING3 780 else if (rcStrict == VINF_IOM_ HC_IOPORT_WRITE && pStats)780 else if (rcStrict == VINF_IOM_R3_IOPORT_WRITE && pStats) 781 781 STAM_COUNTER_INC(&pStats->OutRZToR3); 782 782 # endif … … 799 799 # endif 800 800 IOM_UNLOCK(pVM); 801 return VINF_IOM_ HC_IOPORT_WRITE;801 return VINF_IOM_R3_IOPORT_WRITE; 802 802 } 803 803 #endif … … 814 814 /* Ring-3 will have to create the statistics record. */ 815 815 IOM_UNLOCK(pVM); 816 return VINF_IOM_ HC_IOPORT_WRITE;816 return VINF_IOM_R3_IOPORT_WRITE; 817 817 # else 818 818 pStats = iomR3IOPortStatsCreate(pVM, Port, NULL); … … 937 937 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 938 938 * status code must be passed on to EM. 939 * @retval VINF_IOM_ HC_IOPORT_READ Defer the read to ring-3. (R0/GC only)939 * @retval VINF_IOM_R3_IOPORT_READ Defer the read to ring-3. (R0/GC only) 940 940 * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr) 941 941 * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr) … … 980 980 } 981 981 else 982 AssertMsg(rcStrict == VINF_IOM_ HC_IOPORT_READ || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));982 AssertMsg(rcStrict == VINF_IOM_R3_IOPORT_READ || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 983 983 } 984 984 else … … 997 997 * @retval VINF_EM_FIRST-VINF_EM_LAST Success with some exceptions (see IOM_SUCCESS()), the 998 998 * status code must be passed on to EM. 999 * @retval VINF_IOM_ HC_IOPORT_WRITE Defer the write to ring-3. (R0/GC only)999 * @retval VINF_IOM_R3_IOPORT_WRITE Defer the write to ring-3. (R0/GC only) 1000 1000 * @retval VINF_EM_RAW_GUEST_TRAP The exception was left pending. (TRPMRaiseXcptErr) 1001 1001 * @retval VINF_TRPM_XCPT_DISPATCHED The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr) … … 1032 1032 */ 1033 1033 rcStrict = IOMIOPortWrite(pVM, uPort, u64Data, cbSize); 1034 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_ HC_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));1034 AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_R3_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 1035 1035 } 1036 1036 else
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