Changeset 41675 in vbox for trunk/src/VBox/Disassembler

Timestamp:

Jun 12, 2012 8:27:37 PM (12 years ago)

Author:

vboxsync

Message:

DIS: The start of the scoping exercise... Fixed PREFIX_ADDRSIZE that I just busted in the previous commit.

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmCore.cpp (modified) (71 diffs)
• DisasmFormatYasm.cpp (modified) (28 diffs)
• DisasmReg.cpp (modified) (9 diffs)
• DisasmTest.cpp (modified) (2 diffs)
• DisasmTestCore.cpp (modified) (1 diff)
• testcase/tstDisasm-2.cpp (modified) (3 diffs)

trunk/src/VBox/Disassembler/DisasmCore.cpp

@@ -216 +216 @@
  *                          accessed without faulting.  (Consider
  *                          DISInstrWithReader if this isn't the case.)
- * @param   enmCpuMode      The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
+ * @param   enmCpuMode      The CPU mode. DISCPUMODE_32BIT, DISCPUMODE_16BIT, or DISCPUMODE_64BIT.
  * @param   pfnReadBytes    Callback for reading instruction bytes.
  * @param   pvUser          User argument for the instruction reader. (Ends up in apvUserData[0].)
@@ -238 +238 @@
  * @param   uInstrAddr      Address of the instruction to decode. What this means
  *                          is left to the pfnReadBytes function.
- * @param   enmCpuMode      The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
+ * @param   enmCpuMode      The CPU mode. DISCPUMODE_32BIT, DISCPUMODE_16BIT, or DISCPUMODE_64BIT.
  * @param   pfnReadBytes    Callback for reading instruction bytes.
  * @param   pvUser          User argument for the instruction reader. (Ends up in apvUserData[0].)
@@ -259 +259 @@
  * @param   uInstrAddr      Address of the instruction to decode. What this means
  *                          is left to the pfnReadBytes function.
- * @param   enmCpuMode      The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
+ * @param   enmCpuMode      The CPU mode. DISCPUMODE_32BIT, DISCPUMODE_16BIT, or DISCPUMODE_64BIT.
  * @param   pfnReadBytes    Callback for reading instruction bytes.
  * @param   fFilter         Instruction type filter.
@@ -284 +284 @@
 
     pCpu->mode              = enmCpuMode;
-    if (enmCpuMode == CPUMODE_64BIT)
+    if (enmCpuMode == DISCPUMODE_64BIT)
     {
         paOneByteMap        = g_aOneByteMapX64;
-        pCpu->addrmode      = CPUMODE_64BIT;
-        pCpu->opmode        = CPUMODE_32BIT;
+        pCpu->addrmode      = DISCPUMODE_64BIT;
+        pCpu->opmode        = DISCPUMODE_32BIT;
     }
     else
@@ -296 +296 @@
         pCpu->opmode        = enmCpuMode;
     }
-    pCpu->prefix            = PREFIX_NONE;
+    pCpu->prefix            = DISPREFIX_NONE;
     pCpu->enmPrefixSeg      = DIS_SELREG_DS;
     pCpu->uInstrAddr        = uInstrAddr;
@@ -338 +338 @@
                 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */
                 pCpu->lastprefix = opcode;
-                pCpu->prefix &= ~PREFIX_REX;
+                pCpu->prefix &= ~DISPREFIX_REX;
             }
 
@@ -352 +352 @@
                 pCpu->enmPrefixSeg = (DIS_SELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START);
                 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
-                if (   pCpu->mode != CPUMODE_64BIT
+                if (   pCpu->mode != DISCPUMODE_64BIT
                     || pCpu->enmPrefixSeg >= DIS_SELREG_FS)
                 {
-                    pCpu->prefix    |= PREFIX_SEG;
+                    pCpu->prefix    |= DISPREFIX_SEG;
                 }
                 iByte += sizeof(uint8_t);
@@ -362 +362 @@
             // lock prefix byte
             case OP_LOCK:
-                pCpu->prefix |= PREFIX_LOCK;
+                pCpu->prefix |= DISPREFIX_LOCK;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
@@ -368 +368 @@
             // address size override prefix byte
             case OP_ADDRSIZE:
-                pCpu->prefix |= PREFIX_ADDRSIZE;
-                if (pCpu->mode == CPUMODE_16BIT)
-                    pCpu->addrmode = CPUMODE_32BIT;
+                pCpu->prefix |= DISPREFIX_ADDRSIZE;
+                if (pCpu->mode == DISCPUMODE_16BIT)
+                    pCpu->addrmode = DISCPUMODE_32BIT;
                 else
-                if (pCpu->mode == CPUMODE_32BIT)
-                    pCpu->addrmode = CPUMODE_16BIT;
+                if (pCpu->mode == DISCPUMODE_32BIT)
+                    pCpu->addrmode = DISCPUMODE_16BIT;
                 else
-                    pCpu->addrmode = CPUMODE_32BIT;     /* 64 bits */
+                    pCpu->addrmode = DISCPUMODE_32BIT;     /* 64 bits */
 
                 iByte        += sizeof(uint8_t);
@@ -382 +382 @@
             // operand size override prefix byte
             case OP_OPSIZE:
-                pCpu->prefix |= PREFIX_OPSIZE;
-                if (pCpu->mode == CPUMODE_16BIT)
-                    pCpu->opmode = CPUMODE_32BIT;
+                pCpu->prefix |= DISPREFIX_OPSIZE;
+                if (pCpu->mode == DISCPUMODE_16BIT)
+                    pCpu->opmode = DISCPUMODE_32BIT;
                 else
-                    pCpu->opmode = CPUMODE_16BIT;  /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */
+                    pCpu->opmode = DISCPUMODE_16BIT;  /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */
 
                 iByte        += sizeof(uint8_t);
@@ -393 +393 @@
             // rep and repne are not really prefixes, but we'll treat them as such
             case OP_REPE:
-                pCpu->prefix |= PREFIX_REP;
+                pCpu->prefix |= DISPREFIX_REP;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
 
             case OP_REPNE:
-                pCpu->prefix |= PREFIX_REPNE;
+                pCpu->prefix |= DISPREFIX_REPNE;
                 iByte       += sizeof(uint8_t);
                 continue;   //fetch the next byte
 
             case OP_REX:
-                Assert(pCpu->mode == CPUMODE_64BIT);
+                Assert(pCpu->mode == DISCPUMODE_64BIT);
                 /* REX prefix byte */
-                pCpu->prefix    |= PREFIX_REX;
+                pCpu->prefix    |= DISPREFIX_REX;
                 pCpu->prefix_rex = PREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
                 iByte           += sizeof(uint8_t);
 
                 if (pCpu->prefix_rex & PREFIX_REX_FLAGS_W)
-                    pCpu->opmode = CPUMODE_64BIT;  /* overrides size prefix byte */
+                    pCpu->opmode = DISCPUMODE_64BIT;  /* overrides size prefix byte */
                 continue;   //fetch the next byte
             }
@@ -430 +430 @@
         *pcbInstr = iByte;
 
-    if (pCpu->prefix & PREFIX_LOCK)
+    if (pCpu->prefix & DISPREFIX_LOCK)
         disValidateLockSequence(pCpu);
 
@@ -471 +471 @@
 
     /* Correct the operand size if the instruction is marked as forced or default 64 bits */
-    if (pCpu->mode == CPUMODE_64BIT)
+    if (pCpu->mode == DISCPUMODE_64BIT)
     {
         if (pOp->optype & OPTYPE_FORCED_64_OP_SIZE)
-            pCpu->opmode = CPUMODE_64BIT;
+            pCpu->opmode = DISCPUMODE_64BIT;
         else
         if (    (pOp->optype & OPTYPE_DEFAULT_64_OP_SIZE)
-            &&  !(pCpu->prefix & PREFIX_OPSIZE))
-            pCpu->opmode = CPUMODE_64BIT;
+            &&  !(pCpu->prefix & DISPREFIX_OPSIZE))
+            pCpu->opmode = DISCPUMODE_64BIT;
     }
     else
@@ -484 +484 @@
     {
         /* Forced 32 bits operand size for certain instructions (mov crx, mov drx). */
-        Assert(pCpu->mode != CPUMODE_64BIT);
-        pCpu->opmode = CPUMODE_32BIT;
+        Assert(pCpu->mode != DISCPUMODE_64BIT);
+        pCpu->opmode = DISCPUMODE_32BIT;
     }
 
@@ -549 +549 @@
 
     /* Correct the operand size if the instruction is marked as forced or default 64 bits */
-    if (pCpu->mode == CPUMODE_64BIT)
+    if (pCpu->mode == DISCPUMODE_64BIT)
     {
         /* Note: redundant, but just in case this ever changes */
         if (fpop->optype & OPTYPE_FORCED_64_OP_SIZE)
-            pCpu->opmode = CPUMODE_64BIT;
+            pCpu->opmode = DISCPUMODE_64BIT;
         else
         if (    (fpop->optype & OPTYPE_DEFAULT_64_OP_SIZE)
-            &&  !(pCpu->prefix & PREFIX_OPSIZE))
-            pCpu->opmode = CPUMODE_64BIT;
+            &&  !(pCpu->prefix & DISPREFIX_OPSIZE))
+            pCpu->opmode = DISCPUMODE_64BIT;
     }
 
@@ -601 +601 @@
     index = pCpu->SIB.Bits.Index;
 
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         ppszSIBIndexReg = szSIBIndexReg;
@@ -629 +629 @@
     {
         // [scaled index] + disp32
-        if (pCpu->addrmode == CPUMODE_32BIT)
+        if (pCpu->addrmode == DISCPUMODE_32BIT)
         {
             pParam->flags |= USE_DISPLACEMENT32;
@@ -662 +662 @@
     pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
 
-    if (pCpu->prefix & PREFIX_REX)
+    if (pCpu->prefix & DISPREFIX_REX)
     {
         /* REX.B extends the Base field if not scaled index + disp32 */
@@ -695 +695 @@
     pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
 
-    if (pCpu->prefix & PREFIX_REX)
+    if (pCpu->prefix & DISPREFIX_REX)
     {
         /* REX.B extends the Base field. */
@@ -738 +738 @@
 
                 if (    pCpu->pCurInstr->opcode == OP_MOV_CR
-                    &&  pCpu->opmode == CPUMODE_32BIT
-                    &&  (pCpu->prefix & PREFIX_LOCK))
+                    &&  pCpu->opmode == DISCPUMODE_32BIT
+                    &&  (pCpu->prefix & DISPREFIX_LOCK))
                 {
-                    pCpu->prefix &= ~PREFIX_LOCK;
+                    pCpu->prefix &= ~DISPREFIX_LOCK;
                     pParam->base.reg_ctrl = USE_REG_CR8;
                 }
@@ -787 +787 @@
     /* @todo bound */
 
-    if (pCpu->addrmode != CPUMODE_16BIT)
-    {
-        Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
+    if (pCpu->addrmode != DISCPUMODE_16BIT)
+    {
+        Assert(pCpu->addrmode == DISCPUMODE_32BIT || pCpu->addrmode == DISCPUMODE_64BIT);
 
         /*
@@ -805 +805 @@
             {
                 /* 32 bits displacement */
-                if (pCpu->mode != CPUMODE_64BIT)
+                if (pCpu->mode != DISCPUMODE_64BIT)
                 {
                     pParam->flags |= USE_DISPLACEMENT32;
@@ -906 +906 @@
     *pSibInc = 0;
 
-    if (pCpu->addrmode != CPUMODE_16BIT)
-    {
-        Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
+    if (pCpu->addrmode != DISCPUMODE_16BIT)
+    {
+        Assert(pCpu->addrmode == DISCPUMODE_32BIT || pCpu->addrmode == DISCPUMODE_64BIT);
 
         /*
@@ -989 +989 @@
     *pSibInc = 0;
 
-    if (pCpu->addrmode != CPUMODE_16BIT)
-    {
-        Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
+    if (pCpu->addrmode != DISCPUMODE_16BIT)
+    {
+        Assert(pCpu->addrmode == DISCPUMODE_32BIT || pCpu->addrmode == DISCPUMODE_64BIT);
         /*
          * Note: displacements in long mode are 8 or 32 bits and sign-extended to 64 bits
@@ -1080 +1080 @@
         pCpu->ModRM.Bits.Mod = 3;
 
-    if (pCpu->prefix & PREFIX_REX)
-    {
-        Assert(pCpu->mode == CPUMODE_64BIT);
+    if (pCpu->prefix & DISPREFIX_REX)
+    {
+        Assert(pCpu->mode == DISCPUMODE_64BIT);
 
         /* REX.R extends the Reg field. */
@@ -1126 +1126 @@
         pCpu->ModRM.Bits.Mod = 3;
 
-    if (pCpu->prefix & PREFIX_REX)
-    {
-        Assert(pCpu->mode == CPUMODE_64BIT);
+    if (pCpu->prefix & DISPREFIX_REX)
+    {
+        Assert(pCpu->mode == DISCPUMODE_64BIT);
 
         /* REX.R extends the Reg field. */
@@ -1181 +1181 @@
 {
     NOREF(pOp);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
     {
         pParam->parval = (uint32_t)(int8_t)DISReadByte(pCpu, uCodePtr);
@@ -1188 +1188 @@
     }
     else
-    if (pCpu->opmode == CPUMODE_64BIT)
+    if (pCpu->opmode == DISCPUMODE_64BIT)
     {
         pParam->parval = (uint64_t)(int8_t)DISReadByte(pCpu, uCodePtr);
@@ -1265 +1265 @@
 {
     NOREF(pOp);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
     {
         pParam->parval = DISReadDWord(pCpu, uCodePtr);
@@ -1273 +1273 @@
     }
 
-    if (pCpu->opmode == CPUMODE_64BIT)
+    if (pCpu->opmode == DISCPUMODE_64BIT)
     {
         pParam->parval = DISReadQWord(pCpu, uCodePtr);
@@ -1291 +1291 @@
 {
     NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
         return sizeof(uint32_t);
-    if (pCpu->opmode == CPUMODE_64BIT)
+    if (pCpu->opmode == DISCPUMODE_64BIT)
         return sizeof(uint64_t);
     return sizeof(uint16_t);
@@ -1303 +1303 @@
     NOREF(pOp);
     /* Word for 16-bit operand-size or doubleword for 32 or 64-bit operand-size. */
-    if (pCpu->opmode == CPUMODE_16BIT)
+    if (pCpu->opmode == DISCPUMODE_16BIT)
     {
         pParam->parval = DISReadWord(pCpu, uCodePtr);
@@ -1312 +1312 @@
 
     /* 64 bits op mode means *sign* extend to 64 bits. */
-    if (pCpu->opmode == CPUMODE_64BIT)
+    if (pCpu->opmode == DISCPUMODE_64BIT)
     {
         pParam->parval = (uint64_t)(int32_t)DISReadDWord(pCpu, uCodePtr);
@@ -1332 +1332 @@
     NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
     /* Word for 16-bit operand-size or doubleword for 32 or 64-bit operand-size. */
-    if (pCpu->opmode == CPUMODE_16BIT)
+    if (pCpu->opmode == DISCPUMODE_16BIT)
         return sizeof(uint16_t);
     return sizeof(uint32_t);
@@ -1362 +1362 @@
 {
     NOREF(pOp);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
     {
         pParam->parval = DISReadDWord(pCpu, uCodePtr);
@@ -1370 +1370 @@
     }
 
-    if (pCpu->opmode == CPUMODE_64BIT)
+    if (pCpu->opmode == DISCPUMODE_64BIT)
     {
         /* 32 bits relative immediate sign extended to 64 bits. */
@@ -1390 +1390 @@
 {
     NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
-    if (pCpu->opmode == CPUMODE_16BIT)
+    if (pCpu->opmode == DISCPUMODE_16BIT)
         return sizeof(int16_t);
     /* Both 32 & 64 bits mode use 32 bits relative immediates. */
@@ -1399 +1399 @@
 unsigned ParseImmAddr(RTUINTPTR uCodePtr, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
 {
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
@@ -1423 +1423 @@
     }
 
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
@@ -1462 +1462 @@
 {
     NOREF(uCodePtr); NOREF(pOp);
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
@@ -1473 +1473 @@
         }
     }
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
@@ -1495 +1495 @@
 {
     // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size!
-    Assert(pCpu->opmode == CPUMODE_16BIT || pCpu->opmode == CPUMODE_32BIT);
+    Assert(pCpu->opmode == DISCPUMODE_16BIT || pCpu->opmode == DISCPUMODE_32BIT);
     Assert(OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
     {
         // far 16:32 pointer
@@ -1519 +1519 @@
     NOREF(uCodePtr); NOREF(pOp);
     // immediate far pointers - only 16:16 or 16:32
-    Assert(pCpu->opmode == CPUMODE_16BIT || pCpu->opmode == CPUMODE_32BIT);
+    Assert(pCpu->opmode == DISCPUMODE_16BIT || pCpu->opmode == DISCPUMODE_32BIT);
     Assert(OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p);
-    if (pCpu->opmode == CPUMODE_32BIT)
+    if (pCpu->opmode == DISCPUMODE_32BIT)
     {
         // far 16:32 pointer
@@ -1556 +1556 @@
     {
         /* 32-bit EAX..EDI registers. */
-        if (pCpu->opmode == CPUMODE_32BIT)
+        if (pCpu->opmode == DISCPUMODE_32BIT)
         {
             /* Use 32-bit registers. */
@@ -1564 +1564 @@
         }
         else
-        if (pCpu->opmode == CPUMODE_64BIT)
+        if (pCpu->opmode == DISCPUMODE_64BIT)
         {
             /* Use 64-bit registers. */
@@ -1570 +1570 @@
             if (    (pOp->optype & OPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pCpu->prefix & PREFIX_REX)
+                &&  (pCpu->prefix & DISPREFIX_REX)
                 &&  (pCpu->prefix_rex & PREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;
@@ -1610 +1610 @@
         pParam->cb     = 1;
 
-        if (pCpu->opmode == CPUMODE_64BIT)
+        if (pCpu->opmode == DISCPUMODE_64BIT)
         {
             if (    (pOp->optype & OPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->param1             /* ugly assumption that it only applies to the first parameter */
-                &&  (pCpu->prefix & PREFIX_REX)
+                &&  (pCpu->prefix & DISPREFIX_REX)
                 &&  (pCpu->prefix_rex & PREFIX_REX_FLAGS))
                 pParam->base.reg_gen += 8;              /* least significant byte of R8-R15 */
@@ -1640 +1640 @@
 
     pParam->flags |= USE_POINTER_DS_BASED;
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         pParam->base.reg_gen = USE_REG_ESI;
@@ -1646 +1646 @@
     }
     else
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         pParam->base.reg_gen = USE_REG_RSI;
@@ -1665 +1665 @@
 
     pParam->flags |= USE_POINTER_DS_BASED;
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         pParam->base.reg_gen = USE_REG_ESI;
@@ -1671 +1671 @@
     }
     else
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         pParam->base.reg_gen = USE_REG_RSI;
@@ -1690 +1690 @@
 
     pParam->flags |= USE_POINTER_ES_BASED;
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         pParam->base.reg_gen = USE_REG_EDI;
@@ -1696 +1696 @@
     }
     else
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         pParam->base.reg_gen = USE_REG_RDI;
@@ -1715 +1715 @@
 
     pParam->flags |= USE_POINTER_ES_BASED;
-    if (pCpu->addrmode == CPUMODE_32BIT)
+    if (pCpu->addrmode == DISCPUMODE_32BIT)
     {
         pParam->base.reg_gen = USE_REG_EDI;
@@ -1721 +1721 @@
     }
     else
-    if (pCpu->addrmode == CPUMODE_64BIT)
+    if (pCpu->addrmode == DISCPUMODE_64BIT)
     {
         pParam->base.reg_gen = USE_REG_RDI;
@@ -1760 +1760 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~PREFIX_OPSIZE;
+                pCpu->prefix &= ~DISPREFIX_OPSIZE;
                 pCpu->opmode  = pCpu->mode;
             }
@@ -1772 +1772 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~PREFIX_REPNE;
+                pCpu->prefix &= ~DISPREFIX_REPNE;
             }
             break;
@@ -1783 +1783 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~PREFIX_REP;
+                pCpu->prefix &= ~DISPREFIX_REP;
             }
             break;
@@ -1827 +1827 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~PREFIX_OPSIZE;
+                pCpu->prefix &= ~DISPREFIX_OPSIZE;
                 pCpu->opmode  = pCpu->mode;
             }
@@ -1844 +1844 @@
 
                 /* Cancel prefix changes. */
-                pCpu->prefix &= ~PREFIX_REPNE;
+                pCpu->prefix &= ~DISPREFIX_REPNE;
             }
         }
@@ -1878 +1878 @@
 
             /* Cancel prefix changes. */
-            pCpu->prefix &= ~PREFIX_OPSIZE;
+            pCpu->prefix &= ~DISPREFIX_OPSIZE;
             pCpu->opmode  = pCpu->mode;
         }
@@ -1895 +1895 @@
     NOREF(pParam);
 
-    if (pCpu->prefix & PREFIX_REP)
+    if (pCpu->prefix & DISPREFIX_REP)
     {
         pOp = &g_aMapX86_NopPause[1]; /* PAUSE */
-        pCpu->prefix &= ~PREFIX_REP;
+        pCpu->prefix &= ~DISPREFIX_REP;
     }
     else
@@ -2185 +2185 @@
     reg   = MODRM_REG(modrm);
 
-    if (pCpu->prefix & PREFIX_OPSIZE)
+    if (pCpu->prefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2206 +2206 @@
     modrm = DISReadByte(pCpu, uCodePtr);
     reg   = MODRM_REG(modrm);
-    if (pCpu->prefix & PREFIX_OPSIZE)
+    if (pCpu->prefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2228 +2228 @@
     modrm = DISReadByte(pCpu, uCodePtr);
     reg   = MODRM_REG(modrm);
-    if (pCpu->prefix & PREFIX_OPSIZE)
+    if (pCpu->prefix & DISPREFIX_OPSIZE)
         reg += 8;   //2nd table
 
@@ -2306 +2306 @@
     subtype = OP_PARM_VSUBTYPE(pParam->param);
     if (fRegAddr)
-        subtype = (pCpu->addrmode == CPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d;
+        subtype = (pCpu->addrmode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d;
     else
     if (subtype == OP_PARM_v || subtype == OP_PARM_NONE)
@@ -2312 +2312 @@
         switch(pCpu->opmode)
         {
-        case CPUMODE_32BIT:
+        case DISCPUMODE_32BIT:
             subtype = OP_PARM_d;
             break;
-        case CPUMODE_64BIT:
+        case DISCPUMODE_64BIT:
             subtype = OP_PARM_q;
             break;
-        case CPUMODE_16BIT:
+        case DISCPUMODE_16BIT:
             subtype = OP_PARM_w;
             break;
@@ -2330 +2330 @@
     {
     case OP_PARM_b:
-        Assert(idx < (pCpu->prefix & PREFIX_REX) ? 16 : 8);
+        Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8);
 
         /* AH, BH, CH & DH map to DIL, SIL, EBL & SPL when a rex prefix is present. */
         /* Intel® 64 and IA-32 Architectures Software Developer’s Manual: 3.4.1.1 */
-        if (    (pCpu->prefix & PREFIX_REX)
+        if (    (pCpu->prefix & DISPREFIX_REX)
             &&  idx >= USE_REG_AH
             &&  idx <= USE_REG_BH)
@@ -2346 +2346 @@
 
     case OP_PARM_w:
-        Assert(idx < (pCpu->prefix & PREFIX_REX) ? 16 : 8);
+        Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8);
 
         pParam->flags |= USE_REG_GEN16;
@@ -2353 +2353 @@
 
     case OP_PARM_d:
-        Assert(idx < (pCpu->prefix & PREFIX_REX) ? 16 : 8);
+        Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8);
 
         pParam->flags |= USE_REG_GEN32;
@@ -2618 +2618 @@
 void disValidateLockSequence(PDISCPUSTATE pCpu)
 {
-    Assert(pCpu->prefix & PREFIX_LOCK);
+    Assert(pCpu->prefix & DISPREFIX_LOCK);
 
     /*

trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp

@@ -206 +206 @@
     switch (pCpu->addrmode)
     {
-        case CPUMODE_16BIT:
+        case DISCPUMODE_16BIT:
         {
             Assert(pParam->index.reg_gen < RT_ELEMENTS(g_aszYasmRegGen16));
@@ -214 +214 @@
         }
 
-        case CPUMODE_32BIT:
+        case DISCPUMODE_32BIT:
         {
             Assert(pParam->index.reg_gen < RT_ELEMENTS(g_aszYasmRegGen32));
@@ -222 +222 @@
         }
 
-        case CPUMODE_64BIT:
+        case DISCPUMODE_64BIT:
         {
             Assert(pParam->index.reg_gen < RT_ELEMENTS(g_aszYasmRegGen64));
@@ -392 +392 @@
     if (    pOp->opcode == OP_INVALID
         ||  (   pOp->opcode == OP_ILLUD2
-             && (pCpu->prefix & PREFIX_LOCK)))
+             && (pCpu->prefix & DISPREFIX_LOCK)))
     {
 
@@ -401 +401 @@
          * Prefixes
          */
-        if (pCpu->prefix & PREFIX_LOCK)
+        if (pCpu->prefix & DISPREFIX_LOCK)
             PUT_SZ("lock ");
-        if(pCpu->prefix & PREFIX_REP)
+        if(pCpu->prefix & DISPREFIX_REP)
             PUT_SZ("rep ");
-        else if(pCpu->prefix & PREFIX_REPNE)
+        else if(pCpu->prefix & DISPREFIX_REPNE)
             PUT_SZ("repne ");
 
@@ -417 +417 @@
         {
             case OP_JECXZ:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "jcxz %Jb" : pCpu->opmode == CPUMODE_32BIT ? "jecxz %Jb"   : "jrcxz %Jb";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "jcxz %Jb" : pCpu->opmode == DISCPUMODE_32BIT ? "jecxz %Jb"   : "jrcxz %Jb";
                 break;
             case OP_PUSHF:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "pushfw"   : pCpu->opmode == CPUMODE_32BIT ? "pushfd"      : "pushfq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "pushfw"   : pCpu->opmode == DISCPUMODE_32BIT ? "pushfd"      : "pushfq";
                 break;
             case OP_POPF:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "popfw"    : pCpu->opmode == CPUMODE_32BIT ? "popfd"       : "popfq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "popfw"    : pCpu->opmode == DISCPUMODE_32BIT ? "popfd"       : "popfq";
                 break;
             case OP_PUSHA:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "pushaw"   : "pushad";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "pushaw"   : "pushad";
                 break;
             case OP_POPA:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "popaw"    : "popad";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "popaw"    : "popad";
                 break;
             case OP_INSB:
@@ -435 +435 @@
                 break;
             case OP_INSWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "insw"     : pCpu->opmode == CPUMODE_32BIT ? "insd"  : "insq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "insw"     : pCpu->opmode == DISCPUMODE_32BIT ? "insd"  : "insq";
                 break;
             case OP_OUTSB:
@@ -441 +441 @@
                 break;
             case OP_OUTSWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "outsw"    : pCpu->opmode == CPUMODE_32BIT ? "outsd" : "outsq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "outsw"    : pCpu->opmode == DISCPUMODE_32BIT ? "outsd" : "outsq";
                 break;
             case OP_MOVSB:
@@ -447 +447 @@
                 break;
             case OP_MOVSWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "movsw"    : pCpu->opmode == CPUMODE_32BIT ? "movsd" : "movsq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "movsw"    : pCpu->opmode == DISCPUMODE_32BIT ? "movsd" : "movsq";
                 break;
             case OP_CMPSB:
@@ -453 +453 @@
                 break;
             case OP_CMPWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "cmpsw"    : pCpu->opmode == CPUMODE_32BIT ? "cmpsd" : "cmpsq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "cmpsw"    : pCpu->opmode == DISCPUMODE_32BIT ? "cmpsd" : "cmpsq";
                 break;
             case OP_SCASB:
@@ -459 +459 @@
                 break;
             case OP_SCASWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "scasw"    : pCpu->opmode == CPUMODE_32BIT ? "scasd" : "scasq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "scasw"    : pCpu->opmode == DISCPUMODE_32BIT ? "scasd" : "scasq";
                 break;
             case OP_LODSB:
@@ -465 +465 @@
                 break;
             case OP_LODSWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "lodsw"    : pCpu->opmode == CPUMODE_32BIT ? "lodsd" : "lodsq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "lodsw"    : pCpu->opmode == DISCPUMODE_32BIT ? "lodsd" : "lodsq";
                 break;
             case OP_STOSB:
@@ -471 +471 @@
                 break;
             case OP_STOSWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "stosw"    : pCpu->opmode == CPUMODE_32BIT ? "stosd" : "stosq";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "stosw"    : pCpu->opmode == DISCPUMODE_32BIT ? "stosd" : "stosq";
                 break;
             case OP_CBW:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "cbw"      : pCpu->opmode == CPUMODE_32BIT ? "cwde"  : "cdqe";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "cbw"      : pCpu->opmode == DISCPUMODE_32BIT ? "cwde"  : "cdqe";
                 break;
             case OP_CWD:
-                pszFmt = pCpu->opmode == CPUMODE_16BIT ? "cwd"      : pCpu->opmode == CPUMODE_32BIT ? "cdq"   : "cqo";
+                pszFmt = pCpu->opmode == DISCPUMODE_16BIT ? "cwd"      : pCpu->opmode == DISCPUMODE_32BIT ? "cdq"   : "cqo";
                 break;
             case OP_SHL:
@@ -576 +576 @@
                         switch (pCpu->opmode) \
                         { \
-                            case CPUMODE_16BIT: PUT_SZ("word "); break; \
-                            case CPUMODE_32BIT: PUT_SZ("dword "); break; \
-                            case CPUMODE_64BIT: PUT_SZ("qword "); break; \
+                            case DISCPUMODE_16BIT: PUT_SZ("word "); break; \
+                            case DISCPUMODE_32BIT: PUT_SZ("dword "); break; \
+                            case DISCPUMODE_64BIT: PUT_SZ("qword "); break; \
                             default: break; \
                         } \
@@ -604 +604 @@
 #define PUT_SEGMENT_OVERRIDE() \
         do { \
-            if (pCpu->prefix & PREFIX_SEG) \
+            if (pCpu->prefix & DISPREFIX_SEG) \
                 PUT_STR(s_szSegPrefix[pCpu->enmPrefixSeg], 3); \
         } while (0)
@@ -612 +612 @@
          * Segment prefixing for instructions that doesn't do memory access.
          */
-        if (    (pCpu->prefix & PREFIX_SEG)
+        if (    (pCpu->prefix & DISPREFIX_SEG)
             &&  !DIS_IS_EFFECTIVE_ADDR(pCpu->param1.flags)
             &&  !DIS_IS_EFFECTIVE_ADDR(pCpu->param2.flags)
@@ -812 +812 @@
 
                             case USE_IMMEDIATE32:
-                                if (    pCpu->opmode != (pCpu->mode == CPUMODE_16BIT ? CPUMODE_16BIT : CPUMODE_32BIT) /* not perfect */
+                                if (    pCpu->opmode != (pCpu->mode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */
                                     ||  (   (fFlags & DIS_FMT_FLAGS_STRICT)
                                          && (   (int8_t)pParam->parval == (int32_t)pParam->parval
@@ -897 +897 @@
 
                         RTUINTPTR uTrgAddr = pCpu->uInstrAddr + pCpu->opsize + offDisplacement;
-                        if (pCpu->mode == CPUMODE_16BIT)
+                        if (pCpu->mode == DISCPUMODE_16BIT)
                             PUT_NUM_16(uTrgAddr);
-                        else if (pCpu->mode == CPUMODE_32BIT)
+                        else if (pCpu->mode == DISCPUMODE_32BIT)
                             PUT_NUM_32(uTrgAddr);
                         else
@@ -1202 +1202 @@
      * Mod rm + SIB: Check for duplicate EBP encodings that yasm won't use for very good reasons.
      */
-    if (    pCpu->addrmode != CPUMODE_16BIT ///@todo correct?
+    if (    pCpu->addrmode != DISCPUMODE_16BIT ///@todo correct?
         &&  pCpu->ModRM.Bits.Rm == 4
         &&  pCpu->ModRM.Bits.Mod != 3)
@@ -1235 +1235 @@
         {
             case 0xf0:
-                f = PREFIX_LOCK;
+                f = DISPREFIX_LOCK;
                 break;
 
             case 0xf2:
             case 0xf3:
-                f = PREFIX_REP; /* yes, both */
+                f = DISPREFIX_REP; /* yes, both */
                 break;
 
@@ -1249 +1249 @@
             case 0x64:
             case 0x65:
-                f = PREFIX_SEG;
+                f = DISPREFIX_SEG;
                 break;
 
             case 0x66:
-                f = PREFIX_OPSIZE;
+                f = DISPREFIX_OPSIZE;
                 break;
 
             case 0x67:
-                f = PREFIX_ADDRSIZE;
+                f = DISPREFIX_ADDRSIZE;
                 break;
 
             case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
             case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
-                f = pCpu->mode == CPUMODE_64BIT ? PREFIX_REX : 0;
+                f = pCpu->mode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0;
                 break;
 
@@ -1277 +1277 @@
 
     /* segment overrides are fun */
-    if (fPrefixes & PREFIX_SEG)
+    if (fPrefixes & DISPREFIX_SEG)
     {
         /* no effective address which it may apply to. */
-        Assert((pCpu->prefix & PREFIX_SEG) || pCpu->mode == CPUMODE_64BIT);
+        Assert((pCpu->prefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT);
         if (    !DIS_IS_EFFECTIVE_ADDR(pCpu->param1.flags)
             &&  !DIS_IS_EFFECTIVE_ADDR(pCpu->param2.flags)
@@ -1288 +1288 @@
 
     /* fixed register + addr override doesn't go down all that well. */
-    if (fPrefixes & PREFIX_ADDRSIZE)
-    {
-        Assert(pCpu->prefix & PREFIX_ADDRSIZE);
+    if (fPrefixes & DISPREFIX_ADDRSIZE)
+    {
+        Assert(pCpu->prefix & DISPREFIX_ADDRSIZE);
         if (    pCpu->pCurInstr->param3 == OP_PARM_NONE
             &&  pCpu->pCurInstr->param2 == OP_PARM_NONE
@@ -1335 +1335 @@
 
     /* All but the segment prefix is bad news. */
-    if (fPrefixes & ~PREFIX_SEG)
+    if (fPrefixes & ~DISPREFIX_SEG)
     {
         switch (pCpu->pCurInstr->opcode)
@@ -1344 +1344 @@
                     &&  pCpu->pCurInstr->param1 <= OP_PARM_REG_SEG_END)
                     return true;
-                if (    (fPrefixes & ~PREFIX_OPSIZE)
+                if (    (fPrefixes & ~DISPREFIX_OPSIZE)
                     &&  pCpu->pCurInstr->param1 >= OP_PARM_REG_GEN32_START
                     &&  pCpu->pCurInstr->param1 <= OP_PARM_REG_GEN32_END)
@@ -1354 +1354 @@
             case OP_PUSHA:
             case OP_PUSHF:
-                if (fPrefixes & ~PREFIX_OPSIZE)
+                if (fPrefixes & ~DISPREFIX_OPSIZE)
                     return true;
                 break;
@@ -1361 +1361 @@
 
     /* Implicit 8-bit register instructions doesn't mix with operand size. */
-    if (    (fPrefixes & PREFIX_OPSIZE)
+    if (    (fPrefixes & DISPREFIX_OPSIZE)
         &&  (   (   pCpu->pCurInstr->param1 == OP_PARM_Gb /* r8 */
                  && pCpu->pCurInstr->param2 == OP_PARM_Eb /* r8/mem8 */)
@@ -1506 +1506 @@
     if (    pCpu->pCurInstr->opcode == OP_MOVZX
         &&  pCpu->opcode == 0xB7
-        &&  (pCpu->mode == CPUMODE_16BIT) != !!(fPrefixes & PREFIX_OPSIZE))
+        &&  (pCpu->mode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE))
         return true;
 

trunk/src/VBox/Disassembler/DisasmReg.cpp

@@ -210 +210 @@
         switch(pCpu->opmode)
         {
-        case CPUMODE_32BIT:
+        case DISCPUMODE_32BIT:
             subtype = OP_PARM_d;
             break;
-        case CPUMODE_64BIT:
+        case DISCPUMODE_64BIT:
             subtype = OP_PARM_q;
             break;
-        case CPUMODE_16BIT:
+        case DISCPUMODE_16BIT:
             subtype = OP_PARM_w;
             break;
@@ -241 +241 @@
 
     case OP_PARM_p: /* far pointer */
-        if (pCpu->addrmode == CPUMODE_32BIT)
+        if (pCpu->addrmode == DISCPUMODE_32BIT)
             return 6;   /* 16:32 */
         else
-        if (pCpu->addrmode == CPUMODE_64BIT)
+        if (pCpu->addrmode == DISCPUMODE_64BIT)
             return 12;  /* 16:64 */
         else
@@ -260 +260 @@
 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam)
 {
-    if (pCpu->prefix & PREFIX_SEG)
+    if (pCpu->prefix & DISPREFIX_SEG)
     {
         /* Use specified SEG: prefix. */
@@ -285 +285 @@
 DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu)
 {
-    Assert(pCpu->prefix & PREFIX_SEG);
+    Assert(pCpu->prefix & DISPREFIX_SEG);
     switch(pCpu->enmPrefixSeg)
     {
@@ -592 +592 @@
         if (pParam->flags & USE_DISPLACEMENT8)
         {
-            if (pCpu->mode == CPUMODE_32BIT)
+            if (pCpu->mode == DISCPUMODE_32BIT)
                 pParamVal->val.val32 += (int32_t)pParam->uDisp.i8;
             else
-            if (pCpu->mode == CPUMODE_64BIT)
+            if (pCpu->mode == DISCPUMODE_64BIT)
                 pParamVal->val.val64 += (int64_t)pParam->uDisp.i8;
             else
@@ -603 +603 @@
         if (pParam->flags & USE_DISPLACEMENT16)
         {
-            if (pCpu->mode == CPUMODE_32BIT)
+            if (pCpu->mode == DISCPUMODE_32BIT)
                 pParamVal->val.val32 += (int32_t)pParam->uDisp.i16;
             else
-            if (pCpu->mode == CPUMODE_64BIT)
+            if (pCpu->mode == DISCPUMODE_64BIT)
                 pParamVal->val.val64 += (int64_t)pParam->uDisp.i16;
             else
@@ -614 +614 @@
         if (pParam->flags & USE_DISPLACEMENT32)
         {
-            if (pCpu->mode == CPUMODE_32BIT)
+            if (pCpu->mode == DISCPUMODE_32BIT)
                 pParamVal->val.val32 += pParam->uDisp.i32;
             else
@@ -622 +622 @@
         if (pParam->flags & USE_DISPLACEMENT64)
         {
-            Assert(pCpu->mode == CPUMODE_64BIT);
+            Assert(pCpu->mode == DISCPUMODE_64BIT);
             pParamVal->val.val64 += pParam->uDisp.i64;
         }
@@ -628 +628 @@
         if (pParam->flags & USE_RIPDISPLACEMENT32)
         {
-            Assert(pCpu->mode == CPUMODE_64BIT);
+            Assert(pCpu->mode == DISCPUMODE_64BIT);
             /* Relative to the RIP of the next instruction. */
             pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pCpu->opsize;

trunk/src/VBox/Disassembler/DisasmTest.cpp

@@ -50 +50 @@
             char        szOutput[256];
 
-            if (RT_SUCCESS(DISInstrToStr(pbInstr, CPUMODE_32BIT, &cpu, &cb, szOutput, sizeof(szOutput))))
+            if (RT_SUCCESS(DISInstrToStr(pbInstr, DISCPUMODE_32BIT, &cpu, &cb, szOutput, sizeof(szOutput))))
             {
                 printf("%s", szOutput);
@@ -73 +73 @@
             char        szOutput[256];
 
-            if (RT_SUCCESS(DISInstrToStr(pbInstr, CPUMODE_64BIT, &cpu, &cb, szOutput, sizeof(szOutput))))
+            if (RT_SUCCESS(DISInstrToStr(pbInstr, DISCPUMODE_64BIT, &cpu, &cb, szOutput, sizeof(szOutput))))
                 printf("%s", szOutput);
             else

trunk/src/VBox/Disassembler/DisasmTestCore.cpp

@@ -39 +39 @@
         unsigned    cb;
         DISCPUSTATE cpu;
-        if (DISInstr((void *)(uintptr_t)&DISInstr, CPUMODE_32BIT, &cpu, &cb))
+        if (DISInstr((void *)(uintptr_t)&DISInstr, DISCPUMODE_32BIT, &cpu, &cb))
             printf("ok %d\n", cpu.addrmode);
         else

trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp

@@ -303 +303 @@
 
         case kAsmStyle_yasm:
-            RTPrintf("    BITS %d\n", enmCpuMode == CPUMODE_16BIT ? 16 : enmCpuMode == CPUMODE_32BIT ? 32 : 64);
+            RTPrintf("    BITS %d\n", enmCpuMode == DISCPUMODE_16BIT ? 16 : enmCpuMode == DISCPUMODE_32BIT ? 32 : 64);
             pfnFormatter = MyDisasYasmFormatter;
             break;
@@ -492 +492 @@
     UNDEFOPHANDLING enmUndefOp = kUndefOp_Fail;
     bool fListing = true;
-    DISCPUMODE enmCpuMode = CPUMODE_32BIT;
+    DISCPUMODE enmCpuMode = DISCPUMODE_32BIT;
     RTFOFF off = 0;
     RTFOFF cbMax = _1G;
@@ -532 +532 @@
             case 'c':
                 if (ValueUnion.u32 == 16)
-                    enmCpuMode = CPUMODE_16BIT;
+                    enmCpuMode = DISCPUMODE_16BIT;
                 else if (ValueUnion.u32 == 32)
-                    enmCpuMode = CPUMODE_32BIT;
+                    enmCpuMode = DISCPUMODE_32BIT;
                 else if (ValueUnion.u32 == 64)
-                    enmCpuMode = CPUMODE_64BIT;
+                    enmCpuMode = DISCPUMODE_64BIT;
                 else
                 {