VirtualBox

Changeset 41692 in vbox


Ignore:
Timestamp:
Jun 13, 2012 7:32:54 PM (13 years ago)
Author:
vboxsync
Message:

DIS: Reducing the DISCPUMODE even more (200 bytes now) and making it have the same layout in all contexts. This is useful since it's used several places in the VM structure. Also a bunch of other cleanups.

Location:
trunk
Files:
19 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/dis.h

    r41690 r41692  
    2727#define ___VBox_dis_h
    2828
    29 #include <VBox/cdefs.h>
    3029#include <VBox/types.h>
    3130#include <VBox/disopcode.h>
     31#include <iprt/assert.h>
    3232
    3333
     
    390390 * Operand Parameter.
    391391 */
    392 typedef struct OP_PARAMETER
     392typedef struct DISOPPARAM
    393393{
    394394    uint64_t        parval;
     
    410410    union
    411411    {
    412         uint32_t    reg_gen;
     412        uint8_t     reg_gen;
    413413        /** ST(0) - ST(7) */
    414         uint32_t    reg_fp;
     414        uint8_t     reg_fp;
    415415        /** MMX0 - MMX7 */
    416         uint32_t    reg_mmx;
     416        uint8_t     reg_mmx;
    417417        /** XMM0 - XMM7 */
    418         uint32_t    reg_xmm;
    419         /** {ES, CS, SS, DS, FS, GS} */
    420         DIS_SELREG  reg_seg;
     418        uint8_t     reg_xmm;
     419        /** {ES, CS, SS, DS, FS, GS} (DIS_SELREG). */
     420        uint8_t     reg_seg;
    421421        /** TR0-TR7 (?) */
    422         uint32_t    reg_test;
     422        uint8_t     reg_test;
    423423        /** CR0-CR4 */
    424         uint32_t    reg_ctrl;
     424        uint8_t     reg_ctrl;
    425425        /** DR0-DR7 */
    426         uint32_t    reg_dbg;
     426        uint8_t     reg_dbg;
    427427    } base;
    428428    union
    429429    {
    430         uint32_t    reg_gen;
     430        uint8_t     reg_gen;
    431431    } index;
    432432
     
    435435    /** Parameter size. */
    436436    uint8_t         cb;
    437 } OP_PARAMETER;
     437} DISOPPARAM;
     438AssertCompileSize(DISOPPARAM, 32);
    438439/** Pointer to opcode parameter. */
    439 typedef OP_PARAMETER *POP_PARAMETER;
     440typedef DISOPPARAM *PDISOPPARAM;
    440441/** Pointer to opcode parameter. */
    441 typedef const OP_PARAMETER *PCOP_PARAMETER;
     442typedef const DISOPPARAM *PCOP_PARAMETER;
    442443
    443444
     
    462463/** Parser callback.
    463464 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
    464 typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
     465typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu);
    465466typedef FNDISPARSE *PFNDISPARSE;
     467typedef PFNDISPARSE const *PCPFNDISPARSE;
    466468
    467469typedef struct DISCPUSTATE
    468470{
    469     /** Global setting. */
    470     DISCPUMODE      mode;
    471 
    472     /** Per instruction prefix settings. */
    473     uint32_t        prefix;  /**< @todo change to uint8_t */
    474     /** segment prefix value. */
    475     DIS_SELREG      enmPrefixSeg;
    476     /** rex prefix value (64 bits only */
    477     uint32_t        prefix_rex; /**< @todo change to uint8_t */
    478     /** addressing mode (16 or 32 bits). (CPUMODE_*) */
    479     DISCPUMODE      addrmode;
    480     /** operand mode (16 or 32 bits). (CPUMODE_*) */
    481     DISCPUMODE      opmode;
    482 
    483     OP_PARAMETER    param1;
    484     OP_PARAMETER    param2;
    485     OP_PARAMETER    param3;
    486 
    487     /** ModRM fields. */
     471    /* Because of apvUserData[1] and apvUserData[2], put the less frequently
     472       used bits at the top for now.  (Might be better off in the middle?) */
     473    DISOPPARAM      param3;
     474    DISOPPARAM      param2;
     475    DISOPPARAM      param1;
     476
     477    /* off: 0x060 (96) */
     478    /** ModRM fields. */               
    488479    union
    489480    {
     
    498489        unsigned            u;
    499490    } ModRM;
    500 
    501491    /** SIB fields. */
    502492    union
     
    512502        unsigned            u;
    513503    } SIB;
    514     int32_t         i32SibDisp;
    515 
     504    int32_t         i32SibDisp;         
     505
     506    /* off: 0x06c (108) */
     507    /** The CPU mode (DISCPUMODE). */
     508    uint8_t         mode;               
     509    /** The addressing mode (DISCPUMODE). */
     510    uint8_t         addrmode;
     511    /** The operand mode (DISCPUMODE). */
     512    uint8_t         opmode;
     513    /** Per instruction prefix settings. */
     514    uint8_t         prefix; 
     515    /* off: 0x070 (112) */
     516    /** REX prefix value (64 bits only). */
     517    uint8_t         prefix_rex;         
     518    /** Segment prefix value (DIS_SELREG). */
     519    uint8_t         idxSegPrefix;
     520    /** Last prefix byte (for SSE2 extension tables). */
     521    uint8_t         lastprefix;
     522    /** First opcode byte of instruction. */
     523    uint8_t         opcode;
     524    /* off: 0x074 (116) */
     525    /** The size of the prefix bytes. */
     526    uint8_t         cbPrefix;           
    516527    /** The instruction size. */
    517     uint32_t        opsize;
     528    uint8_t         opsize;
     529    uint8_t         abUnused[2];
     530    /* off: 0x078 (120) */
     531    /** Return code set by a worker function like the opcode bytes readers. */
     532    int32_t         rc;
     533    /** Internal: instruction filter */
     534    uint32_t        fFilter;
     535    /* off: 0x080 (128) */
     536    /** Internal: pointer to disassembly function table */
     537    PCPFNDISPARSE   pfnDisasmFnTable;
     538#if ARCH_BITS == 32
     539    uint32_t        uPtrPadding1;
     540#endif
     541    /** Pointer to the current instruction. */
     542    PCDISOPCODE     pCurInstr;
     543#if ARCH_BITS == 32
     544    uint32_t        uPtrPadding2;
     545#endif
     546    /* off: 0x090 (144) */
    518547    /** The address of the instruction. */
    519548    RTUINTPTR       uInstrAddr;
    520     /** The size of the prefix bytes. */
    521     uint8_t         cbPrefix;
    522 
    523     /** First opcode byte of instruction. */
    524     uint8_t         opcode;
    525     /** Last prefix byte (for SSE2 extension tables). */
    526     uint8_t         lastprefix;
     549    /* off: 0x098 (152) */
     550    /** Optional read function */
     551    PFNDISREADBYTES pfnReadBytes;
     552#if ARCH_BITS == 32
     553    uint32_t        uPadding3;
     554#endif
     555    /* off: 0x0a0 (160) */
    527556    /** The instruction bytes. */
    528557    uint8_t         abInstr[16];
    529 
    530     /** Internal: pointer to disassembly function table */
    531     PFNDISPARSE    *pfnDisasmFnTable;
    532     /** Internal: instruction filter */
    533     uint32_t        fFilter;
    534     /** Return code set by a worker function like the opcode bytes readers. */
    535     int32_t         rc;
    536 
    537     /** Pointer to the current instruction. */
    538     PCDISOPCODE     pCurInstr;
    539 #ifndef DIS_CORE_ONLY
    540     /** Opcode format string for current instruction. */
    541     const char      *pszOpcode;
    542 #endif
    543 
    544     /** Optional read function */
    545     PFNDISREADBYTES pfnReadBytes;
     558    /* off: 0x0b0 (176) */
    546559    /** User data slots for the read callback.  The first entry is used for the
    547560     *  pvUser argument, the rest are up for grabs.
    548561     * @remarks This must come last so that we can memset everything before this. */
    549562    void           *apvUserData[3];
     563#if ARCH_BITS == 32
     564    uint32_t        auPadding4[3];
     565#endif
    550566} DISCPUSTATE;
    551567
     
    568584    uint16_t    param2;
    569585    uint16_t    param3;
    570 
    571586    uint32_t    optype;
    572587} DISOPCODE;
     
    589604                       PDISCPUSTATE pCpu, uint32_t *pcbInstr);
    590605
    591 DISDECL(int)        DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
    592 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
     606DISDECL(int)        DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam);
     607DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam);
    593608DISDECL(uint8_t)    DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
    594609
    595 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
    596 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize);
     610DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
     611DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, void **ppReg, size_t *pcbSize);
    597612
    598613DISDECL(int) DISFetchReg8(PCCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
  • trunk/src/VBox/Disassembler/DisasmCore.cpp

    r41690 r41692  
    3737static unsigned disParseInstruction(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISCPUSTATE pCpu);
    3838
    39 static unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
    40 static unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
    41 static void     UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
    42 static unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
    43 
    44 static void     disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam, int fRegAddr);
    45 static void     disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam);
    46 static void     disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam);
     39static unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
     40static unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
     41static void     UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu);
     42static unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu);
     43
     44static void     disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr);
     45static void     disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam);
     46static void     disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam);
    4747
    4848static void     disValidateLockSequence(PDISCPUSTATE pCpu);
     
    123123*******************************************************************************/
    124124/** Parser opcode table for full disassembly. */
    125 static PFNDISPARSE g_apfnFullDisasm[IDX_ParseMax] =
     125static PFNDISPARSE const g_apfnFullDisasm[IDX_ParseMax] =
    126126{
    127127    ParseIllegal,
     
    169169
    170170/** Parser opcode table for only calculating instruction size. */
    171 static PFNDISPARSE g_apfnCalcSize[IDX_ParseMax] =
     171static PFNDISPARSE const g_apfnCalcSize[IDX_ParseMax] =
    172172{
    173173    ParseIllegal,
     
    306306    }
    307307    pCpu->prefix            = DISPREFIX_NONE;
    308     pCpu->enmPrefixSeg      = DIS_SELREG_DS;
     308    pCpu->idxSegPrefix      = DIS_SELREG_DS;
    309309    pCpu->uInstrAddr        = uInstrAddr;
    310310    pCpu->pfnDisasmFnTable  = g_apfnFullDisasm;
     
    359359            // segment override prefix byte
    360360            case OP_SEG:
    361                 pCpu->enmPrefixSeg = (DIS_SELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START);
     361                pCpu->idxSegPrefix = (DIS_SELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START);
    362362                /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
    363363                if (   pCpu->mode != DISCPUMODE_64BIT
    364                     || pCpu->enmPrefixSeg >= DIS_SELREG_FS)
     364                    || pCpu->idxSegPrefix >= DIS_SELREG_FS)
    365365                {
    366366                    pCpu->prefix    |= DISPREFIX_SEG;
     
    454454
    455455    // Store the opcode format string for disasmPrintf
    456 #ifndef DIS_CORE_ONLY
    457     pCpu->pszOpcode = pOp->pszOpcode;
    458 #endif
    459456    pCpu->pCurInstr = pOp;
    460457
     
    521518/* Floating point opcode parsing */
    522519//*****************************************************************************
    523 unsigned ParseEscFP(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     520unsigned ParseEscFP(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    524521{
    525522    int index;
     
    579576        size += pCpu->pfnDisasmFnTable[fpop->idxParse2](uCodePtr+size, (PCDISOPCODE)fpop, pParam, pCpu);
    580577
    581     // Store the opcode format string for disasmPrintf
    582 #ifndef DIS_CORE_ONLY
    583     pCpu->pszOpcode = fpop->pszOpcode;
    584 #endif
    585 
    586578    return size;
    587579}
     
    599591#endif
    600592//*****************************************************************************
    601 void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     593void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    602594{
    603595    unsigned scale, base, index, regtype;
     
    658650//*****************************************************************************
    659651//*****************************************************************************
    660 unsigned ParseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     652unsigned ParseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    661653{
    662654    unsigned size = sizeof(uint8_t);
     
    691683//*****************************************************************************
    692684//*****************************************************************************
    693 unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     685unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    694686{
    695687    unsigned size = sizeof(uint8_t);
     
    725717// Mod    Reg/Opcode  R/M
    726718//*****************************************************************************
    727 unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     719unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    728720{
    729721    int      vtype = OP_PARM_VTYPE(pParam->param);
     
    902894// Query the size of the ModRM parameters and fetch the immediate data (if any)
    903895//*****************************************************************************
    904 unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
     896unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
    905897{
    906898    unsigned sibinc;
     
    985977// Query the size of the ModRM parameters and fetch the immediate data (if any)
    986978//*****************************************************************************
    987 unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
     979unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
    988980{
    989981    unsigned sibinc;
     
    10601052//*****************************************************************************
    10611053//*****************************************************************************
    1062 unsigned ParseIllegal(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1054unsigned ParseIllegal(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    10631055{
    10641056    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    10681060//*****************************************************************************
    10691061//*****************************************************************************
    1070 unsigned ParseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1062unsigned ParseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    10711063{
    10721064    unsigned size = sizeof(uint8_t);   //ModRM byte
     
    11141106//*****************************************************************************
    11151107//*****************************************************************************
    1116 unsigned ParseModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1108unsigned ParseModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    11171109{
    11181110    unsigned size = sizeof(uint8_t);   //ModRM byte
     
    11611153//*****************************************************************************
    11621154//*****************************************************************************
    1163 unsigned ParseModFence(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1155unsigned ParseModFence(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    11641156{
    11651157    ////AssertMsgFailed(("??\n"));
     
    11701162//*****************************************************************************
    11711163//*****************************************************************************
    1172 unsigned ParseImmByte(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1164unsigned ParseImmByte(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    11731165{
    11741166    NOREF(pOp);
     
    11801172//*****************************************************************************
    11811173//*****************************************************************************
    1182 unsigned ParseImmByte_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1174unsigned ParseImmByte_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    11831175{
    11841176    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    11871179//*****************************************************************************
    11881180//*****************************************************************************
    1189 unsigned ParseImmByteSX(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1181unsigned ParseImmByteSX(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    11901182{
    11911183    NOREF(pOp);
     
    12131205//*****************************************************************************
    12141206//*****************************************************************************
    1215 unsigned ParseImmByteSX_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1207unsigned ParseImmByteSX_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12161208{
    12171209    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    12201212//*****************************************************************************
    12211213//*****************************************************************************
    1222 unsigned ParseImmUshort(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1214unsigned ParseImmUshort(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12231215{
    12241216    NOREF(pOp);
     
    12301222//*****************************************************************************
    12311223//*****************************************************************************
    1232 unsigned ParseImmUshort_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1224unsigned ParseImmUshort_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12331225{
    12341226    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    12371229//*****************************************************************************
    12381230//*****************************************************************************
    1239 unsigned ParseImmUlong(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1231unsigned ParseImmUlong(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12401232{
    12411233    NOREF(pOp);
     
    12471239//*****************************************************************************
    12481240//*****************************************************************************
    1249 unsigned ParseImmUlong_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1241unsigned ParseImmUlong_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12501242{
    12511243    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    12541246//*****************************************************************************
    12551247//*****************************************************************************
    1256 unsigned ParseImmQword(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1248unsigned ParseImmQword(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12571249{
    12581250    NOREF(pOp);
     
    12641256//*****************************************************************************
    12651257//*****************************************************************************
    1266 unsigned ParseImmQword_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1258unsigned ParseImmQword_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12671259{
    12681260    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    12711263//*****************************************************************************
    12721264//*****************************************************************************
    1273 unsigned ParseImmV(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1265unsigned ParseImmV(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    12741266{
    12751267    NOREF(pOp);
     
    12971289//*****************************************************************************
    12981290//*****************************************************************************
    1299 unsigned ParseImmV_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1291unsigned ParseImmV_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13001292{
    13011293    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
     
    13081300//*****************************************************************************
    13091301//*****************************************************************************
    1310 unsigned ParseImmZ(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1302unsigned ParseImmZ(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13111303{
    13121304    NOREF(pOp);
     
    13371329//*****************************************************************************
    13381330//*****************************************************************************
    1339 unsigned ParseImmZ_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1331unsigned ParseImmZ_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13401332{
    13411333    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
     
    13491341// Relative displacement for branches (rel. to next instruction)
    13501342//*****************************************************************************
    1351 unsigned ParseImmBRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1343unsigned ParseImmBRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13521344{
    13531345    NOREF(pOp);
     
    13601352// Relative displacement for branches (rel. to next instruction)
    13611353//*****************************************************************************
    1362 unsigned ParseImmBRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1354unsigned ParseImmBRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13631355{
    13641356    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu);
     
    13681360// Relative displacement for branches (rel. to next instruction)
    13691361//*****************************************************************************
    1370 unsigned ParseImmVRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1362unsigned ParseImmVRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13711363{
    13721364    NOREF(pOp);
     
    13961388// Relative displacement for branches (rel. to next instruction)
    13971389//*****************************************************************************
    1398 unsigned ParseImmVRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1390unsigned ParseImmVRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    13991391{
    14001392    NOREF(uCodePtr); NOREF(pOp); NOREF(pParam);
     
    14061398//*****************************************************************************
    14071399//*****************************************************************************
    1408 unsigned ParseImmAddr(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1400unsigned ParseImmAddr(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    14091401{
    14101402    if (pCpu->addrmode == DISCPUMODE_32BIT)
     
    14681460//*****************************************************************************
    14691461//*****************************************************************************
    1470 unsigned ParseImmAddr_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1462unsigned ParseImmAddr_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    14711463{
    14721464    NOREF(uCodePtr); NOREF(pOp);
     
    15011493//*****************************************************************************
    15021494//*****************************************************************************
    1503 unsigned ParseImmAddrF(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1495unsigned ParseImmAddrF(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    15041496{
    15051497    // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size!
     
    15241516//*****************************************************************************
    15251517//*****************************************************************************
    1526 unsigned ParseImmAddrF_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1518unsigned ParseImmAddrF_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    15271519{
    15281520    NOREF(uCodePtr); NOREF(pOp);
     
    15431535//*****************************************************************************
    15441536//*****************************************************************************
    1545 unsigned ParseFixedReg(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1537unsigned ParseFixedReg(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    15461538{
    15471539    NOREF(uCodePtr);
     
    16441636//*****************************************************************************
    16451637//*****************************************************************************
    1646 unsigned ParseXv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1638unsigned ParseXv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    16471639{
    16481640    NOREF(uCodePtr);
     
    16691661//*****************************************************************************
    16701662//*****************************************************************************
    1671 unsigned ParseXb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1663unsigned ParseXb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    16721664{
    16731665    NOREF(uCodePtr); NOREF(pOp);
     
    16941686//*****************************************************************************
    16951687//*****************************************************************************
    1696 unsigned ParseYv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1688unsigned ParseYv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    16971689{
    16981690    NOREF(uCodePtr);
     
    17191711//*****************************************************************************
    17201712//*****************************************************************************
    1721 unsigned ParseYb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1713unsigned ParseYb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    17221714{
    17231715    NOREF(uCodePtr); NOREF(pOp);
     
    17441736//*****************************************************************************
    17451737//*****************************************************************************
    1746 unsigned ParseTwoByteEsc(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1738unsigned ParseTwoByteEsc(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    17471739{
    17481740    PCDISOPCODE   pOpcode;
     
    18031795//*****************************************************************************
    18041796//*****************************************************************************
    1805 unsigned ParseThreeByteEsc4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1797unsigned ParseThreeByteEsc4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    18061798{
    18071799    PCDISOPCODE   pOpcode;
     
    18641856//*****************************************************************************
    18651857//*****************************************************************************
    1866 unsigned ParseThreeByteEsc5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1858unsigned ParseThreeByteEsc5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    18671859{
    18681860    PCDISOPCODE   pOpcode;
     
    18991891//*****************************************************************************
    19001892//*****************************************************************************
    1901 unsigned ParseNopPause(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1893unsigned ParseNopPause(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    19021894{
    19031895    unsigned size = 0;
     
    19171909//*****************************************************************************
    19181910//*****************************************************************************
    1919 unsigned ParseImmGrpl(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1911unsigned ParseImmGrpl(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    19201912{
    19211913    int idx = (pCpu->opcode - 0x80) * 8;
     
    19371929//*****************************************************************************
    19381930//*****************************************************************************
    1939 unsigned ParseShiftGrp2(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1931unsigned ParseShiftGrp2(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    19401932{
    19411933    int idx;
     
    19771969//*****************************************************************************
    19781970//*****************************************************************************
    1979 unsigned ParseGrp3(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1971unsigned ParseGrp3(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    19801972{
    19811973    int idx = (pCpu->opcode - 0xF6) * 8;
     
    19981990//*****************************************************************************
    19991991//*****************************************************************************
    2000 unsigned ParseGrp4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     1992unsigned ParseGrp4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    20011993{
    20021994    unsigned size = 0, modrm, reg;
     
    20182010//*****************************************************************************
    20192011//*****************************************************************************
    2020 unsigned ParseGrp5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2012unsigned ParseGrp5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    20212013{
    20222014    unsigned size = 0, modrm, reg;
     
    20422034//
    20432035//*****************************************************************************
    2044 unsigned Parse3DNow(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2036unsigned Parse3DNow(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    20452037{
    20462038    unsigned size = 0, modrmsize;
     
    20782070//*****************************************************************************
    20792071//*****************************************************************************
    2080 unsigned ParseGrp6(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2072unsigned ParseGrp6(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    20812073{
    20822074    unsigned size = 0, modrm, reg;
     
    20982090//*****************************************************************************
    20992091//*****************************************************************************
    2100 unsigned ParseGrp7(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2092unsigned ParseGrp7(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    21012093{
    21022094    unsigned size = 0, modrm, reg, rm, mod;
     
    21262118//*****************************************************************************
    21272119//*****************************************************************************
    2128 unsigned ParseGrp8(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2120unsigned ParseGrp8(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    21292121{
    21302122    unsigned size = 0, modrm, reg;
     
    21462138//*****************************************************************************
    21472139//*****************************************************************************
    2148 unsigned ParseGrp9(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2140unsigned ParseGrp9(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    21492141{
    21502142    unsigned size = 0, modrm, reg;
     
    21662158//*****************************************************************************
    21672159//*****************************************************************************
    2168 unsigned ParseGrp10(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2160unsigned ParseGrp10(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    21692161{
    21702162    unsigned size = 0, modrm, reg;
     
    21862178//*****************************************************************************
    21872179//*****************************************************************************
    2188 unsigned ParseGrp12(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2180unsigned ParseGrp12(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    21892181{
    21902182    unsigned size = 0, modrm, reg;
     
    22082200//*****************************************************************************
    22092201//*****************************************************************************
    2210 unsigned ParseGrp13(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2202unsigned ParseGrp13(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    22112203{
    22122204    unsigned size = 0, modrm, reg;
     
    22302222//*****************************************************************************
    22312223//*****************************************************************************
    2232 unsigned ParseGrp14(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2224unsigned ParseGrp14(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    22332225{
    22342226    unsigned size = 0, modrm, reg;
     
    22522244//*****************************************************************************
    22532245//*****************************************************************************
    2254 unsigned ParseGrp15(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2246unsigned ParseGrp15(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    22552247{
    22562248    unsigned size = 0, modrm, reg, mod, rm;
     
    22762268//*****************************************************************************
    22772269//*****************************************************************************
    2278 unsigned ParseGrp16(RTUINTPTR uCodePtr, PCDISOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
     2270unsigned ParseGrp16(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu)
    22792271{
    22802272    unsigned size = 0, modrm, reg;
     
    23052297static const int   IndexModRMReg16[4] = { USE_REG_SI, USE_REG_DI, USE_REG_SI, USE_REG_DI};
    23062298//*****************************************************************************
    2307 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam, int fRegAddr)
     2299static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr)
    23082300{
    23092301    int subtype, type, mod;
     
    23812373//*****************************************************************************
    23822374//*****************************************************************************
    2383 static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam)
     2375static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam)
    23842376{
    23852377    NOREF(pCpu); NOREF(pOp);
     
    23942386//*****************************************************************************
    23952387//*****************************************************************************
    2396 static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, POP_PARAMETER pParam)
     2388static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam)
    23972389{
    23982390    NOREF(pOp);
  • trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp

    r41690 r41692  
    172172        case DISUSE_REG_SEG:
    173173        {
    174             Assert(pParam->base.reg_seg < (DIS_SELREG)RT_ELEMENTS(g_aszYasmRegCRx));
     174            Assert(pParam->base.reg_seg < RT_ELEMENTS(g_aszYasmRegCRx));
    175175            const char *psz = g_aszYasmRegSeg[pParam->base.reg_seg];
    176176            *pcchReg = 2;
     
    605605        do { \
    606606            if (pCpu->prefix & DISPREFIX_SEG) \
    607                 PUT_STR(s_szSegPrefix[pCpu->enmPrefixSeg], 3); \
     607                PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 3); \
    608608        } while (0)
    609609
     
    617617            &&  !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse))
    618618        {
    619             PUT_STR(s_szSegPrefix[pCpu->enmPrefixSeg], 2);
     619            PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 2);
    620620            PUT_C(' ');
    621621        }
  • trunk/src/VBox/Disassembler/DisasmReg.cpp

    r41690 r41692  
    201201//*****************************************************************************
    202202//*****************************************************************************
    203 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam)
     203DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam)
    204204{
    205205    int subtype = OP_PARM_VSUBTYPE(pParam->param);
     
    257257//*****************************************************************************
    258258//*****************************************************************************
    259 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam)
     259DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam)
    260260{
    261261    if (pCpu->prefix & DISPREFIX_SEG)
     262        /* Use specified SEG: prefix. */
     263        return (DIS_SELREG)pCpu->idxSegPrefix;
     264
     265    /* Guess segment register by parameter type. */
     266    if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16))
    262267    {
    263         /* Use specified SEG: prefix. */
    264         return pCpu->enmPrefixSeg;
     268        AssertCompile(USE_REG_ESP == USE_REG_RSP);
     269        AssertCompile(USE_REG_EBP == USE_REG_RBP);
     270        AssertCompile(USE_REG_ESP == USE_REG_SP);
     271        AssertCompile(USE_REG_EBP == USE_REG_BP);
     272        if (pParam->base.reg_gen == USE_REG_ESP || pParam->base.reg_gen == USE_REG_EBP)
     273            return DIS_SELREG_SS;
    265274    }
    266     else
    267     {
    268         /* Guess segment register by parameter type. */
    269         if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16))
    270         {
    271             AssertCompile(USE_REG_ESP == USE_REG_RSP);
    272             AssertCompile(USE_REG_EBP == USE_REG_RBP);
    273             AssertCompile(USE_REG_ESP == USE_REG_SP);
    274             AssertCompile(USE_REG_EBP == USE_REG_BP);
    275             if (pParam->base.reg_gen == USE_REG_ESP || pParam->base.reg_gen == USE_REG_EBP)
    276                 return DIS_SELREG_SS;
    277         }
    278         /* Default is use DS: for data access. */
    279         return DIS_SELREG_DS;
    280     }
     275    /* Default is use DS: for data access. */
     276    return DIS_SELREG_DS;
    281277}
    282278//*****************************************************************************
     
    285281{
    286282    Assert(pCpu->prefix & DISPREFIX_SEG);
    287     switch(pCpu->enmPrefixSeg)
     283    switch (pCpu->idxSegPrefix)
    288284    {
    289285    case DIS_SELREG_ES:
     
    504500 *
    505501 */
    506 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype)
     502DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype)
    507503{
    508504    memset(pParamVal, 0, sizeof(*pParamVal));
     
    763759 *
    764760 */
    765 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize)
     761DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, void **ppReg, size_t *pcbSize)
    766762{
    767763    NOREF(pCpu);
  • trunk/src/VBox/Disassembler/DisasmTables.cpp

    r41690 r41692  
    664664};
    665665
    666 /* Two byte opcode map with prefix 0x66 */
     666/** Two byte opcode map with prefix 0x66 */
    667667const DISOPCODE g_aTwoByteMapX86_PF66[256] =
    668668{
  • trunk/src/VBox/Runtime/testcase/tstLdr-3.cpp

    r41675 r41692  
    164164        char        szOutput[256];
    165165        unsigned    cbInstr;
    166         int rc = DISInstrWithReader(uNearAddr + i, pCpu->mode,
     166        int rc = DISInstrWithReader(uNearAddr + i, (DISCPUMODE)pCpu->mode,
    167167                                    MyReadBytes, (uint8_t *)pvCodeBlock - (uintptr_t)uNearAddr,
    168168                                    pCpu, &cbInstr);
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41678 r41692  
    364364        State.GCPtr = NIL_RTGCPTR;
    365365    }
    366     return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);
     366    return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->mode, emReadBytes, &State, pDis, pOpsize);
    367367}
    368368
     
    377377    State.GCPtr = InstrGC;
    378378
    379     return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);
     379    return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->mode, emReadBytes, &State, pDis, pOpsize);
    380380}
    381381
     
    733733
    734734/** Convert sel:addr to a flat GC address. */
    735 DECLINLINE(RTGCPTR) emConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pDis, POP_PARAMETER pParam, RTGCPTR pvAddr)
     735DECLINLINE(RTGCPTR) emConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pDis, PDISOPPARAM pParam, RTGCPTR pvAddr)
    736736{
    737737    DIS_SELREG enmPrefixSeg = DISDetectSegReg(pDis, pParam);
  • trunk/src/VBox/VMM/VMMAll/IOMAll.cpp

    r41678 r41692  
    137137        {
    138138            *pcbSize  = 2;
    139             DISFetchRegSeg(pRegFrame, pParam->base.reg_seg, (RTSEL *)pu64Data);
     139            DISFetchRegSeg(pRegFrame, (DIS_SELREG)pParam->base.reg_seg, (RTSEL *)pu64Data);
    140140            return true;
    141141        } /* Else - error. */
     
    193193    if (pParam->fUse & DISUSE_REG_SEG)
    194194    {
    195         DISWriteRegSeg(pRegFrame, pParam->base.reg_seg, (RTSEL)u64Data);
     195        DISWriteRegSeg(pRegFrame, (DIS_SELREG)pParam->base.reg_seg, (RTSEL)u64Data);
    196196        return true;
    197197    }
  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r41678 r41692  
    934934     * Get bytes/words/dwords/qwords count to copy.
    935935     */
    936     uint64_t const fAddrMask = iomDisModeToMask(pCpu->addrmode);
     936    uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode);
    937937    RTGCUINTREG cTransfers = 1;
    938938    if (pCpu->prefix & DISPREFIX_REP)
     
    10781078    if (rc == VINF_SUCCESS)
    10791079    {
    1080         uint64_t const fAddrMask = iomDisModeToMask(pCpu->addrmode);
     1080        uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode);
    10811081        pRegFrame->rsi = ((pRegFrame->rsi + offIncrement) & fAddrMask)
    10821082                       | (pRegFrame->rsi & ~fAddrMask);
     
    21562156    }
    21572157
    2158     return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, pCpu->addrmode, cb);
     2158    return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb);
    21592159}
    21602160
     
    23252325    }
    23262326
    2327     return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, pCpu->addrmode, cb);
     2327    return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb);
    23282328}
    23292329
  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r41675 r41692  
    24182418                    Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
    24192419                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
    2420                     rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, pDis->addrmode, uIOSize);
     2420                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize);
    24212421                }
    24222422                else
     
    24242424                    Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize));
    24252425                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
    2426                     rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, pDis->addrmode, uIOSize);
     2426                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize);
    24272427                }
    24282428            }
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r41675 r41692  
    43214321                    Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
    43224322                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite);
    4323                     rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, pDis->addrmode, cbSize);
     4323                    rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize);
    43244324                }
    43254325                else
     
    43274327                    Log2(("IOMInterpretINSEx  %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize));
    43284328                    STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead);
    4329                     rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, pDis->addrmode, cbSize);
     4329                    rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize);
    43304330                }
    43314331            }
  • trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp

    r41678 r41692  
    421421    PATCHGEN_PROLOG(pVM, pPatch);
    422422
    423     rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, pCpu->opsize);
     423    uint32_t const cbInstrShutUpGcc = pCpu->opsize;
     424    rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, cbInstrShutUpGcc);
    424425    AssertRC(rc);
    425     PATCHGEN_EPILOG(pPatch, pCpu->opsize);
     426    PATCHGEN_EPILOG(pPatch, cbInstrShutUpGcc);
    426427    return rc;
    427428}
  • trunk/src/VBox/VMM/VMMRC/PATMRC.cpp

    r41675 r41692  
    523523            rc = VBOXSTRICTRC_TODO(rcStrict);
    524524#else
    525             rc = DISInstr(&pRec->patch.aPrivInstr[0], cpu.mode, &cpu, &cbOp);
     525            rc = DISInstr(&pRec->patch.aPrivInstr[0], (DISCPUMODE)cpu.mode, &cpu, &cbOp);
    526526            if (RT_FAILURE(rc))
    527527            {
  • trunk/src/VBox/VMM/include/EMInternal.h

    r40356 r41692  
    390390
    391391    /** For saving stack space, the disassembler state is allocated here instead of
    392      * on the stack.
    393      * @note The DISCPUSTATE structure is not R3/R0/RZ clean!  */
    394     union
    395     {
    396         /** The disassembler scratch space. */
    397         DISCPUSTATE         DisState;
    398         /** Padding. */
    399         uint8_t             abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
    400     };
     392     * on the stack. */
     393    DISCPUSTATE             DisState;
    401394
    402395    /** @name Execution profiling.
  • trunk/src/VBox/VMM/include/HWACCMInternal.h

    r41318 r41692  
    749749
    750750    /** For saving stack space, the disassembler state is allocated here instead of
    751      * on the stack.
    752      * @note The DISCPUSTATE structure is not R3/R0/RZ clean!  */
    753     union
    754     {
    755         /** The disassembler scratch space. */
    756         DISCPUSTATE         DisState;
    757         /** Padding. */
    758         uint8_t             abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
    759     };
     751     * on the stack. */
     752    DISCPUSTATE             DisState;
    760753
    761754    uint32_t                padding2[1];
  • trunk/src/VBox/VMM/include/IOMInternal.h

    r39111 r41692  
    403403{
    404404    /** For saving stack space, the disassembler state is allocated here instead of
    405      * on the stack.
    406      * @note The DISCPUSTATE structure is not R3/R0/RZ clean!  */
    407     union
    408     {
    409         /** The disassembler scratch space. */
    410         DISCPUSTATE                 DisState;
    411         /** Padding. */
    412         uint8_t                     abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
    413     };
    414     uint8_t                         Dummy[16];
     405     * on the stack. */
     406    DISCPUSTATE                     DisState;
    415407} IOMCPU;
    416408/** Pointer to IOM per virtual CPU instance data. */
  • trunk/src/VBox/VMM/include/PGMInternal.h

    r41462 r41692  
    38303830
    38313831    /** For saving stack space, the disassembler state is allocated here instead of
    3832      * on the stack.
    3833      * @note The DISCPUSTATE structure is not R3/R0/RZ clean!  */
    3834     union
    3835     {
    3836         /** The disassembler scratch space. */
    3837         DISCPUSTATE                 DisState;
    3838         /** Padding. */
    3839         uint8_t                     abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
    3840     };
     3832     * on the stack. */
     3833    DISCPUSTATE                     DisState;
    38413834
    38423835    /** Count the number of pgm pool access handler calls. */
  • trunk/src/VBox/VMM/testcase/tstVMStruct.h

    r41456 r41692  
    281281    GEN_CHECK_SIZE(IOMCPU);
    282282    GEN_CHECK_OFF(IOMCPU, DisState);
    283     GEN_CHECK_OFF(IOMCPU, Dummy[0]);
    284283
    285284    GEN_CHECK_SIZE(IOMMMIORANGE);
     
    13971396    GEN_CHECK_OFF(VMCPU, pgm);
    13981397
     1398#ifndef VBOX_FOR_DTRACE_LIB
     1399    GEN_CHECK_SIZE(DISCPUSTATE);
     1400    GEN_CHECK_OFF(DISCPUSTATE, param1);
     1401    GEN_CHECK_OFF(DISCPUSTATE, param2);
     1402    GEN_CHECK_OFF(DISCPUSTATE, param3);
     1403    GEN_CHECK_OFF(DISCPUSTATE, i32SibDisp);
     1404    GEN_CHECK_OFF(DISCPUSTATE, fFilter);
     1405    GEN_CHECK_OFF(DISCPUSTATE, uInstrAddr);
     1406#endif   
  • trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

    r40907 r41692  
    5757#include <VBox/vmm/gvm.h>
    5858#include <VBox/param.h>
     59#include <VBox/dis.h>
    5960#include <iprt/x86.h>
    6061
     
    407408    CHECK_MEMBER_ALIGNMENT(HWACCMCPU, Event.intInfo, 8);
    408409
    409     /* The various disassembler state members.  */
    410     CHECK_PADDING3(EMCPU, DisState, abDisStatePadding);
    411     CHECK_PADDING3(HWACCMCPU, DisState, abDisStatePadding);
    412     CHECK_PADDING3(IOMCPU, DisState, abDisStatePadding);
    413     CHECK_PADDING3(PGMCPU, DisState, abDisStatePadding);
    414 
    415410    /* Make sure the set is large enough and has the correct size. */
    416411    CHECK_SIZE(VMCPUSET, 32);
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