Changeset 41692 in vbox
- Timestamp:
- Jun 13, 2012 7:32:54 PM (13 years ago)
- Location:
- trunk
- Files:
-
- 19 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dis.h
r41690 r41692 27 27 #define ___VBox_dis_h 28 28 29 #include <VBox/cdefs.h>30 29 #include <VBox/types.h> 31 30 #include <VBox/disopcode.h> 31 #include <iprt/assert.h> 32 32 33 33 … … 390 390 * Operand Parameter. 391 391 */ 392 typedef struct OP_PARAMETER392 typedef struct DISOPPARAM 393 393 { 394 394 uint64_t parval; … … 410 410 union 411 411 { 412 uint 32_treg_gen;412 uint8_t reg_gen; 413 413 /** ST(0) - ST(7) */ 414 uint 32_treg_fp;414 uint8_t reg_fp; 415 415 /** MMX0 - MMX7 */ 416 uint 32_treg_mmx;416 uint8_t reg_mmx; 417 417 /** XMM0 - XMM7 */ 418 uint 32_treg_xmm;419 /** {ES, CS, SS, DS, FS, GS} */420 DIS_SELREGreg_seg;418 uint8_t reg_xmm; 419 /** {ES, CS, SS, DS, FS, GS} (DIS_SELREG). */ 420 uint8_t reg_seg; 421 421 /** TR0-TR7 (?) */ 422 uint 32_treg_test;422 uint8_t reg_test; 423 423 /** CR0-CR4 */ 424 uint 32_treg_ctrl;424 uint8_t reg_ctrl; 425 425 /** DR0-DR7 */ 426 uint 32_treg_dbg;426 uint8_t reg_dbg; 427 427 } base; 428 428 union 429 429 { 430 uint 32_treg_gen;430 uint8_t reg_gen; 431 431 } index; 432 432 … … 435 435 /** Parameter size. */ 436 436 uint8_t cb; 437 } OP_PARAMETER; 437 } DISOPPARAM; 438 AssertCompileSize(DISOPPARAM, 32); 438 439 /** Pointer to opcode parameter. */ 439 typedef OP_PARAMETER *POP_PARAMETER;440 typedef DISOPPARAM *PDISOPPARAM; 440 441 /** Pointer to opcode parameter. */ 441 typedef const OP_PARAMETER*PCOP_PARAMETER;442 typedef const DISOPPARAM *PCOP_PARAMETER; 442 443 443 444 … … 462 463 /** Parser callback. 463 464 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */ 464 typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu);465 typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu); 465 466 typedef FNDISPARSE *PFNDISPARSE; 467 typedef PFNDISPARSE const *PCPFNDISPARSE; 466 468 467 469 typedef struct DISCPUSTATE 468 470 { 469 /** Global setting. */ 470 DISCPUMODE mode; 471 472 /** Per instruction prefix settings. */ 473 uint32_t prefix; /**< @todo change to uint8_t */ 474 /** segment prefix value. */ 475 DIS_SELREG enmPrefixSeg; 476 /** rex prefix value (64 bits only */ 477 uint32_t prefix_rex; /**< @todo change to uint8_t */ 478 /** addressing mode (16 or 32 bits). (CPUMODE_*) */ 479 DISCPUMODE addrmode; 480 /** operand mode (16 or 32 bits). (CPUMODE_*) */ 481 DISCPUMODE opmode; 482 483 OP_PARAMETER param1; 484 OP_PARAMETER param2; 485 OP_PARAMETER param3; 486 487 /** ModRM fields. */ 471 /* Because of apvUserData[1] and apvUserData[2], put the less frequently 472 used bits at the top for now. (Might be better off in the middle?) */ 473 DISOPPARAM param3; 474 DISOPPARAM param2; 475 DISOPPARAM param1; 476 477 /* off: 0x060 (96) */ 478 /** ModRM fields. */ 488 479 union 489 480 { … … 498 489 unsigned u; 499 490 } ModRM; 500 501 491 /** SIB fields. */ 502 492 union … … 512 502 unsigned u; 513 503 } SIB; 514 int32_t i32SibDisp; 515 504 int32_t i32SibDisp; 505 506 /* off: 0x06c (108) */ 507 /** The CPU mode (DISCPUMODE). */ 508 uint8_t mode; 509 /** The addressing mode (DISCPUMODE). */ 510 uint8_t addrmode; 511 /** The operand mode (DISCPUMODE). */ 512 uint8_t opmode; 513 /** Per instruction prefix settings. */ 514 uint8_t prefix; 515 /* off: 0x070 (112) */ 516 /** REX prefix value (64 bits only). */ 517 uint8_t prefix_rex; 518 /** Segment prefix value (DIS_SELREG). */ 519 uint8_t idxSegPrefix; 520 /** Last prefix byte (for SSE2 extension tables). */ 521 uint8_t lastprefix; 522 /** First opcode byte of instruction. */ 523 uint8_t opcode; 524 /* off: 0x074 (116) */ 525 /** The size of the prefix bytes. */ 526 uint8_t cbPrefix; 516 527 /** The instruction size. */ 517 uint32_t opsize; 528 uint8_t opsize; 529 uint8_t abUnused[2]; 530 /* off: 0x078 (120) */ 531 /** Return code set by a worker function like the opcode bytes readers. */ 532 int32_t rc; 533 /** Internal: instruction filter */ 534 uint32_t fFilter; 535 /* off: 0x080 (128) */ 536 /** Internal: pointer to disassembly function table */ 537 PCPFNDISPARSE pfnDisasmFnTable; 538 #if ARCH_BITS == 32 539 uint32_t uPtrPadding1; 540 #endif 541 /** Pointer to the current instruction. */ 542 PCDISOPCODE pCurInstr; 543 #if ARCH_BITS == 32 544 uint32_t uPtrPadding2; 545 #endif 546 /* off: 0x090 (144) */ 518 547 /** The address of the instruction. */ 519 548 RTUINTPTR uInstrAddr; 520 /* * The size of the prefix bytes.*/521 uint8_t cbPrefix;522 523 /** First opcode byte of instruction. */ 524 uint 8_t opcode;525 /** Last prefix byte (for SSE2 extension tables). */ 526 uint8_t lastprefix;549 /* off: 0x098 (152) */ 550 /** Optional read function */ 551 PFNDISREADBYTES pfnReadBytes; 552 #if ARCH_BITS == 32 553 uint32_t uPadding3; 554 #endif 555 /* off: 0x0a0 (160) */ 527 556 /** The instruction bytes. */ 528 557 uint8_t abInstr[16]; 529 530 /** Internal: pointer to disassembly function table */ 531 PFNDISPARSE *pfnDisasmFnTable; 532 /** Internal: instruction filter */ 533 uint32_t fFilter; 534 /** Return code set by a worker function like the opcode bytes readers. */ 535 int32_t rc; 536 537 /** Pointer to the current instruction. */ 538 PCDISOPCODE pCurInstr; 539 #ifndef DIS_CORE_ONLY 540 /** Opcode format string for current instruction. */ 541 const char *pszOpcode; 542 #endif 543 544 /** Optional read function */ 545 PFNDISREADBYTES pfnReadBytes; 558 /* off: 0x0b0 (176) */ 546 559 /** User data slots for the read callback. The first entry is used for the 547 560 * pvUser argument, the rest are up for grabs. 548 561 * @remarks This must come last so that we can memset everything before this. */ 549 562 void *apvUserData[3]; 563 #if ARCH_BITS == 32 564 uint32_t auPadding4[3]; 565 #endif 550 566 } DISCPUSTATE; 551 567 … … 568 584 uint16_t param2; 569 585 uint16_t param3; 570 571 586 uint32_t optype; 572 587 } DISOPCODE; … … 589 604 PDISCPUSTATE pCpu, uint32_t *pcbInstr); 590 605 591 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, P OP_PARAMETERpParam);592 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, P OP_PARAMETERpParam);606 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam); 607 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam); 593 608 DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu); 594 609 595 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, P OP_PARAMETERpParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);596 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, P OP_PARAMETERpParam, void **ppReg, size_t *pcbSize);610 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype); 611 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, void **ppReg, size_t *pcbSize); 597 612 598 613 DISDECL(int) DISFetchReg8(PCCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal); -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41690 r41692 37 37 static unsigned disParseInstruction(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISCPUSTATE pCpu); 38 38 39 static unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);40 static unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);41 static void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu);42 static unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu);43 44 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam, int fRegAddr);45 static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam);46 static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam);39 static unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL); 40 static unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL); 41 static void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu); 42 static unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu); 43 44 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr); 45 static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam); 46 static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam); 47 47 48 48 static void disValidateLockSequence(PDISCPUSTATE pCpu); … … 123 123 *******************************************************************************/ 124 124 /** Parser opcode table for full disassembly. */ 125 static PFNDISPARSE g_apfnFullDisasm[IDX_ParseMax] =125 static PFNDISPARSE const g_apfnFullDisasm[IDX_ParseMax] = 126 126 { 127 127 ParseIllegal, … … 169 169 170 170 /** Parser opcode table for only calculating instruction size. */ 171 static PFNDISPARSE g_apfnCalcSize[IDX_ParseMax] =171 static PFNDISPARSE const g_apfnCalcSize[IDX_ParseMax] = 172 172 { 173 173 ParseIllegal, … … 306 306 } 307 307 pCpu->prefix = DISPREFIX_NONE; 308 pCpu-> enmPrefixSeg= DIS_SELREG_DS;308 pCpu->idxSegPrefix = DIS_SELREG_DS; 309 309 pCpu->uInstrAddr = uInstrAddr; 310 310 pCpu->pfnDisasmFnTable = g_apfnFullDisasm; … … 359 359 // segment override prefix byte 360 360 case OP_SEG: 361 pCpu-> enmPrefixSeg= (DIS_SELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START);361 pCpu->idxSegPrefix = (DIS_SELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START); 362 362 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */ 363 363 if ( pCpu->mode != DISCPUMODE_64BIT 364 || pCpu-> enmPrefixSeg>= DIS_SELREG_FS)364 || pCpu->idxSegPrefix >= DIS_SELREG_FS) 365 365 { 366 366 pCpu->prefix |= DISPREFIX_SEG; … … 454 454 455 455 // Store the opcode format string for disasmPrintf 456 #ifndef DIS_CORE_ONLY457 pCpu->pszOpcode = pOp->pszOpcode;458 #endif459 456 pCpu->pCurInstr = pOp; 460 457 … … 521 518 /* Floating point opcode parsing */ 522 519 //***************************************************************************** 523 unsigned ParseEscFP(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)520 unsigned ParseEscFP(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 524 521 { 525 522 int index; … … 579 576 size += pCpu->pfnDisasmFnTable[fpop->idxParse2](uCodePtr+size, (PCDISOPCODE)fpop, pParam, pCpu); 580 577 581 // Store the opcode format string for disasmPrintf582 #ifndef DIS_CORE_ONLY583 pCpu->pszOpcode = fpop->pszOpcode;584 #endif585 586 578 return size; 587 579 } … … 599 591 #endif 600 592 //***************************************************************************** 601 void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)593 void UseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 602 594 { 603 595 unsigned scale, base, index, regtype; … … 658 650 //***************************************************************************** 659 651 //***************************************************************************** 660 unsigned ParseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)652 unsigned ParseSIB(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 661 653 { 662 654 unsigned size = sizeof(uint8_t); … … 691 683 //***************************************************************************** 692 684 //***************************************************************************** 693 unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)685 unsigned ParseSIB_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 694 686 { 695 687 unsigned size = sizeof(uint8_t); … … 725 717 // Mod Reg/Opcode R/M 726 718 //***************************************************************************** 727 unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)719 unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 728 720 { 729 721 int vtype = OP_PARM_VTYPE(pParam->param); … … 902 894 // Query the size of the ModRM parameters and fetch the immediate data (if any) 903 895 //***************************************************************************** 904 unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu, unsigned *pSibInc)896 unsigned QueryModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc) 905 897 { 906 898 unsigned sibinc; … … 985 977 // Query the size of the ModRM parameters and fetch the immediate data (if any) 986 978 //***************************************************************************** 987 unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu, unsigned *pSibInc)979 unsigned QueryModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu, unsigned *pSibInc) 988 980 { 989 981 unsigned sibinc; … … 1060 1052 //***************************************************************************** 1061 1053 //***************************************************************************** 1062 unsigned ParseIllegal(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1054 unsigned ParseIllegal(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1063 1055 { 1064 1056 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1068 1060 //***************************************************************************** 1069 1061 //***************************************************************************** 1070 unsigned ParseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1062 unsigned ParseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1071 1063 { 1072 1064 unsigned size = sizeof(uint8_t); //ModRM byte … … 1114 1106 //***************************************************************************** 1115 1107 //***************************************************************************** 1116 unsigned ParseModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1108 unsigned ParseModRM_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1117 1109 { 1118 1110 unsigned size = sizeof(uint8_t); //ModRM byte … … 1161 1153 //***************************************************************************** 1162 1154 //***************************************************************************** 1163 unsigned ParseModFence(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1155 unsigned ParseModFence(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1164 1156 { 1165 1157 ////AssertMsgFailed(("??\n")); … … 1170 1162 //***************************************************************************** 1171 1163 //***************************************************************************** 1172 unsigned ParseImmByte(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1164 unsigned ParseImmByte(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1173 1165 { 1174 1166 NOREF(pOp); … … 1180 1172 //***************************************************************************** 1181 1173 //***************************************************************************** 1182 unsigned ParseImmByte_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1174 unsigned ParseImmByte_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1183 1175 { 1184 1176 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1187 1179 //***************************************************************************** 1188 1180 //***************************************************************************** 1189 unsigned ParseImmByteSX(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1181 unsigned ParseImmByteSX(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1190 1182 { 1191 1183 NOREF(pOp); … … 1213 1205 //***************************************************************************** 1214 1206 //***************************************************************************** 1215 unsigned ParseImmByteSX_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1207 unsigned ParseImmByteSX_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1216 1208 { 1217 1209 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1220 1212 //***************************************************************************** 1221 1213 //***************************************************************************** 1222 unsigned ParseImmUshort(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1214 unsigned ParseImmUshort(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1223 1215 { 1224 1216 NOREF(pOp); … … 1230 1222 //***************************************************************************** 1231 1223 //***************************************************************************** 1232 unsigned ParseImmUshort_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1224 unsigned ParseImmUshort_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1233 1225 { 1234 1226 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1237 1229 //***************************************************************************** 1238 1230 //***************************************************************************** 1239 unsigned ParseImmUlong(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1231 unsigned ParseImmUlong(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1240 1232 { 1241 1233 NOREF(pOp); … … 1247 1239 //***************************************************************************** 1248 1240 //***************************************************************************** 1249 unsigned ParseImmUlong_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1241 unsigned ParseImmUlong_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1250 1242 { 1251 1243 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1254 1246 //***************************************************************************** 1255 1247 //***************************************************************************** 1256 unsigned ParseImmQword(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1248 unsigned ParseImmQword(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1257 1249 { 1258 1250 NOREF(pOp); … … 1264 1256 //***************************************************************************** 1265 1257 //***************************************************************************** 1266 unsigned ParseImmQword_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1258 unsigned ParseImmQword_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1267 1259 { 1268 1260 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1271 1263 //***************************************************************************** 1272 1264 //***************************************************************************** 1273 unsigned ParseImmV(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1265 unsigned ParseImmV(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1274 1266 { 1275 1267 NOREF(pOp); … … 1297 1289 //***************************************************************************** 1298 1290 //***************************************************************************** 1299 unsigned ParseImmV_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1291 unsigned ParseImmV_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1300 1292 { 1301 1293 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); … … 1308 1300 //***************************************************************************** 1309 1301 //***************************************************************************** 1310 unsigned ParseImmZ(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1302 unsigned ParseImmZ(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1311 1303 { 1312 1304 NOREF(pOp); … … 1337 1329 //***************************************************************************** 1338 1330 //***************************************************************************** 1339 unsigned ParseImmZ_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1331 unsigned ParseImmZ_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1340 1332 { 1341 1333 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); … … 1349 1341 // Relative displacement for branches (rel. to next instruction) 1350 1342 //***************************************************************************** 1351 unsigned ParseImmBRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1343 unsigned ParseImmBRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1352 1344 { 1353 1345 NOREF(pOp); … … 1360 1352 // Relative displacement for branches (rel. to next instruction) 1361 1353 //***************************************************************************** 1362 unsigned ParseImmBRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1354 unsigned ParseImmBRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1363 1355 { 1364 1356 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); NOREF(pCpu); … … 1368 1360 // Relative displacement for branches (rel. to next instruction) 1369 1361 //***************************************************************************** 1370 unsigned ParseImmVRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1362 unsigned ParseImmVRel(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1371 1363 { 1372 1364 NOREF(pOp); … … 1396 1388 // Relative displacement for branches (rel. to next instruction) 1397 1389 //***************************************************************************** 1398 unsigned ParseImmVRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1390 unsigned ParseImmVRel_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1399 1391 { 1400 1392 NOREF(uCodePtr); NOREF(pOp); NOREF(pParam); … … 1406 1398 //***************************************************************************** 1407 1399 //***************************************************************************** 1408 unsigned ParseImmAddr(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1400 unsigned ParseImmAddr(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1409 1401 { 1410 1402 if (pCpu->addrmode == DISCPUMODE_32BIT) … … 1468 1460 //***************************************************************************** 1469 1461 //***************************************************************************** 1470 unsigned ParseImmAddr_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1462 unsigned ParseImmAddr_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1471 1463 { 1472 1464 NOREF(uCodePtr); NOREF(pOp); … … 1501 1493 //***************************************************************************** 1502 1494 //***************************************************************************** 1503 unsigned ParseImmAddrF(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1495 unsigned ParseImmAddrF(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1504 1496 { 1505 1497 // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size! … … 1524 1516 //***************************************************************************** 1525 1517 //***************************************************************************** 1526 unsigned ParseImmAddrF_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1518 unsigned ParseImmAddrF_SizeOnly(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1527 1519 { 1528 1520 NOREF(uCodePtr); NOREF(pOp); … … 1543 1535 //***************************************************************************** 1544 1536 //***************************************************************************** 1545 unsigned ParseFixedReg(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1537 unsigned ParseFixedReg(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1546 1538 { 1547 1539 NOREF(uCodePtr); … … 1644 1636 //***************************************************************************** 1645 1637 //***************************************************************************** 1646 unsigned ParseXv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1638 unsigned ParseXv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1647 1639 { 1648 1640 NOREF(uCodePtr); … … 1669 1661 //***************************************************************************** 1670 1662 //***************************************************************************** 1671 unsigned ParseXb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1663 unsigned ParseXb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1672 1664 { 1673 1665 NOREF(uCodePtr); NOREF(pOp); … … 1694 1686 //***************************************************************************** 1695 1687 //***************************************************************************** 1696 unsigned ParseYv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1688 unsigned ParseYv(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1697 1689 { 1698 1690 NOREF(uCodePtr); … … 1719 1711 //***************************************************************************** 1720 1712 //***************************************************************************** 1721 unsigned ParseYb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1713 unsigned ParseYb(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1722 1714 { 1723 1715 NOREF(uCodePtr); NOREF(pOp); … … 1744 1736 //***************************************************************************** 1745 1737 //***************************************************************************** 1746 unsigned ParseTwoByteEsc(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1738 unsigned ParseTwoByteEsc(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1747 1739 { 1748 1740 PCDISOPCODE pOpcode; … … 1803 1795 //***************************************************************************** 1804 1796 //***************************************************************************** 1805 unsigned ParseThreeByteEsc4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1797 unsigned ParseThreeByteEsc4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1806 1798 { 1807 1799 PCDISOPCODE pOpcode; … … 1864 1856 //***************************************************************************** 1865 1857 //***************************************************************************** 1866 unsigned ParseThreeByteEsc5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1858 unsigned ParseThreeByteEsc5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1867 1859 { 1868 1860 PCDISOPCODE pOpcode; … … 1899 1891 //***************************************************************************** 1900 1892 //***************************************************************************** 1901 unsigned ParseNopPause(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1893 unsigned ParseNopPause(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1902 1894 { 1903 1895 unsigned size = 0; … … 1917 1909 //***************************************************************************** 1918 1910 //***************************************************************************** 1919 unsigned ParseImmGrpl(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1911 unsigned ParseImmGrpl(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1920 1912 { 1921 1913 int idx = (pCpu->opcode - 0x80) * 8; … … 1937 1929 //***************************************************************************** 1938 1930 //***************************************************************************** 1939 unsigned ParseShiftGrp2(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1931 unsigned ParseShiftGrp2(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1940 1932 { 1941 1933 int idx; … … 1977 1969 //***************************************************************************** 1978 1970 //***************************************************************************** 1979 unsigned ParseGrp3(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1971 unsigned ParseGrp3(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 1980 1972 { 1981 1973 int idx = (pCpu->opcode - 0xF6) * 8; … … 1998 1990 //***************************************************************************** 1999 1991 //***************************************************************************** 2000 unsigned ParseGrp4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)1992 unsigned ParseGrp4(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2001 1993 { 2002 1994 unsigned size = 0, modrm, reg; … … 2018 2010 //***************************************************************************** 2019 2011 //***************************************************************************** 2020 unsigned ParseGrp5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2012 unsigned ParseGrp5(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2021 2013 { 2022 2014 unsigned size = 0, modrm, reg; … … 2042 2034 // 2043 2035 //***************************************************************************** 2044 unsigned Parse3DNow(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2036 unsigned Parse3DNow(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2045 2037 { 2046 2038 unsigned size = 0, modrmsize; … … 2078 2070 //***************************************************************************** 2079 2071 //***************************************************************************** 2080 unsigned ParseGrp6(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2072 unsigned ParseGrp6(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2081 2073 { 2082 2074 unsigned size = 0, modrm, reg; … … 2098 2090 //***************************************************************************** 2099 2091 //***************************************************************************** 2100 unsigned ParseGrp7(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2092 unsigned ParseGrp7(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2101 2093 { 2102 2094 unsigned size = 0, modrm, reg, rm, mod; … … 2126 2118 //***************************************************************************** 2127 2119 //***************************************************************************** 2128 unsigned ParseGrp8(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2120 unsigned ParseGrp8(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2129 2121 { 2130 2122 unsigned size = 0, modrm, reg; … … 2146 2138 //***************************************************************************** 2147 2139 //***************************************************************************** 2148 unsigned ParseGrp9(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2140 unsigned ParseGrp9(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2149 2141 { 2150 2142 unsigned size = 0, modrm, reg; … … 2166 2158 //***************************************************************************** 2167 2159 //***************************************************************************** 2168 unsigned ParseGrp10(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2160 unsigned ParseGrp10(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2169 2161 { 2170 2162 unsigned size = 0, modrm, reg; … … 2186 2178 //***************************************************************************** 2187 2179 //***************************************************************************** 2188 unsigned ParseGrp12(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2180 unsigned ParseGrp12(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2189 2181 { 2190 2182 unsigned size = 0, modrm, reg; … … 2208 2200 //***************************************************************************** 2209 2201 //***************************************************************************** 2210 unsigned ParseGrp13(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2202 unsigned ParseGrp13(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2211 2203 { 2212 2204 unsigned size = 0, modrm, reg; … … 2230 2222 //***************************************************************************** 2231 2223 //***************************************************************************** 2232 unsigned ParseGrp14(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2224 unsigned ParseGrp14(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2233 2225 { 2234 2226 unsigned size = 0, modrm, reg; … … 2252 2244 //***************************************************************************** 2253 2245 //***************************************************************************** 2254 unsigned ParseGrp15(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2246 unsigned ParseGrp15(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2255 2247 { 2256 2248 unsigned size = 0, modrm, reg, mod, rm; … … 2276 2268 //***************************************************************************** 2277 2269 //***************************************************************************** 2278 unsigned ParseGrp16(RTUINTPTR uCodePtr, PCDISOPCODE pOp, P OP_PARAMETERpParam, PDISCPUSTATE pCpu)2270 unsigned ParseGrp16(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 2279 2271 { 2280 2272 unsigned size = 0, modrm, reg; … … 2305 2297 static const int IndexModRMReg16[4] = { USE_REG_SI, USE_REG_DI, USE_REG_SI, USE_REG_DI}; 2306 2298 //***************************************************************************** 2307 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam, int fRegAddr)2299 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr) 2308 2300 { 2309 2301 int subtype, type, mod; … … 2381 2373 //***************************************************************************** 2382 2374 //***************************************************************************** 2383 static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam)2375 static void disasmModRMReg16(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam) 2384 2376 { 2385 2377 NOREF(pCpu); NOREF(pOp); … … 2394 2386 //***************************************************************************** 2395 2387 //***************************************************************************** 2396 static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, P OP_PARAMETERpParam)2388 static void disasmModRMSReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam) 2397 2389 { 2398 2390 NOREF(pOp); -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41690 r41692 172 172 case DISUSE_REG_SEG: 173 173 { 174 Assert(pParam->base.reg_seg < (DIS_SELREG)RT_ELEMENTS(g_aszYasmRegCRx));174 Assert(pParam->base.reg_seg < RT_ELEMENTS(g_aszYasmRegCRx)); 175 175 const char *psz = g_aszYasmRegSeg[pParam->base.reg_seg]; 176 176 *pcchReg = 2; … … 605 605 do { \ 606 606 if (pCpu->prefix & DISPREFIX_SEG) \ 607 PUT_STR(s_szSegPrefix[pCpu-> enmPrefixSeg], 3); \607 PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 3); \ 608 608 } while (0) 609 609 … … 617 617 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse)) 618 618 { 619 PUT_STR(s_szSegPrefix[pCpu-> enmPrefixSeg], 2);619 PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 2); 620 620 PUT_C(' '); 621 621 } -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41690 r41692 201 201 //***************************************************************************** 202 202 //***************************************************************************** 203 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, P OP_PARAMETERpParam)203 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam) 204 204 { 205 205 int subtype = OP_PARM_VSUBTYPE(pParam->param); … … 257 257 //***************************************************************************** 258 258 //***************************************************************************** 259 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, P OP_PARAMETERpParam)259 DISDECL(DIS_SELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam) 260 260 { 261 261 if (pCpu->prefix & DISPREFIX_SEG) 262 /* Use specified SEG: prefix. */ 263 return (DIS_SELREG)pCpu->idxSegPrefix; 264 265 /* Guess segment register by parameter type. */ 266 if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16)) 262 267 { 263 /* Use specified SEG: prefix. */ 264 return pCpu->enmPrefixSeg; 268 AssertCompile(USE_REG_ESP == USE_REG_RSP); 269 AssertCompile(USE_REG_EBP == USE_REG_RBP); 270 AssertCompile(USE_REG_ESP == USE_REG_SP); 271 AssertCompile(USE_REG_EBP == USE_REG_BP); 272 if (pParam->base.reg_gen == USE_REG_ESP || pParam->base.reg_gen == USE_REG_EBP) 273 return DIS_SELREG_SS; 265 274 } 266 else 267 { 268 /* Guess segment register by parameter type. */ 269 if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16)) 270 { 271 AssertCompile(USE_REG_ESP == USE_REG_RSP); 272 AssertCompile(USE_REG_EBP == USE_REG_RBP); 273 AssertCompile(USE_REG_ESP == USE_REG_SP); 274 AssertCompile(USE_REG_EBP == USE_REG_BP); 275 if (pParam->base.reg_gen == USE_REG_ESP || pParam->base.reg_gen == USE_REG_EBP) 276 return DIS_SELREG_SS; 277 } 278 /* Default is use DS: for data access. */ 279 return DIS_SELREG_DS; 280 } 275 /* Default is use DS: for data access. */ 276 return DIS_SELREG_DS; 281 277 } 282 278 //***************************************************************************** … … 285 281 { 286 282 Assert(pCpu->prefix & DISPREFIX_SEG); 287 switch (pCpu->enmPrefixSeg)283 switch (pCpu->idxSegPrefix) 288 284 { 289 285 case DIS_SELREG_ES: … … 504 500 * 505 501 */ 506 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, P OP_PARAMETERpParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype)502 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype) 507 503 { 508 504 memset(pParamVal, 0, sizeof(*pParamVal)); … … 763 759 * 764 760 */ 765 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, P OP_PARAMETERpParam, void **ppReg, size_t *pcbSize)761 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, PDISOPPARAM pParam, void **ppReg, size_t *pcbSize) 766 762 { 767 763 NOREF(pCpu); -
trunk/src/VBox/Disassembler/DisasmTables.cpp
r41690 r41692 664 664 }; 665 665 666 /* Two byte opcode map with prefix 0x66 */666 /** Two byte opcode map with prefix 0x66 */ 667 667 const DISOPCODE g_aTwoByteMapX86_PF66[256] = 668 668 { -
trunk/src/VBox/Runtime/testcase/tstLdr-3.cpp
r41675 r41692 164 164 char szOutput[256]; 165 165 unsigned cbInstr; 166 int rc = DISInstrWithReader(uNearAddr + i, pCpu->mode,166 int rc = DISInstrWithReader(uNearAddr + i, (DISCPUMODE)pCpu->mode, 167 167 MyReadBytes, (uint8_t *)pvCodeBlock - (uintptr_t)uNearAddr, 168 168 pCpu, &cbInstr); -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41678 r41692 364 364 State.GCPtr = NIL_RTGCPTR; 365 365 } 366 return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);366 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->mode, emReadBytes, &State, pDis, pOpsize); 367 367 } 368 368 … … 377 377 State.GCPtr = InstrGC; 378 378 379 return DISInstrWithReader(InstrGC, pDis->mode, emReadBytes, &State, pDis, pOpsize);379 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->mode, emReadBytes, &State, pDis, pOpsize); 380 380 } 381 381 … … 733 733 734 734 /** Convert sel:addr to a flat GC address. */ 735 DECLINLINE(RTGCPTR) emConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pDis, P OP_PARAMETERpParam, RTGCPTR pvAddr)735 DECLINLINE(RTGCPTR) emConvertToFlatAddr(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pDis, PDISOPPARAM pParam, RTGCPTR pvAddr) 736 736 { 737 737 DIS_SELREG enmPrefixSeg = DISDetectSegReg(pDis, pParam); -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r41678 r41692 137 137 { 138 138 *pcbSize = 2; 139 DISFetchRegSeg(pRegFrame, pParam->base.reg_seg, (RTSEL *)pu64Data);139 DISFetchRegSeg(pRegFrame, (DIS_SELREG)pParam->base.reg_seg, (RTSEL *)pu64Data); 140 140 return true; 141 141 } /* Else - error. */ … … 193 193 if (pParam->fUse & DISUSE_REG_SEG) 194 194 { 195 DISWriteRegSeg(pRegFrame, pParam->base.reg_seg, (RTSEL)u64Data);195 DISWriteRegSeg(pRegFrame, (DIS_SELREG)pParam->base.reg_seg, (RTSEL)u64Data); 196 196 return true; 197 197 } -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r41678 r41692 934 934 * Get bytes/words/dwords/qwords count to copy. 935 935 */ 936 uint64_t const fAddrMask = iomDisModeToMask( pCpu->addrmode);936 uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode); 937 937 RTGCUINTREG cTransfers = 1; 938 938 if (pCpu->prefix & DISPREFIX_REP) … … 1078 1078 if (rc == VINF_SUCCESS) 1079 1079 { 1080 uint64_t const fAddrMask = iomDisModeToMask( pCpu->addrmode);1080 uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode); 1081 1081 pRegFrame->rsi = ((pRegFrame->rsi + offIncrement) & fAddrMask) 1082 1082 | (pRegFrame->rsi & ~fAddrMask); … … 2156 2156 } 2157 2157 2158 return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, pCpu->addrmode, cb);2158 return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb); 2159 2159 } 2160 2160 … … 2325 2325 } 2326 2326 2327 return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, pCpu->addrmode, cb);2327 return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->prefix, (DISCPUMODE)pCpu->addrmode, cb); 2328 2328 } 2329 2329 -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r41675 r41692 2418 2418 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize)); 2419 2419 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite); 2420 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, pDis->addrmode, uIOSize);2420 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize); 2421 2421 } 2422 2422 else … … 2424 2424 Log2(("IOMInterpretINSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize)); 2425 2425 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead); 2426 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, pDis->addrmode, uIOSize);2426 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->prefix, (DISCPUMODE)pDis->addrmode, uIOSize); 2427 2427 } 2428 2428 } -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r41675 r41692 4321 4321 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize)); 4322 4322 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite); 4323 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, pDis->addrmode, cbSize);4323 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize); 4324 4324 } 4325 4325 else … … 4327 4327 Log2(("IOMInterpretINSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize)); 4328 4328 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead); 4329 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, pDis->addrmode, cbSize);4329 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->prefix, (DISCPUMODE)pDis->addrmode, cbSize); 4330 4330 } 4331 4331 } -
trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
r41678 r41692 421 421 PATCHGEN_PROLOG(pVM, pPatch); 422 422 423 rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, pCpu->opsize); 423 uint32_t const cbInstrShutUpGcc = pCpu->opsize; 424 rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, cbInstrShutUpGcc); 424 425 AssertRC(rc); 425 PATCHGEN_EPILOG(pPatch, pCpu->opsize);426 PATCHGEN_EPILOG(pPatch, cbInstrShutUpGcc); 426 427 return rc; 427 428 } -
trunk/src/VBox/VMM/VMMRC/PATMRC.cpp
r41675 r41692 523 523 rc = VBOXSTRICTRC_TODO(rcStrict); 524 524 #else 525 rc = DISInstr(&pRec->patch.aPrivInstr[0], cpu.mode, &cpu, &cbOp);525 rc = DISInstr(&pRec->patch.aPrivInstr[0], (DISCPUMODE)cpu.mode, &cpu, &cbOp); 526 526 if (RT_FAILURE(rc)) 527 527 { -
trunk/src/VBox/VMM/include/EMInternal.h
r40356 r41692 390 390 391 391 /** For saving stack space, the disassembler state is allocated here instead of 392 * on the stack. 393 * @note The DISCPUSTATE structure is not R3/R0/RZ clean! */ 394 union 395 { 396 /** The disassembler scratch space. */ 397 DISCPUSTATE DisState; 398 /** Padding. */ 399 uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE]; 400 }; 392 * on the stack. */ 393 DISCPUSTATE DisState; 401 394 402 395 /** @name Execution profiling. -
trunk/src/VBox/VMM/include/HWACCMInternal.h
r41318 r41692 749 749 750 750 /** For saving stack space, the disassembler state is allocated here instead of 751 * on the stack. 752 * @note The DISCPUSTATE structure is not R3/R0/RZ clean! */ 753 union 754 { 755 /** The disassembler scratch space. */ 756 DISCPUSTATE DisState; 757 /** Padding. */ 758 uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE]; 759 }; 751 * on the stack. */ 752 DISCPUSTATE DisState; 760 753 761 754 uint32_t padding2[1]; -
trunk/src/VBox/VMM/include/IOMInternal.h
r39111 r41692 403 403 { 404 404 /** For saving stack space, the disassembler state is allocated here instead of 405 * on the stack. 406 * @note The DISCPUSTATE structure is not R3/R0/RZ clean! */ 407 union 408 { 409 /** The disassembler scratch space. */ 410 DISCPUSTATE DisState; 411 /** Padding. */ 412 uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE]; 413 }; 414 uint8_t Dummy[16]; 405 * on the stack. */ 406 DISCPUSTATE DisState; 415 407 } IOMCPU; 416 408 /** Pointer to IOM per virtual CPU instance data. */ -
trunk/src/VBox/VMM/include/PGMInternal.h
r41462 r41692 3830 3830 3831 3831 /** For saving stack space, the disassembler state is allocated here instead of 3832 * on the stack. 3833 * @note The DISCPUSTATE structure is not R3/R0/RZ clean! */ 3834 union 3835 { 3836 /** The disassembler scratch space. */ 3837 DISCPUSTATE DisState; 3838 /** Padding. */ 3839 uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE]; 3840 }; 3832 * on the stack. */ 3833 DISCPUSTATE DisState; 3841 3834 3842 3835 /** Count the number of pgm pool access handler calls. */ -
trunk/src/VBox/VMM/testcase/tstVMStruct.h
r41456 r41692 281 281 GEN_CHECK_SIZE(IOMCPU); 282 282 GEN_CHECK_OFF(IOMCPU, DisState); 283 GEN_CHECK_OFF(IOMCPU, Dummy[0]);284 283 285 284 GEN_CHECK_SIZE(IOMMMIORANGE); … … 1397 1396 GEN_CHECK_OFF(VMCPU, pgm); 1398 1397 1398 #ifndef VBOX_FOR_DTRACE_LIB 1399 GEN_CHECK_SIZE(DISCPUSTATE); 1400 GEN_CHECK_OFF(DISCPUSTATE, param1); 1401 GEN_CHECK_OFF(DISCPUSTATE, param2); 1402 GEN_CHECK_OFF(DISCPUSTATE, param3); 1403 GEN_CHECK_OFF(DISCPUSTATE, i32SibDisp); 1404 GEN_CHECK_OFF(DISCPUSTATE, fFilter); 1405 GEN_CHECK_OFF(DISCPUSTATE, uInstrAddr); 1406 #endif -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r40907 r41692 57 57 #include <VBox/vmm/gvm.h> 58 58 #include <VBox/param.h> 59 #include <VBox/dis.h> 59 60 #include <iprt/x86.h> 60 61 … … 407 408 CHECK_MEMBER_ALIGNMENT(HWACCMCPU, Event.intInfo, 8); 408 409 409 /* The various disassembler state members. */410 CHECK_PADDING3(EMCPU, DisState, abDisStatePadding);411 CHECK_PADDING3(HWACCMCPU, DisState, abDisStatePadding);412 CHECK_PADDING3(IOMCPU, DisState, abDisStatePadding);413 CHECK_PADDING3(PGMCPU, DisState, abDisStatePadding);414 415 410 /* Make sure the set is large enough and has the correct size. */ 416 411 CHECK_SIZE(VMCPUSET, 32);
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