- Timestamp:
- Jun 15, 2012 12:20:13 AM (13 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/BIOS-new/MakeDebianBiosAssembly.cpp
r41675 r41734 833 833 * modrm.reg != 0. Those encodings should be invalid AFAICT. */ 834 834 835 if ( ( pCpuState-> opcode == 0x8f /* group 1a */836 || pCpuState-> opcode == 0xc7 /* group 11 */837 || pCpuState-> opcode == 0xc6 /* group 11 - not verified */835 if ( ( pCpuState->bOpCode == 0x8f /* group 1a */ 836 || pCpuState->bOpCode == 0xc7 /* group 11 */ 837 || pCpuState->bOpCode == 0xc6 /* group 11 - not verified */ 838 838 ) 839 839 && pCpuState->ModRM.Bits.Reg != 0) … … 841 841 /** @todo "TEST Eb,Ib" (f6 0f 08) ends up with no mnemonic as well as 842 842 * wrong length (2 instead of 3)! */ 843 else if ( pCpuState-> opcode == 0xf6843 else if ( pCpuState->bOpCode == 0xf6 844 844 && pb[1] == 0x0f 845 845 && pb[2] == 0x08 … … 847 847 fDifferent = true; 848 848 /** @todo "INSB Yb,DX" (6c) ends up with no mnemonic here. */ 849 else if (pCpuState-> opcode == 0x6c && RT_C_IS_SPACE(*pszBuf))849 else if (pCpuState->bOpCode == 0x6c && RT_C_IS_SPACE(*pszBuf)) 850 850 fDifferent = true; 851 851 /* -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41733 r41734 304 304 pCpu->opmode = enmCpuMode; 305 305 } 306 pCpu-> prefix= DISPREFIX_NONE;306 pCpu->fPrefix = DISPREFIX_NONE; 307 307 pCpu->idxSegPrefix = DISSELREG_DS; 308 308 pCpu->uInstrAddr = uInstrAddr; … … 346 346 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */ 347 347 pCpu->bLastPrefix = opcode; 348 pCpu-> prefix &= ~DISPREFIX_REX;348 pCpu->fPrefix &= ~DISPREFIX_REX; 349 349 } 350 350 … … 363 363 || pCpu->idxSegPrefix >= DISSELREG_FS) 364 364 { 365 pCpu-> prefix|= DISPREFIX_SEG;365 pCpu->fPrefix |= DISPREFIX_SEG; 366 366 } 367 367 iByte += sizeof(uint8_t); … … 370 370 // lock prefix byte 371 371 case OP_LOCK: 372 pCpu-> prefix |= DISPREFIX_LOCK;372 pCpu->fPrefix |= DISPREFIX_LOCK; 373 373 iByte += sizeof(uint8_t); 374 374 continue; //fetch the next byte … … 376 376 // address size override prefix byte 377 377 case OP_ADDRSIZE: 378 pCpu-> prefix |= DISPREFIX_ADDRSIZE;378 pCpu->fPrefix |= DISPREFIX_ADDRSIZE; 379 379 if (pCpu->mode == DISCPUMODE_16BIT) 380 380 pCpu->addrmode = DISCPUMODE_32BIT; … … 390 390 // operand size override prefix byte 391 391 case OP_OPSIZE: 392 pCpu-> prefix |= DISPREFIX_OPSIZE;392 pCpu->fPrefix |= DISPREFIX_OPSIZE; 393 393 if (pCpu->mode == DISCPUMODE_16BIT) 394 394 pCpu->opmode = DISCPUMODE_32BIT; … … 401 401 // rep and repne are not really prefixes, but we'll treat them as such 402 402 case OP_REPE: 403 pCpu-> prefix |= DISPREFIX_REP;403 pCpu->fPrefix |= DISPREFIX_REP; 404 404 iByte += sizeof(uint8_t); 405 405 continue; //fetch the next byte 406 406 407 407 case OP_REPNE: 408 pCpu-> prefix |= DISPREFIX_REPNE;408 pCpu->fPrefix |= DISPREFIX_REPNE; 409 409 iByte += sizeof(uint8_t); 410 410 continue; //fetch the next byte … … 413 413 Assert(pCpu->mode == DISCPUMODE_64BIT); 414 414 /* REX prefix byte */ 415 pCpu-> prefix|= DISPREFIX_REX;415 pCpu->fPrefix |= DISPREFIX_REX; 416 416 pCpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1); 417 417 iByte += sizeof(uint8_t); … … 438 438 *pcbInstr = iByte; 439 439 440 if (pCpu-> prefix & DISPREFIX_LOCK)440 if (pCpu->fPrefix & DISPREFIX_LOCK) 441 441 disValidateLockSequence(pCpu); 442 442 … … 482 482 else 483 483 if ( (pOp->optype & DISOPTYPE_DEFAULT_64_OP_SIZE) 484 && !(pCpu-> prefix & DISPREFIX_OPSIZE))484 && !(pCpu->fPrefix & DISPREFIX_OPSIZE)) 485 485 pCpu->opmode = DISCPUMODE_64BIT; 486 486 } … … 561 561 else 562 562 if ( (fpop->optype & DISOPTYPE_DEFAULT_64_OP_SIZE) 563 && !(pCpu-> prefix & DISPREFIX_OPSIZE))563 && !(pCpu->fPrefix & DISPREFIX_OPSIZE)) 564 564 pCpu->opmode = DISCPUMODE_64BIT; 565 565 } … … 662 662 pCpu->SIB.Bits.Scale = SIB_SCALE(SIB); 663 663 664 if (pCpu-> prefix & DISPREFIX_REX)664 if (pCpu->fPrefix & DISPREFIX_REX) 665 665 { 666 666 /* REX.B extends the Base field if not scaled index + disp32 */ … … 695 695 pCpu->SIB.Bits.Scale = SIB_SCALE(SIB); 696 696 697 if (pCpu-> prefix & DISPREFIX_REX)697 if (pCpu->fPrefix & DISPREFIX_REX) 698 698 { 699 699 /* REX.B extends the Base field. */ … … 739 739 if ( pCpu->pCurInstr->opcode == OP_MOV_CR 740 740 && pCpu->opmode == DISCPUMODE_32BIT 741 && (pCpu-> prefix & DISPREFIX_LOCK))741 && (pCpu->fPrefix & DISPREFIX_LOCK)) 742 742 { 743 pCpu-> prefix &= ~DISPREFIX_LOCK;743 pCpu->fPrefix &= ~DISPREFIX_LOCK; 744 744 pParam->base.reg_ctrl = DISCREG_CR8; 745 745 } … … 1080 1080 pCpu->ModRM.Bits.Mod = 3; 1081 1081 1082 if (pCpu-> prefix & DISPREFIX_REX)1082 if (pCpu->fPrefix & DISPREFIX_REX) 1083 1083 { 1084 1084 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 1126 1126 pCpu->ModRM.Bits.Mod = 3; 1127 1127 1128 if (pCpu-> prefix & DISPREFIX_REX)1128 if (pCpu->fPrefix & DISPREFIX_REX) 1129 1129 { 1130 1130 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 1570 1570 if ( (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG) 1571 1571 && pParam == &pCpu->param1 /* ugly assumption that it only applies to the first parameter */ 1572 && (pCpu-> prefix & DISPREFIX_REX)1572 && (pCpu->fPrefix & DISPREFIX_REX) 1573 1573 && (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS)) 1574 1574 pParam->base.reg_gen += 8; … … 1614 1614 if ( (pOp->optype & DISOPTYPE_REXB_EXTENDS_OPREG) 1615 1615 && pParam == &pCpu->param1 /* ugly assumption that it only applies to the first parameter */ 1616 && (pCpu-> prefix & DISPREFIX_REX)1616 && (pCpu->fPrefix & DISPREFIX_REX) 1617 1617 && (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS)) 1618 1618 pParam->base.reg_gen += 8; /* least significant byte of R8-R15 */ … … 1760 1760 1761 1761 /* Cancel prefix changes. */ 1762 pCpu-> prefix &= ~DISPREFIX_OPSIZE;1762 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1763 1763 pCpu->opmode = pCpu->mode; 1764 1764 } … … 1772 1772 1773 1773 /* Cancel prefix changes. */ 1774 pCpu-> prefix &= ~DISPREFIX_REPNE;1774 pCpu->fPrefix &= ~DISPREFIX_REPNE; 1775 1775 } 1776 1776 break; … … 1783 1783 1784 1784 /* Cancel prefix changes. */ 1785 pCpu-> prefix &= ~DISPREFIX_REP;1785 pCpu->fPrefix &= ~DISPREFIX_REP; 1786 1786 } 1787 1787 break; … … 1827 1827 1828 1828 /* Cancel prefix changes. */ 1829 pCpu-> prefix &= ~DISPREFIX_OPSIZE;1829 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1830 1830 pCpu->opmode = pCpu->mode; 1831 1831 } … … 1844 1844 1845 1845 /* Cancel prefix changes. */ 1846 pCpu-> prefix &= ~DISPREFIX_REPNE;1846 pCpu->fPrefix &= ~DISPREFIX_REPNE; 1847 1847 } 1848 1848 } … … 1878 1878 1879 1879 /* Cancel prefix changes. */ 1880 pCpu-> prefix &= ~DISPREFIX_OPSIZE;1880 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1881 1881 pCpu->opmode = pCpu->mode; 1882 1882 } … … 1895 1895 NOREF(pParam); 1896 1896 1897 if (pCpu-> prefix & DISPREFIX_REP)1897 if (pCpu->fPrefix & DISPREFIX_REP) 1898 1898 { 1899 1899 pOp = &g_aMapX86_NopPause[1]; /* PAUSE */ 1900 pCpu-> prefix &= ~DISPREFIX_REP;1900 pCpu->fPrefix &= ~DISPREFIX_REP; 1901 1901 } 1902 1902 else … … 2185 2185 reg = MODRM_REG(modrm); 2186 2186 2187 if (pCpu-> prefix & DISPREFIX_OPSIZE)2187 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 2188 2188 reg += 8; //2nd table 2189 2189 … … 2206 2206 modrm = disReadByte(pCpu, uCodePtr); 2207 2207 reg = MODRM_REG(modrm); 2208 if (pCpu-> prefix & DISPREFIX_OPSIZE)2208 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 2209 2209 reg += 8; //2nd table 2210 2210 … … 2228 2228 modrm = disReadByte(pCpu, uCodePtr); 2229 2229 reg = MODRM_REG(modrm); 2230 if (pCpu-> prefix & DISPREFIX_OPSIZE)2230 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 2231 2231 reg += 8; //2nd table 2232 2232 … … 2330 2330 { 2331 2331 case OP_PARM_b: 2332 Assert(idx < (pCpu-> prefix & DISPREFIX_REX ? 16U : 8U));2332 Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2333 2333 2334 2334 /* AH, BH, CH & DH map to DIL, SIL, EBL & SPL when a rex prefix is present. */ 2335 2335 /* Intel® 64 and IA-32 Architectures Software Developers Manual: 3.4.1.1 */ 2336 if ( (pCpu-> prefix & DISPREFIX_REX)2336 if ( (pCpu->fPrefix & DISPREFIX_REX) 2337 2337 && idx >= DISGREG_AH 2338 2338 && idx <= DISGREG_BH) … … 2346 2346 2347 2347 case OP_PARM_w: 2348 Assert(idx < (pCpu-> prefix & DISPREFIX_REX ? 16U : 8U));2348 Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2349 2349 2350 2350 pParam->fUse |= DISUSE_REG_GEN16; … … 2353 2353 2354 2354 case OP_PARM_d: 2355 Assert(idx < (pCpu-> prefix & DISPREFIX_REX ? 16U : 8U));2355 Assert(idx < (pCpu->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2356 2356 2357 2357 pParam->fUse |= DISUSE_REG_GEN32; … … 2618 2618 static void disValidateLockSequence(PDISCPUSTATE pCpu) 2619 2619 { 2620 Assert(pCpu-> prefix & DISPREFIX_LOCK);2620 Assert(pCpu->fPrefix & DISPREFIX_LOCK); 2621 2621 2622 2622 /* -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41733 r41734 392 392 if ( pOp->opcode == OP_INVALID 393 393 || ( pOp->opcode == OP_ILLUD2 394 && (pCpu-> prefix & DISPREFIX_LOCK)))394 && (pCpu->fPrefix & DISPREFIX_LOCK))) 395 395 { 396 396 … … 401 401 * Prefixes 402 402 */ 403 if (pCpu-> prefix & DISPREFIX_LOCK)403 if (pCpu->fPrefix & DISPREFIX_LOCK) 404 404 PUT_SZ("lock "); 405 if(pCpu-> prefix & DISPREFIX_REP)405 if(pCpu->fPrefix & DISPREFIX_REP) 406 406 PUT_SZ("rep "); 407 else if(pCpu-> prefix & DISPREFIX_REPNE)407 else if(pCpu->fPrefix & DISPREFIX_REPNE) 408 408 PUT_SZ("repne "); 409 409 … … 604 604 #define PUT_SEGMENT_OVERRIDE() \ 605 605 do { \ 606 if (pCpu-> prefix & DISPREFIX_SEG) \606 if (pCpu->fPrefix & DISPREFIX_SEG) \ 607 607 PUT_STR(s_szSegPrefix[pCpu->idxSegPrefix], 3); \ 608 608 } while (0) … … 612 612 * Segment prefixing for instructions that doesn't do memory access. 613 613 */ 614 if ( (pCpu-> prefix & DISPREFIX_SEG)614 if ( (pCpu->fPrefix & DISPREFIX_SEG) 615 615 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 616 616 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) … … 1291 1291 { 1292 1292 /* no effective address which it may apply to. */ 1293 Assert((pCpu-> prefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT);1293 Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT); 1294 1294 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 1295 1295 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) … … 1301 1301 if (fPrefixes & DISPREFIX_ADDRSIZE) 1302 1302 { 1303 Assert(pCpu-> prefix & DISPREFIX_ADDRSIZE);1303 Assert(pCpu->fPrefix & DISPREFIX_ADDRSIZE); 1304 1304 if ( pCpu->pCurInstr->param3 == OP_PARM_NONE 1305 1305 && pCpu->pCurInstr->param2 == OP_PARM_NONE -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41732 r41734 259 259 DISDECL(DISSELREG) DISDetectSegReg(PDISCPUSTATE pCpu, PDISOPPARAM pParam) 260 260 { 261 if (pCpu-> prefix & DISPREFIX_SEG)261 if (pCpu->fPrefix & DISPREFIX_SEG) 262 262 /* Use specified SEG: prefix. */ 263 263 return (DISSELREG)pCpu->idxSegPrefix; … … 280 280 DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu) 281 281 { 282 Assert(pCpu-> prefix & DISPREFIX_SEG);282 Assert(pCpu->fPrefix & DISPREFIX_SEG); 283 283 switch (pCpu->idxSegPrefix) 284 284 { -
trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp
r41675 r41734 107 107 int rc = DISInstrWithReader(CodeIndex, DISCPUMODE_32BIT, DisasmTest1ReadCode, 0, pCpu, &cb); 108 108 *pcb = cb; 109 MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d Cpu: opcode=%#x pCurInstr=%p (42=%d)\n", \110 rc, cb, pCpu-> opcode, pCpu->pCurInstr, 42)); \109 MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d Cpu: bOpCode=%#x pCurInstr=%p (42=%d)\n", \ 110 rc, cb, pCpu->bOpCode, pCpu->pCurInstr, 42)); \ 111 111 return rc; 112 112 } -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41732 r41734 789 789 case OP_LMSW: return "Lmsw"; 790 790 case OP_SMSW: return "Smsw"; 791 case OP_CMPXCHG: return pDis-> prefix & DISPREFIX_LOCK ? "Lock CmpXchg" : "CmpXchg";792 case OP_CMPXCHG8B: return pDis-> prefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";791 case OP_CMPXCHG: return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg" : "CmpXchg"; 792 case OP_CMPXCHG8B: return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b"; 793 793 794 794 default: … … 1652 1652 1653 1653 /* Don't support any but these three prefix bytes. */ 1654 if ((pDis-> prefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX)))1654 if ((pDis->fPrefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX))) 1655 1655 return VERR_EM_INTERPRETER; 1656 1656 … … 1693 1693 offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cbSize : (signed)cbSize; 1694 1694 1695 if (!(pDis-> prefix & DISPREFIX_REP))1695 if (!(pDis->fPrefix & DISPREFIX_REP)) 1696 1696 { 1697 1697 LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize)); … … 1848 1848 LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pDis), GCPtrPar1, pRegFrame->rax, valpar)); 1849 1849 1850 if (pDis-> prefix & DISPREFIX_LOCK)1850 if (pDis->fPrefix & DISPREFIX_LOCK) 1851 1851 eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb); 1852 1852 else … … 1901 1901 LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pDis), pvParam1, pRegFrame->eax)); 1902 1902 1903 if (pDis-> prefix & DISPREFIX_LOCK)1903 if (pDis->fPrefix & DISPREFIX_LOCK) 1904 1904 eflags = EMEmulateLockCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx); 1905 1905 else … … 1970 1970 LogFlow(("XAdd %RGv=%p reg=%08llx\n", GCPtrPar1, pvParam1, *(uint64_t *)pvParamReg2)); 1971 1971 1972 if (pDis-> prefix & DISPREFIX_LOCK)1972 if (pDis->fPrefix & DISPREFIX_LOCK) 1973 1973 eflags = EMEmulateLockXAdd(pvParam1, pvParamReg2, cbParamReg2); 1974 1974 else … … 2654 2654 AssertRCReturn(rc, VERR_EM_INTERPRETER); 2655 2655 2656 if (!(pDis-> prefix & DISPREFIX_OPSIZE))2656 if (!(pDis->fPrefix & DISPREFIX_OPSIZE)) 2657 2657 dtr32.uAddr &= 0xffffff; /* 16 bits operand size */ 2658 2658 … … 3030 3030 /* Note: The Intel manual claims there's a REX version of RDMSR that's slightly 3031 3031 different, so we play safe by completely disassembling the instruction. */ 3032 Assert(!(pDis-> prefix & DISPREFIX_REX));3032 Assert(!(pDis->fPrefix & DISPREFIX_REX)); 3033 3033 NOREF(pDis); NOREF(pvFault); NOREF(pcbSize); 3034 3034 return EMInterpretRdmsr(pVM, pVCpu, pRegFrame); … … 3104 3104 3105 3105 #ifdef IN_RC 3106 if ( (pDis-> prefix & (DISPREFIX_REPNE | DISPREFIX_REP))3107 || ( (pDis-> prefix & DISPREFIX_LOCK)3106 if ( (pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP)) 3107 || ( (pDis->fPrefix & DISPREFIX_LOCK) 3108 3108 && pDis->pCurInstr->opcode != OP_CMPXCHG 3109 3109 && pDis->pCurInstr->opcode != OP_CMPXCHG8B … … 3116 3116 ) 3117 3117 #else 3118 if ( (pDis-> prefix & DISPREFIX_REPNE)3119 || ( (pDis-> prefix & DISPREFIX_REP)3118 if ( (pDis->fPrefix & DISPREFIX_REPNE) 3119 || ( (pDis->fPrefix & DISPREFIX_REP) 3120 3120 && pDis->pCurInstr->opcode != OP_STOSWD 3121 3121 ) 3122 || ( (pDis-> prefix & DISPREFIX_LOCK)3122 || ( (pDis->fPrefix & DISPREFIX_LOCK) 3123 3123 && pDis->pCurInstr->opcode != OP_OR 3124 3124 && pDis->pCurInstr->opcode != OP_AND … … 3228 3228 # define INTERPRET_CASE_EX_LOCK_PARAM3(opcode, Instr, InstrFn, pfnEmulate, pfnEmulateLock) \ 3229 3229 case opcode:\ 3230 if (pDis-> prefix & DISPREFIX_LOCK) \3230 if (pDis->fPrefix & DISPREFIX_LOCK) \ 3231 3231 rc = emInterpretLock##InstrFn(pVM, pVCpu, pDis, pRegFrame, pvFault, pcbSize, pfnEmulateLock); \ 3232 3232 else \ -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r41727 r41734 670 670 * We do not support segment prefixes or REPNE. 671 671 */ 672 if (pCpu-> prefix & (DISPREFIX_SEG | DISPREFIX_REPNE))672 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE)) 673 673 return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> interpret whatever. */ 674 674 … … 679 679 */ 680 680 uint32_t cTransfers = 1; 681 if (pCpu-> prefix & DISPREFIX_REP)681 if (pCpu->fPrefix & DISPREFIX_REP) 682 682 { 683 683 #ifndef IN_RC … … 767 767 #endif 768 768 /* Update ecx. */ 769 if (pCpu-> prefix & DISPREFIX_REP)769 if (pCpu->fPrefix & DISPREFIX_REP) 770 770 pRegFrame->ecx = cTransfers; 771 771 } … … 875 875 876 876 /* Update ecx on exit. */ 877 if (pCpu-> prefix & DISPREFIX_REP)877 if (pCpu->fPrefix & DISPREFIX_REP) 878 878 pRegFrame->ecx = cTransfers; 879 879 } … … 928 928 * We do not support segment prefixes or REPNE.. 929 929 */ 930 if (pCpu-> prefix & (DISPREFIX_SEG | DISPREFIX_REPNE))930 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REPNE)) 931 931 return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */ 932 932 … … 936 936 uint64_t const fAddrMask = iomDisModeToMask((DISCPUMODE)pCpu->addrmode); 937 937 RTGCUINTREG cTransfers = 1; 938 if (pCpu-> prefix & DISPREFIX_REP)938 if (pCpu->fPrefix & DISPREFIX_REP) 939 939 { 940 940 #ifndef IN_RC … … 983 983 pRegFrame->rdi = ((pRegFrame->rdi + (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask) 984 984 | (pRegFrame->rdi & ~fAddrMask); 985 if (pCpu-> prefix & DISPREFIX_REP)985 if (pCpu->fPrefix & DISPREFIX_REP) 986 986 pRegFrame->rcx &= ~fAddrMask; 987 987 } … … 998 998 pRegFrame->rdi = ((pRegFrame->rdi - (cTransfers << SIZE_2_SHIFT(cb))) & fAddrMask) 999 999 | (pRegFrame->rdi & ~fAddrMask); 1000 if (pCpu-> prefix & DISPREFIX_REP)1000 if (pCpu->fPrefix & DISPREFIX_REP) 1001 1001 pRegFrame->rcx &= ~fAddrMask; 1002 1002 } … … 1025 1025 1026 1026 /* Update rcx on exit. */ 1027 if (pCpu-> prefix & DISPREFIX_REP)1027 if (pCpu->fPrefix & DISPREFIX_REP) 1028 1028 pRegFrame->rcx = (cTransfers & fAddrMask) 1029 1029 | (pRegFrame->rcx & ~fAddrMask); … … 1062 1062 * We do not support segment prefixes or REP*. 1063 1063 */ 1064 if (pCpu-> prefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE))1064 if (pCpu->fPrefix & (DISPREFIX_SEG | DISPREFIX_REP | DISPREFIX_REPNE)) 1065 1065 return VINF_IOM_R3_MMIO_READ_WRITE; /** @todo -> REM instead of HC */ 1066 1066 … … 2156 2156 } 2157 2157 2158 return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu-> prefix, (DISCPUMODE)pCpu->addrmode, cb);2158 return IOMInterpretINSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->addrmode, cb); 2159 2159 } 2160 2160 … … 2325 2325 } 2326 2326 2327 return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu-> prefix, (DISCPUMODE)pCpu->addrmode, cb);2327 return IOMInterpretOUTSEx(pVM, pRegFrame, Port, pCpu->fPrefix, (DISCPUMODE)pCpu->addrmode, cb); 2328 2328 } 2329 2329 -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r41733 r41734 108 108 if ( RT_SUCCESS(rc) 109 109 && pDis->mode == DISCPUMODE_32BIT /** @todo why does this matter? */ 110 && !(pDis-> prefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG)))110 && !(pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG))) 111 111 { 112 112 switch (pDis->bOpCode) -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r41732 r41734 793 793 case OP_MOVSWD: 794 794 case OP_STOSWD: 795 if ( pDis-> prefix == (DISPREFIX_REP|DISPREFIX_REX)795 if ( pDis->fPrefix == (DISPREFIX_REP|DISPREFIX_REX) 796 796 && pRegFrame->rcx >= 0x40 797 797 ) … … 1155 1155 * Simple instructions, no REP prefix. 1156 1156 */ 1157 if (!(pDis-> prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))1157 if (!(pDis->fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE))) 1158 1158 { 1159 1159 rc = pgmPoolAccessHandlerSimple(pVM, pVCpu, pPool, pPage, pDis, pRegFrame, GCPhysFault, pvFault, &fReused); … … 1204 1204 1205 1205 if ( pDis->mode == DISCPUMODE_32BIT 1206 && pDis-> prefix == DISPREFIX_REP1206 && pDis->fPrefix == DISPREFIX_REP 1207 1207 && pRegFrame->ecx <= 0x20 1208 1208 && pRegFrame->ecx * 4 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK) … … 1216 1216 else 1217 1217 if ( pDis->mode == DISCPUMODE_64BIT 1218 && pDis-> prefix == (DISPREFIX_REP | DISPREFIX_REX)1218 && pDis->fPrefix == (DISPREFIX_REP | DISPREFIX_REX) 1219 1219 && pRegFrame->rcx <= 0x20 1220 1220 && pRegFrame->rcx * 8 <= PAGE_SIZE - ((uintptr_t)pvFault & PAGE_OFFSET_MASK) … … 1238 1238 STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix)); 1239 1239 Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n", 1240 pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode, pDis-> prefix));1240 pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode, pDis->fPrefix)); 1241 1241 fNotReusedNotForking = true; 1242 1242 } -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r41732 r41734 2418 2418 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize)); 2419 2419 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite); 2420 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis-> prefix, (DISCPUMODE)pDis->addrmode, uIOSize);2420 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, uIOSize); 2421 2421 } 2422 2422 else … … 2424 2424 Log2(("IOMInterpretINSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, IoExitInfo.n.u16Port, uIOSize)); 2425 2425 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead); 2426 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis-> prefix, (DISCPUMODE)pDis->addrmode, uIOSize);2426 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), IoExitInfo.n.u16Port, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, uIOSize); 2427 2427 } 2428 2428 } -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r41732 r41734 3585 3585 X86EFLAGS eflags; 3586 3586 3587 if (pDis-> prefix & DISPREFIX_OPSIZE)3587 if (pDis->fPrefix & DISPREFIX_OPSIZE) 3588 3588 { 3589 3589 cbParm = 4; … … 3627 3627 X86EFLAGS eflags; 3628 3628 3629 if (pDis-> prefix & DISPREFIX_OPSIZE)3629 if (pDis->fPrefix & DISPREFIX_OPSIZE) 3630 3630 { 3631 3631 cbParm = 4; … … 3669 3669 uint16_t aIretFrame[3]; 3670 3670 3671 if (pDis-> prefix & (DISPREFIX_OPSIZE | DISPREFIX_ADDRSIZE))3671 if (pDis->fPrefix & (DISPREFIX_OPSIZE | DISPREFIX_ADDRSIZE)) 3672 3672 { 3673 3673 rc = VERR_EM_INTERPRETER; … … 4321 4321 Log2(("IOMInterpretOUTSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize)); 4322 4322 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringWrite); 4323 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis-> prefix, (DISCPUMODE)pDis->addrmode, cbSize);4323 rc = IOMInterpretOUTSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, cbSize); 4324 4324 } 4325 4325 else … … 4327 4327 Log2(("IOMInterpretINSEx %RGv %x size=%d\n", (RTGCPTR)pCtx->rip, uPort, cbSize)); 4328 4328 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitIOStringRead); 4329 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis-> prefix, (DISCPUMODE)pDis->addrmode, cbSize);4329 rc = IOMInterpretINSEx(pVM, CPUMCTX2CORE(pCtx), uPort, pDis->fPrefix, (DISCPUMODE)pDis->addrmode, cbSize); 4330 4330 } 4331 4331 } -
trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp
r41732 r41734 307 307 rcStrict = VINF_EM_RAW_EMULATE_INSTR; 308 308 309 if (!(Cpu. prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))309 if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE))) 310 310 { 311 311 switch (Cpu.pCurInstr->opcode) … … 326 326 } 327 327 } 328 else if (Cpu. prefix & DISPREFIX_REP)328 else if (Cpu.fPrefix & DISPREFIX_REP) 329 329 { 330 330 switch (Cpu.pCurInstr->opcode) -
trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
r41732 r41734 428 428 VBOXSTRICTRC rcStrict = VINF_EM_RAW_EMULATE_INSTR; 429 429 430 if (!(Cpu. prefix & (DISPREFIX_REP | DISPREFIX_REPNE)))430 if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE))) 431 431 { 432 432 switch (Cpu.pCurInstr->opcode) … … 447 447 } 448 448 } 449 else if (Cpu. prefix & DISPREFIX_REP)449 else if (Cpu.fPrefix & DISPREFIX_REP) 450 450 { 451 451 switch (Cpu.pCurInstr->opcode) -
trunk/src/VBox/VMM/VMMR3/PATM.cpp
r41732 r41734 1654 1654 */ 1655 1655 Log(("patmRecompileCallback: jump to code we've recompiled before %RRv!\n", pCurInstrGC)); 1656 return patmPatchGenRelJump(pVM, pPatch, pCurInstrGC, OP_JMP, !!(pCpu-> prefix & DISPREFIX_OPSIZE));1656 return patmPatchGenRelJump(pVM, pPatch, pCurInstrGC, OP_JMP, !!(pCpu->fPrefix & DISPREFIX_OPSIZE)); 1657 1657 } 1658 1658 … … 1713 1713 } 1714 1714 else 1715 rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->opcode, !!(pCpu-> prefix & DISPREFIX_OPSIZE));1715 rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->opcode, !!(pCpu->fPrefix & DISPREFIX_OPSIZE)); 1716 1716 1717 1717 if (RT_SUCCESS(rc)) … … 1855 1855 fGenerateJmpBack = false; 1856 1856 1857 rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu-> prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);1857 rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu->fPrefix & DISPREFIX_OPSIZE), fGenerateJmpBack); 1858 1858 if (RT_SUCCESS(rc)) 1859 1859 { … … 1873 1873 1874 1874 case OP_PUSHF: 1875 rc = patmPatchGenPushf(pVM, pPatch, !!(pCpu-> prefix & DISPREFIX_OPSIZE));1875 rc = patmPatchGenPushf(pVM, pPatch, !!(pCpu->fPrefix & DISPREFIX_OPSIZE)); 1876 1876 if (RT_SUCCESS(rc)) 1877 1877 rc = VWRN_CONTINUE_RECOMPILE; … … 1890 1890 case OP_IRET: 1891 1891 Log(("IRET at %RRv\n", pCurInstrGC)); 1892 rc = patmPatchGenIret(pVM, pPatch, pCurInstrGC, !!(pCpu-> prefix & DISPREFIX_OPSIZE));1892 rc = patmPatchGenIret(pVM, pPatch, pCurInstrGC, !!(pCpu->fPrefix & DISPREFIX_OPSIZE)); 1893 1893 if (RT_SUCCESS(rc)) 1894 1894 { -
trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp
r41732 r41734 702 702 offset = 0; 703 703 /* include prefix byte to make sure we don't use the incorrect selector register. */ 704 if (pCpu-> prefix & DISPREFIX_SEG)704 if (pCpu->fPrefix & DISPREFIX_SEG) 705 705 pPB[offset++] = DISQuerySegPrefixByte(pCpu); 706 706 pPB[offset++] = 0xFF; // push r/m32 707 707 pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm); 708 708 i = 2; /* standard offset of modrm bytes */ 709 if (pCpu-> prefix & DISPREFIX_OPSIZE)709 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 710 710 i++; //skip operand prefix 711 if (pCpu-> prefix & DISPREFIX_SEG)711 if (pCpu->fPrefix & DISPREFIX_SEG) 712 712 i++; //skip segment prefix 713 713 … … 798 798 offset = 0; 799 799 /* include prefix byte to make sure we don't use the incorrect selector register. */ 800 if (pCpu-> prefix & DISPREFIX_SEG)800 if (pCpu->fPrefix & DISPREFIX_SEG) 801 801 pPB[offset++] = DISQuerySegPrefixByte(pCpu); 802 802 … … 804 804 pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm); 805 805 i = 2; /* standard offset of modrm bytes */ 806 if (pCpu-> prefix & DISPREFIX_OPSIZE)806 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 807 807 i++; //skip operand prefix 808 if (pCpu-> prefix & DISPREFIX_SEG)808 if (pCpu->fPrefix & DISPREFIX_SEG) 809 809 i++; //skip segment prefix 810 810 … … 1277 1277 PATCHGEN_PROLOG_NODEF(pVM, pPatch); 1278 1278 offset = 0; 1279 if (pCpu-> prefix & DISPREFIX_OPSIZE)1279 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 1280 1280 pPB[offset++] = 0x66; /* size override -> 16 bits push */ 1281 1281 pPB[offset++] = 0x16; … … 1290 1290 PATCHGEN_PROLOG_NODEF(pVM, pPatch); 1291 1291 offset = 0; 1292 if (pCpu-> prefix & DISPREFIX_OPSIZE)1292 if (pCpu->fPrefix & DISPREFIX_OPSIZE) 1293 1293 pPB[offset++] = 0x66; /* size override -> 16 bits pop */ 1294 1294 pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen; … … 1321 1321 1322 1322 /** @todo segment prefix (untested) */ 1323 Assert(pCpu-> prefix == DISPREFIX_NONE || pCpu->prefix == DISPREFIX_OPSIZE);1323 Assert(pCpu->fPrefix == DISPREFIX_NONE || pCpu->fPrefix == DISPREFIX_OPSIZE); 1324 1324 1325 1325 PATCHGEN_PROLOG(pVM, pPatch); … … 1330 1330 // 8B 15 [32 bits addr] mov edx, CPUMCTX.tr/ldtr 1331 1331 1332 if (pCpu-> prefix == DISPREFIX_OPSIZE)1332 if (pCpu->fPrefix == DISPREFIX_OPSIZE) 1333 1333 pPB[offset++] = 0x66; 1334 1334 … … 1361 1361 pPB[offset++] = 0x52; // push edx 1362 1362 1363 if (pCpu-> prefix == DISPREFIX_SEG)1363 if (pCpu->fPrefix == DISPREFIX_SEG) 1364 1364 { 1365 1365 pPB[offset++] = DISQuerySegPrefixByte(pCpu); … … 1370 1370 1371 1371 i = 3; /* standard offset of modrm bytes */ 1372 if (pCpu-> prefix == DISPREFIX_OPSIZE)1372 if (pCpu->fPrefix == DISPREFIX_OPSIZE) 1373 1373 i++; //skip operand prefix 1374 if (pCpu-> prefix == DISPREFIX_SEG)1374 if (pCpu->fPrefix == DISPREFIX_SEG) 1375 1375 i++; //skip segment prefix 1376 1376 … … 1421 1421 1422 1422 /* @todo segment prefix (untested) */ 1423 Assert(pCpu-> prefix == DISPREFIX_NONE);1423 Assert(pCpu->fPrefix == DISPREFIX_NONE); 1424 1424 1425 1425 // sgdt %Ms … … 1456 1456 pPB[offset++] = 0x52; // push edx 1457 1457 1458 if (pCpu-> prefix == DISPREFIX_SEG)1458 if (pCpu->fPrefix == DISPREFIX_SEG) 1459 1459 { 1460 1460 pPB[offset++] = DISQuerySegPrefixByte(pCpu); … … 1465 1465 1466 1466 i = 3; /* standard offset of modrm bytes */ 1467 if (pCpu-> prefix == DISPREFIX_OPSIZE)1467 if (pCpu->fPrefix == DISPREFIX_OPSIZE) 1468 1468 i++; //skip operand prefix 1469 if (pCpu-> prefix == DISPREFIX_SEG)1469 if (pCpu->fPrefix == DISPREFIX_SEG) 1470 1470 i++; //skip segment prefix 1471 1471 rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i); -
trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
r41732 r41734 542 542 * Speed up dtrace and don't entrust invalid lock sequences to the recompiler. 543 543 */ 544 else if (Cpu. prefix & DISPREFIX_LOCK)544 else if (Cpu.fPrefix & DISPREFIX_LOCK) 545 545 { 546 546 Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
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