Changeset 41734 in vbox for trunk/src/VBox/VMM/VMMAll/EMAll.cpp
- Timestamp:
- Jun 15, 2012 12:20:13 AM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 78542
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41732 r41734 789 789 case OP_LMSW: return "Lmsw"; 790 790 case OP_SMSW: return "Smsw"; 791 case OP_CMPXCHG: return pDis-> prefix & DISPREFIX_LOCK ? "Lock CmpXchg" : "CmpXchg";792 case OP_CMPXCHG8B: return pDis-> prefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";791 case OP_CMPXCHG: return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg" : "CmpXchg"; 792 case OP_CMPXCHG8B: return pDis->fPrefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b"; 793 793 794 794 default: … … 1652 1652 1653 1653 /* Don't support any but these three prefix bytes. */ 1654 if ((pDis-> prefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX)))1654 if ((pDis->fPrefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX))) 1655 1655 return VERR_EM_INTERPRETER; 1656 1656 … … 1693 1693 offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cbSize : (signed)cbSize; 1694 1694 1695 if (!(pDis-> prefix & DISPREFIX_REP))1695 if (!(pDis->fPrefix & DISPREFIX_REP)) 1696 1696 { 1697 1697 LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize)); … … 1848 1848 LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pDis), GCPtrPar1, pRegFrame->rax, valpar)); 1849 1849 1850 if (pDis-> prefix & DISPREFIX_LOCK)1850 if (pDis->fPrefix & DISPREFIX_LOCK) 1851 1851 eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb); 1852 1852 else … … 1901 1901 LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pDis), pvParam1, pRegFrame->eax)); 1902 1902 1903 if (pDis-> prefix & DISPREFIX_LOCK)1903 if (pDis->fPrefix & DISPREFIX_LOCK) 1904 1904 eflags = EMEmulateLockCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx); 1905 1905 else … … 1970 1970 LogFlow(("XAdd %RGv=%p reg=%08llx\n", GCPtrPar1, pvParam1, *(uint64_t *)pvParamReg2)); 1971 1971 1972 if (pDis-> prefix & DISPREFIX_LOCK)1972 if (pDis->fPrefix & DISPREFIX_LOCK) 1973 1973 eflags = EMEmulateLockXAdd(pvParam1, pvParamReg2, cbParamReg2); 1974 1974 else … … 2654 2654 AssertRCReturn(rc, VERR_EM_INTERPRETER); 2655 2655 2656 if (!(pDis-> prefix & DISPREFIX_OPSIZE))2656 if (!(pDis->fPrefix & DISPREFIX_OPSIZE)) 2657 2657 dtr32.uAddr &= 0xffffff; /* 16 bits operand size */ 2658 2658 … … 3030 3030 /* Note: The Intel manual claims there's a REX version of RDMSR that's slightly 3031 3031 different, so we play safe by completely disassembling the instruction. */ 3032 Assert(!(pDis-> prefix & DISPREFIX_REX));3032 Assert(!(pDis->fPrefix & DISPREFIX_REX)); 3033 3033 NOREF(pDis); NOREF(pvFault); NOREF(pcbSize); 3034 3034 return EMInterpretRdmsr(pVM, pVCpu, pRegFrame); … … 3104 3104 3105 3105 #ifdef IN_RC 3106 if ( (pDis-> prefix & (DISPREFIX_REPNE | DISPREFIX_REP))3107 || ( (pDis-> prefix & DISPREFIX_LOCK)3106 if ( (pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP)) 3107 || ( (pDis->fPrefix & DISPREFIX_LOCK) 3108 3108 && pDis->pCurInstr->opcode != OP_CMPXCHG 3109 3109 && pDis->pCurInstr->opcode != OP_CMPXCHG8B … … 3116 3116 ) 3117 3117 #else 3118 if ( (pDis-> prefix & DISPREFIX_REPNE)3119 || ( (pDis-> prefix & DISPREFIX_REP)3118 if ( (pDis->fPrefix & DISPREFIX_REPNE) 3119 || ( (pDis->fPrefix & DISPREFIX_REP) 3120 3120 && pDis->pCurInstr->opcode != OP_STOSWD 3121 3121 ) 3122 || ( (pDis-> prefix & DISPREFIX_LOCK)3122 || ( (pDis->fPrefix & DISPREFIX_LOCK) 3123 3123 && pDis->pCurInstr->opcode != OP_OR 3124 3124 && pDis->pCurInstr->opcode != OP_AND … … 3228 3228 # define INTERPRET_CASE_EX_LOCK_PARAM3(opcode, Instr, InstrFn, pfnEmulate, pfnEmulateLock) \ 3229 3229 case opcode:\ 3230 if (pDis-> prefix & DISPREFIX_LOCK) \3230 if (pDis->fPrefix & DISPREFIX_LOCK) \ 3231 3231 rc = emInterpretLock##InstrFn(pVM, pVCpu, pDis, pRegFrame, pvFault, pcbSize, pfnEmulateLock); \ 3232 3232 else \
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