VirtualBox

Changeset 41737 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Jun 15, 2012 1:01:49 AM (13 years ago)
Author:
vboxsync
Message:

DISOPCODE: s/opcode/uOpcode/

Location:
trunk/src/VBox/VMM
Files:
15 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41736 r41737  
    749749static const char *emGetMnemonic(PDISCPUSTATE pDis)
    750750{
    751     switch (pDis->pCurInstr->opcode)
     751    switch (pDis->pCurInstr->uOpcode)
    752752    {
    753753        case OP_XCHG:       return "Xchg";
    … …  
    793793
    794794        default:
    795             Log(("Unknown opcode %d\n", pDis->pCurInstr->opcode));
     795            Log(("Unknown opcode %d\n", pDis->pCurInstr->uOpcode));
    796796            return "???";
    797797    }
    … …  
    26572657        dtr32.uAddr &= 0xffffff; /* 16 bits operand size */
    26582658
    2659     if (pDis->pCurInstr->opcode == OP_LIDT)
     2659    if (pDis->pCurInstr->uOpcode == OP_LIDT)
    26602660        CPUMSetGuestIDTR(pVCpu, dtr32.uAddr, dtr32.cb);
    26612661    else
    … …  
    30933093        uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
    30943094        if (    cpl != 0
    3095             &&  pDis->pCurInstr->opcode != OP_RDTSC)    /* rdtsc requires emulation in ring 3 as well */
     3095            &&  pDis->pCurInstr->uOpcode != OP_RDTSC)    /* rdtsc requires emulation in ring 3 as well */
    30963096        {
    30973097            Log(("WARNING: refusing instruction emulation for user-mode code!!\n"));
    … …  
    31063106    if (    (pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP))
    31073107        ||  (   (pDis->fPrefix & DISPREFIX_LOCK)
    3108              && pDis->pCurInstr->opcode != OP_CMPXCHG
    3109              && pDis->pCurInstr->opcode != OP_CMPXCHG8B
    3110              && pDis->pCurInstr->opcode != OP_XADD
    3111              && pDis->pCurInstr->opcode != OP_OR
    3112              && pDis->pCurInstr->opcode != OP_AND
    3113              && pDis->pCurInstr->opcode != OP_XOR
    3114              && pDis->pCurInstr->opcode != OP_BTR
     3108             && pDis->pCurInstr->uOpcode != OP_CMPXCHG
     3109             && pDis->pCurInstr->uOpcode != OP_CMPXCHG8B
     3110             && pDis->pCurInstr->uOpcode != OP_XADD
     3111             && pDis->pCurInstr->uOpcode != OP_OR
     3112             && pDis->pCurInstr->uOpcode != OP_AND
     3113             && pDis->pCurInstr->uOpcode != OP_XOR
     3114             && pDis->pCurInstr->uOpcode != OP_BTR
    31153115            )
    31163116       )
    … …  
    31183118    if (    (pDis->fPrefix & DISPREFIX_REPNE)
    31193119        ||  (   (pDis->fPrefix & DISPREFIX_REP)
    3120              && pDis->pCurInstr->opcode != OP_STOSWD
     3120             && pDis->pCurInstr->uOpcode != OP_STOSWD
    31213121            )
    31223122        ||  (   (pDis->fPrefix & DISPREFIX_LOCK)
    3123              && pDis->pCurInstr->opcode != OP_OR
    3124              && pDis->pCurInstr->opcode != OP_AND
    3125              && pDis->pCurInstr->opcode != OP_XOR
    3126              && pDis->pCurInstr->opcode != OP_BTR
    3127              && pDis->pCurInstr->opcode != OP_CMPXCHG
    3128              && pDis->pCurInstr->opcode != OP_CMPXCHG8B
     3123             && pDis->pCurInstr->uOpcode != OP_OR
     3124             && pDis->pCurInstr->uOpcode != OP_AND
     3125             && pDis->pCurInstr->uOpcode != OP_XOR
     3126             && pDis->pCurInstr->uOpcode != OP_BTR
     3127             && pDis->pCurInstr->uOpcode != OP_CMPXCHG
     3128             && pDis->pCurInstr->uOpcode != OP_CMPXCHG8B
    31293129            )
    31303130       )
    … …  
    31443144        &&  CPUMIsGuestIn64BitCode(pVCpu, pRegFrame))
    31453145    {
    3146         uint32_t uOpCode = pDis->pCurInstr->opcode;
     3146        uint32_t uOpCode = pDis->pCurInstr->uOpcode;
    31473147        if (    uOpCode != OP_STOSWD
    31483148            &&  uOpCode != OP_MOV
    … …  
    31653165        {
    31663166# ifdef VBOX_WITH_STATISTICS
    3167             switch (pDis->pCurInstr->opcode)
     3167            switch (pDis->pCurInstr->uOpcode)
    31683168            {
    31693169#  define INTERPRET_FAILED_CASE(opcode, Instr) \
    … …  
    32213221    LogFlow(("emInterpretInstructionCPU %s\n", emGetMnemonic(pDis)));
    32223222#endif
    3223     switch (pDis->pCurInstr->opcode)
     3223    switch (pDis->pCurInstr->uOpcode)
    32243224    {
    32253225        /*
    … …  
    33293329
    33303330        default:
    3331             Log3(("emInterpretInstructionCPU: opcode=%d\n", pDis->pCurInstr->opcode));
     3331            Log3(("emInterpretInstructionCPU: opcode=%d\n", pDis->pCurInstr->uOpcode));
    33323332            STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,FailedMisc));
    33333333            return VERR_EM_INTERPRETER;

  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r41735 r41737  
    549549         */
    550550        /** @todo checkup MOVSX implementation! */
    551         if (pCpu->pCurInstr->opcode == OP_MOVSX)
     551        if (pCpu->pCurInstr->uOpcode == OP_MOVSX)
    552552        {
    553553            if (cb == 1)
    … …  
    11771177    const char *pszInstr;
    11781178
    1179     if (pCpu->pCurInstr->opcode == OP_XOR)
     1179    if (pCpu->pCurInstr->uOpcode == OP_XOR)
    11801180        pszInstr = "Xor";
    1181     else if (pCpu->pCurInstr->opcode == OP_OR)
     1181    else if (pCpu->pCurInstr->uOpcode == OP_OR)
    11821182        pszInstr = "Or";
    1183     else if (pCpu->pCurInstr->opcode == OP_AND)
     1183    else if (pCpu->pCurInstr->uOpcode == OP_AND)
    11841184        pszInstr = "And";
    11851185    else
    … …  
    15281528        return rc;
    15291529    }
    1530     switch (pDis->pCurInstr->opcode)
     1530    switch (pDis->pCurInstr->uOpcode)
    15311531    {
    15321532        case OP_MOV:
    … …  
    21442144    RTIOPORT    Port = pRegFrame->edx & 0xffff;
    21452145    unsigned    cb = 0;
    2146     if (pCpu->pCurInstr->opcode == OP_INSB)
     2146    if (pCpu->pCurInstr->uOpcode == OP_INSB)
    21472147        cb = 1;
    21482148    else
    … …  
    23132313    bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &Port, &cb);
    23142314    AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
    2315     if (pCpu->pCurInstr->opcode == OP_OUTSB)
     2315    if (pCpu->pCurInstr->uOpcode == OP_OUTSB)
    23162316        cb = 1;
    23172317    else

  • trunk/src/VBox/VMM/VMMAll/PATMAll.cpp

    r40280 r41737  
    381381    PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(VMMGetCpu0(pVM));
    382382
    383     if (pCpu->pCurInstr->opcode == OP_SYSENTER)
     383    if (pCpu->pCurInstr->uOpcode == OP_SYSENTER)
    384384    {
    385385        if (    pCtx->SysEnter.cs == 0
    … …  
    409409    }
    410410    else
    411     if (pCpu->pCurInstr->opcode == OP_SYSEXIT)
     411    if (pCpu->pCurInstr->uOpcode == OP_SYSEXIT)
    412412    {
    413413        if (    pCtx->SysEnter.cs == 0
    … …  
    429429    }
    430430    else
    431     if (pCpu->pCurInstr->opcode == OP_SYSCALL)
     431    if (pCpu->pCurInstr->uOpcode == OP_SYSCALL)
    432432    {
    433433        /** @todo implement syscall */
    434434    }
    435435    else
    436     if (pCpu->pCurInstr->opcode == OP_SYSRET)
     436    if (pCpu->pCurInstr->uOpcode == OP_SYSRET)
    437437    {
    438438        /** @todo implement sysret */

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r41736 r41737  
    721721     *      do_fork
    722722     */
    723     if (    pDis->pCurInstr->opcode == OP_BTR
     723    if (    pDis->pCurInstr->uOpcode == OP_BTR
    724724        &&  !(offFault & 4)
    725725        /** @todo Validate that the bit index is X86_PTE_RW. */
    … …  
    761761#endif
    762762
    763     LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->opcode, pvFault, pDis->param1.fUse,  pDis->param1.base.reg_gen));
     763    LogFlow(("Reused instr %RGv %d at %RGv param1.fUse=%llx param1.reg=%d\n", pRegFrame->rip, pDis->pCurInstr->uOpcode, pvFault, pDis->param1.fUse,  pDis->param1.base.reg_gen));
    764764
    765765    /* Non-supervisor mode write means it's used for something else. */
    … …  
    767767        return true;
    768768
    769     switch (pDis->pCurInstr->opcode)
     769    switch (pDis->pCurInstr->uOpcode)
    770770    {
    771771        /* call implies the actual push of the return address faulted */
    … …  
    990990    {
    991991        LogFlow(("pgmPoolAccessHandlerPTWorker: Interpretation failed for %04x:%RGv - opcode=%d\n",
    992                   pRegFrame->cs, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode));
     992                  pRegFrame->cs, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->uOpcode));
    993993        rc = VINF_EM_RAW_EMULATE_INSTR;
    994994        STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,EmulateInstr));
    … …  
    11661166            if (   rc == VINF_SUCCESS
    11671167                && !pPage->cLocked                      /* only applies to unlocked pages as we can't free locked ones (e.g. cr3 root). */
    1168                 && pDis->pCurInstr->opcode == OP_MOV
     1168                && pDis->pCurInstr->uOpcode == OP_MOV
    11691169                && (pvFault & PAGE_OFFSET_MASK) == 0)
    11701170            {
    … …  
    11961196         * We have to deal with these or we'll kill the cache and performance.
    11971197         */
    1198         if (    pDis->pCurInstr->opcode == OP_STOSWD
     1198        if (    pDis->pCurInstr->uOpcode == OP_STOSWD
    11991199            &&  !pRegFrame->eflags.Bits.u1DF
    12001200            &&  pDis->uOpMode == pDis->uCpuMode
    … …  
    12381238        STAM_COUNTER_INC(&pPool->CTX_MID_Z(StatMonitor,RepPrefix));
    12391239        Log4(("pgmPoolAccessHandler: eax=%#x ecx=%#x edi=%#x esi=%#x rip=%RGv opcode=%d prefix=%#x\n",
    1240               pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->opcode, pDis->fPrefix));
     1240              pRegFrame->eax, pRegFrame->ecx, pRegFrame->edi, pRegFrame->esi, (RTGCPTR)pRegFrame->rip, pDis->pCurInstr->uOpcode, pDis->fPrefix));
    12411241        fNotReusedNotForking = true;
    12421242    }

  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r41736 r41737  
    29842984            pDis->uCpuMode = enmMode;
    29852985            rc = EMInterpretDisasOneEx(pVM, pVCpu, pbCode, pRegFrame, pDis, &cbOp);
    2986             Assert(RT_FAILURE(rc) || pDis->pCurInstr->opcode == OP_INVLPG);
    2987             if (RT_SUCCESS(rc) && pDis->pCurInstr->opcode == OP_INVLPG)
     2986            Assert(RT_FAILURE(rc) || pDis->pCurInstr->uOpcode == OP_INVLPG);
     2987            if (RT_SUCCESS(rc) && pDis->pCurInstr->uOpcode == OP_INVLPG)
    29882988            {
    29892989                Assert(cbOp == pDis->cbInstr);

  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r41735 r41737  
    35543554                    rc = VINF_SUCCESS;
    35553555                    Assert(cbOp == pDis->cbInstr);
    3556                     switch (pDis->pCurInstr->opcode)
     3556                    switch (pDis->pCurInstr->uOpcode)
    35573557                    {
    35583558                    case OP_CLI:

  • trunk/src/VBox/VMM/VMMR3/CSAM.cpp

    r41732 r41737  
    797797    NOREF(pInstrGC);
    798798
    799     switch (pCpu->pCurInstr->opcode)
     799    switch (pCpu->pCurInstr->uOpcode)
    800800    {
    801801    case OP_INT:
    … …  
    821821
    822822    // Check for exit points
    823     switch (pCpu->pCurInstr->opcode)
     823    switch (pCpu->pCurInstr->uOpcode)
    824824    {
    825825    /* It's not a good idea to patch pushf instructions:
    … …  
    897897    case OP_IRET:
    898898#ifdef DEBUG
    899         switch(pCpu->pCurInstr->opcode)
     899        switch(pCpu->pCurInstr->uOpcode)
    900900        {
    901901        case OP_STR:
    … …  
    947947            }
    948948        }
    949         if (pCpu->pCurInstr->opcode == OP_IRET)
     949        if (pCpu->pCurInstr->uOpcode == OP_IRET)
    950950            return VINF_SUCCESS;    /* Look no further in this branch. */
    951951
    … …  
    959959        {
    960960#ifdef DEBUG
    961             switch(pCpu->pCurInstr->opcode)
     961            switch(pCpu->pCurInstr->uOpcode)
    962962            {
    963963            case OP_JMP:
    … …  
    10841084                }
    10851085
    1086                 switch (cpu.pCurInstr->opcode)
     1086                switch (cpu.pCurInstr->uOpcode)
    10871087                {
    10881088                case OP_NOP:
    … …  
    13141314        /* Remember the address of the instruction following the ret in case the parent instruction was a call. */
    13151315        if (    pCacheRec->pCallExitRec
    1316             &&  cpu.pCurInstr->opcode == OP_RETN
     1316            &&  cpu.pCurInstr->uOpcode == OP_RETN
    13171317            &&  pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
    13181318        {
    … …  
    13281328        // For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
    13291329        if (    ((cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
    1330             ||  (cpu.pCurInstr->opcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32))  /* simple indirect call (call dword ptr [address]) */
     1330            ||  (cpu.pCurInstr->uOpcode == OP_CALL && cpu.param1.fUse == DISUSE_DISPLACEMENT32))  /* simple indirect call (call dword ptr [address]) */
    13311331        {
    13321332            /* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
    1333             if (    cpu.pCurInstr->opcode == OP_CALL
     1333            if (    cpu.pCurInstr->uOpcode == OP_CALL
    13341334                &&  cpu.param1.fUse == DISUSE_DISPLACEMENT32)
    13351335            {
    … …  
    13791379                    Assert(pPage);
    13801380                }
    1381                 if (cpu.pCurInstr->opcode == OP_CALL)
     1381                if (cpu.pCurInstr->uOpcode == OP_CALL)
    13821382                    rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
    13831383                else
    … …  
    13881388                }
    13891389            }
    1390             if (cpu.pCurInstr->opcode == OP_JMP)
     1390            if (cpu.pCurInstr->uOpcode == OP_JMP)
    13911391            {//unconditional jump; return to caller
    13921392                rc = VINF_SUCCESS;
    … …  
    13981398#ifdef CSAM_SCAN_JUMP_TABLE
    13991399        else
    1400         if (    cpu.pCurInstr->opcode == OP_JMP
     1400        if (    cpu.pCurInstr->uOpcode == OP_JMP
    14011401            &&  (cpu.param1.fUse & (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)) == (DISUSE_DISPLACEMENT32|DISUSE_INDEX|DISUSE_SCALE)
    14021402           )
    … …  
    14581458        }
    14591459next_please:
    1460         if (cpu.pCurInstr->opcode == OP_JMP)
     1460        if (cpu.pCurInstr->uOpcode == OP_JMP)
    14611461        {
    14621462            rc = VINF_SUCCESS;
    … …  
    25662566                    rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
    25672567                    if (    rc == VINF_SUCCESS
    2568                         &&  cpu.pCurInstr->opcode == OP_PUSH
     2568                        &&  cpu.pCurInstr->uOpcode == OP_PUSH
    25692569                        &&  cpu.pCurInstr->param1 == OP_PARM_REG_CS)
    25702570                    {

  • trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp

    r41734 r41737  
    201201    if (RT_SUCCESS(rc))
    202202    {
    203         switch (Cpu.pCurInstr->opcode)
     203        switch (Cpu.pCurInstr->uOpcode)
    204204        {
    205205        /* @todo we can do more now */
    … …  
    309309        if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
    310310        {
    311             switch (Cpu.pCurInstr->opcode)
     311            switch (Cpu.pCurInstr->uOpcode)
    312312            {
    313313                case OP_IN:
    … …  
    328328        else if (Cpu.fPrefix & DISPREFIX_REP)
    329329        {
    330             switch (Cpu.pCurInstr->opcode)
     330            switch (Cpu.pCurInstr->uOpcode)
    331331            {
    332332                case OP_INSB:

  • trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

    r41734 r41737  
    430430        if (!(Cpu.fPrefix & (DISPREFIX_REP | DISPREFIX_REPNE)))
    431431        {
    432             switch (Cpu.pCurInstr->opcode)
     432            switch (Cpu.pCurInstr->uOpcode)
    433433            {
    434434                case OP_IN:
    … …  
    449449        else if (Cpu.fPrefix & DISPREFIX_REP)
    450450        {
    451             switch (Cpu.pCurInstr->opcode)
     451            switch (Cpu.pCurInstr->uOpcode)
    452452            {
    453453                case OP_INSB:
    … …  
    596596        rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &cpu, "Guest Trap (#UD): ");
    597597        if (    RT_SUCCESS(rc)
    598             && (cpu.pCurInstr->opcode == OP_MONITOR || cpu.pCurInstr->opcode == OP_MWAIT))
     598            && (cpu.pCurInstr->uOpcode == OP_MONITOR || cpu.pCurInstr->uOpcode == OP_MWAIT))
    599599        {
    600600            uint32_t u32Dummy, u32Features, u32ExtFeatures;
    … …  
    679679    if (RT_SUCCESS(rc))
    680680    {
    681         if (Cpu.pCurInstr->opcode == OP_SYSENTER)
     681        if (Cpu.pCurInstr->uOpcode == OP_SYSENTER)
    682682        {
    683683            if (pCtx->SysEnter.cs != 0)
    … …  
    694694
    695695#ifdef VBOX_WITH_STATISTICS
    696         switch (Cpu.pCurInstr->opcode)
     696        switch (Cpu.pCurInstr->uOpcode)
    697697        {
    698698            case OP_SYSENTER:
    … …  
    776776        rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->eip, &Cpu, "Patch code: ");
    777777        if (    RT_SUCCESS(rc)
    778             &&  Cpu.pCurInstr->opcode == OP_IRET)
     778            &&  Cpu.pCurInstr->uOpcode == OP_IRET)
    779779        {
    780780            uint32_t eip, selCS, uEFlags;
    … …  
    965965#ifdef VBOX_WITH_STATISTICS
    966966        PEMSTATS pStats = pVCpu->em.s.CTX_SUFF(pStats);
    967         switch (Cpu.pCurInstr->opcode)
     967        switch (Cpu.pCurInstr->uOpcode)
    968968        {
    969969            case OP_INVLPG:
    … …  
    10351035            default:
    10361036                STAM_COUNTER_INC(&pStats->StatMisc);
    1037                 Log4(("emR3RawPrivileged: opcode=%d\n", Cpu.pCurInstr->opcode));
     1037                Log4(("emR3RawPrivileged: opcode=%d\n", Cpu.pCurInstr->uOpcode));
    10381038                break;
    10391039        }
    … …  
    10441044        {
    10451045            STAM_PROFILE_START(&pVCpu->em.s.StatPrivEmu, a);
    1046             switch (Cpu.pCurInstr->opcode)
     1046            switch (Cpu.pCurInstr->uOpcode)
    10471047            {
    10481048                case OP_CLI:
    … …  
    10991099                        STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
    11001100
    1101                         if (    Cpu.pCurInstr->opcode == OP_MOV_CR
     1101                        if (    Cpu.pCurInstr->uOpcode == OP_MOV_CR
    11021102                            &&  Cpu.param1.fUse == DISUSE_REG_CR /* write */
    11031103                           )

  • trunk/src/VBox/VMM/VMMR3/HWACCM.cpp

    r41727 r41737  
    18201820    AssertRC(rc);
    18211821    if (    rc == VINF_SUCCESS
    1822         &&  pDis->pCurInstr->opcode == OP_MOV
     1822        &&  pDis->pCurInstr->uOpcode == OP_MOV
    18231823        &&  cbOp >= 3)
    18241824    {
    … …  
    18711871            pCtx->rip = oldrip;
    18721872            if (    rc == VINF_SUCCESS
    1873                 &&  pDis->pCurInstr->opcode == OP_SHR
     1873                &&  pDis->pCurInstr->uOpcode == OP_SHR
    18741874                &&  pDis->param1.fUse == DISUSE_REG_GEN32
    18751875                &&  pDis->param1.base.reg_gen == uMmioReg
    … …  
    19861986    AssertRC(rc);
    19871987    if (    rc == VINF_SUCCESS
    1988         &&  pDis->pCurInstr->opcode == OP_MOV
     1988        &&  pDis->pCurInstr->uOpcode == OP_MOV
    19891989        &&  cbOp >= 5)
    19901990    {

  • trunk/src/VBox/VMM/VMMR3/PATM.cpp

    r41736 r41737  
    13961396        /* No unconditional jumps or calls without fixed displacements. */
    13971397        if (    (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    1398              && (pCpu->pCurInstr->opcode == OP_JMP || pCpu->pCurInstr->opcode == OP_CALL)
     1398             && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL)
    13991399           )
    14001400        {
    14011401            Assert(pCpu->param1.cb <= 4 || pCpu->param1.cb == 6);
    14021402            if (    pCpu->param1.cb == 6 /* far call/jmp */
    1403                 ||  (pCpu->pCurInstr->opcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
     1403                ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
    14041404                ||  (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
    14051405               )
    … …  
    14111411
    14121412        /* An unconditional (short) jump right after a cli is a potential problem; we will overwrite whichever function comes afterwards */
    1413         if (pPatch->opcode == OP_CLI && pCpu->pCurInstr->opcode == OP_JMP)
     1413        if (pPatch->opcode == OP_CLI && pCpu->pCurInstr->uOpcode == OP_JMP)
    14141414        {
    14151415            if (   pCurInstrGC > pPatch->pPrivInstrGC
    … …  
    14251425        if (pPatch->opcode == OP_PUSHF)
    14261426        {
    1427             if (pCurInstrGC != pInstrGC && pCpu->pCurInstr->opcode == OP_PUSHF)
     1427            if (pCurInstrGC != pInstrGC && pCpu->pCurInstr->uOpcode == OP_PUSHF)
    14281428            {
    14291429                fIllegalInstr = true;
    … …  
    14331433
    14341434        /* no far returns */
    1435         if (pCpu->pCurInstr->opcode == OP_RETF)
     1435        if (pCpu->pCurInstr->uOpcode == OP_RETF)
    14361436        {
    14371437            pPatch->pTempInfo->nrRetInstr++;
    … …  
    14391439            patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC);
    14401440        }
    1441         else if (   pCpu->pCurInstr->opcode == OP_INT3
    1442                  || pCpu->pCurInstr->opcode == OP_INT
    1443                  || pCpu->pCurInstr->opcode == OP_INTO)
     1441        else if (   pCpu->pCurInstr->uOpcode == OP_INT3
     1442                 || pCpu->pCurInstr->uOpcode == OP_INT
     1443                 || pCpu->pCurInstr->uOpcode == OP_INTO)
    14441444        {
    14451445            /* No int xx or into either. */
    … …  
    14561456
    14571457    /* Check for exit points. */
    1458     switch (pCpu->pCurInstr->opcode)
     1458    switch (pCpu->pCurInstr->uOpcode)
    14591459    {
    14601460    case OP_SYSEXIT:
    … …  
    14781478        if (pPatch->opcode == OP_PUSHF)
    14791479        {
    1480             if (pCpu->pCurInstr->opcode == OP_POPF)
     1480            if (pCpu->pCurInstr->uOpcode == OP_POPF)
    14811481            {
    14821482                if (pPatch->cbPatchBlockSize >= SIZEOF_NEARJUMP32)
    … …  
    15551555        // no unconditional jumps or calls without fixed displacements
    15561556        if (    (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    1557              && (pCpu->pCurInstr->opcode == OP_JMP || pCpu->pCurInstr->opcode == OP_CALL)
     1557             && (pCpu->pCurInstr->uOpcode == OP_JMP || pCpu->pCurInstr->uOpcode == OP_CALL)
    15581558           )
    15591559        {
    15601560            Assert(pCpu->param1.cb <= 4 || pCpu->param1.cb == 6);
    15611561            if (    pCpu->param1.cb == 6 /* far call/jmp */
    1562                 ||  (pCpu->pCurInstr->opcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
     1562                ||  (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
    15631563                ||  (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J && !(pPatch->flags & PATMFL_SUPPORT_INDIRECT_CALLS))
    15641564               )
    … …  
    15691569        }
    15701570        else /* no far returns */
    1571         if (pCpu->pCurInstr->opcode == OP_RETF)
     1571        if (pCpu->pCurInstr->uOpcode == OP_RETF)
    15721572        {
    15731573            patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC);
    … …  
    15751575        }
    15761576        else /* no int xx or into either */
    1577         if (pCpu->pCurInstr->opcode == OP_INT3 || pCpu->pCurInstr->opcode == OP_INT || pCpu->pCurInstr->opcode == OP_INTO)
     1577        if (pCpu->pCurInstr->uOpcode == OP_INT3 || pCpu->pCurInstr->uOpcode == OP_INT || pCpu->pCurInstr->uOpcode == OP_INTO)
    15781578        {
    15791579            patmAddIllegalInstrRecord(pVM, pPatch, pCurInstrGC);
    … …  
    15831583    #if 0
    15841584        ///@todo we can handle certain in/out and privileged instructions in the guest context
    1585         if (pCpu->pCurInstr->optype & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->opcode != OP_STI)
     1585        if (pCpu->pCurInstr->optype & DISOPTYPE_PRIVILEGED && pCpu->pCurInstr->uOpcode != OP_STI)
    15861586        {
    15871587            Log(("Illegal instructions for function patch!!\n"));
    … …  
    16001600
    16011601    // Check for exit points
    1602     switch (pCpu->pCurInstr->opcode)
     1602    switch (pCpu->pCurInstr->uOpcode)
    16031603    {
    16041604    case OP_ILLUD2:
    … …  
    16951695     */
    16961696    if (   (pCpu->pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    1697         && (pCpu->pCurInstr->opcode != OP_CALL || (pPatch->flags & PATMFL_SUPPORT_CALLS))
     1697        && (pCpu->pCurInstr->uOpcode != OP_CALL || (pPatch->flags & PATMFL_SUPPORT_CALLS))
    16981698        && (OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J))
    16991699    {
    … …  
    17051705        }
    17061706
    1707         if (pCpu->pCurInstr->opcode == OP_CALL)
     1707        if (pCpu->pCurInstr->uOpcode == OP_CALL)
    17081708        {
    17091709            Assert(!PATMIsPatchGCAddr(pVM, pTargetGC));
    … …  
    17131713        }
    17141714        else
    1715             rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->opcode, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
     1715            rc = patmPatchGenRelJump(pVM, pPatch, pTargetGC, pCpu->pCurInstr->uOpcode, !!(pCpu->fPrefix & DISPREFIX_OPSIZE));
    17161716
    17171717        if (RT_SUCCESS(rc))
    … …  
    17211721    }
    17221722
    1723     switch (pCpu->pCurInstr->opcode)
     1723    switch (pCpu->pCurInstr->uOpcode)
    17241724    {
    17251725    case OP_CLI:
    … …  
    21212121    NOREF(pInstrGC);
    21222122
    2123     if (pCpu->pCurInstr->opcode == OP_INT3)
     2123    if (pCpu->pCurInstr->uOpcode == OP_INT3)
    21242124    {
    21252125        /* Could be an int3 inserted in a call patch. Check to be sure */
    … …  
    21332133
    21342134            bool disret = patmR3DisInstr(pVM, pPatch, pOrgJumpGC, pOrgJumpHC, PATMREAD_ORGCODE, &cpu, NULL);
    2135             if (!disret || cpu.pCurInstr->opcode != OP_CALL || cpu.param1.cb != 4 /* only near calls */)
     2135            if (!disret || cpu.pCurInstr->uOpcode != OP_CALL || cpu.param1.cb != 4 /* only near calls */)
    21362136                return VINF_SUCCESS;
    21372137        }
    … …  
    21392139    }
    21402140
    2141     if (    pCpu->pCurInstr->opcode == OP_ILLUD2
     2141    if (    pCpu->pCurInstr->uOpcode == OP_ILLUD2
    21422142        &&  PATMIsPatchGCAddr(pVM, pCurInstrGC))
    21432143    {
    … …  
    21462146    }
    21472147
    2148     if (   (pCpu->pCurInstr->opcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
    2149         || pCpu->pCurInstr->opcode == OP_INT
    2150         || pCpu->pCurInstr->opcode == OP_IRET
    2151         || pCpu->pCurInstr->opcode == OP_RETN
    2152         || pCpu->pCurInstr->opcode == OP_RETF
     2148    if (   (pCpu->pCurInstr->uOpcode == OP_CALL && !(pPatch->flags & PATMFL_SUPPORT_CALLS))
     2149        || pCpu->pCurInstr->uOpcode == OP_INT
     2150        || pCpu->pCurInstr->uOpcode == OP_IRET
     2151        || pCpu->pCurInstr->uOpcode == OP_RETN
     2152        || pCpu->pCurInstr->uOpcode == OP_RETF
    21532153       )
    21542154    {
    … …  
    21562156    }
    21572157
    2158     if (pCpu->pCurInstr->opcode == OP_ILLUD2)
     2158    if (pCpu->pCurInstr->uOpcode == OP_ILLUD2)
    21592159        return VINF_SUCCESS;
    21602160
    … …  
    22342234        if (   (cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    22352235            && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J)
    2236             &&  cpu.pCurInstr->opcode != OP_CALL /* complete functions are replaced; don't bother here. */
     2236            &&  cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */
    22372237           )
    22382238        {
    … …  
    22662266                patmPatchAddDisasmJump(pVM, pPatch, pTargetGC);
    22672267
    2268                 if (cpu.pCurInstr->opcode == OP_CALL)  pPatch->pTempInfo->nrCalls++;
     2268                if (cpu.pCurInstr->uOpcode == OP_CALL)  pPatch->pTempInfo->nrCalls++;
    22692269                rc = patmr3DisasmCode(pVM, pInstrGC, pTargetGC, pfnPATMR3Disasm, pCacheRec);
    2270                 if (cpu.pCurInstr->opcode == OP_CALL)  pPatch->pTempInfo->nrCalls--;
     2270                if (cpu.pCurInstr->uOpcode == OP_CALL)  pPatch->pTempInfo->nrCalls--;
    22712271
    22722272                if (rc != VINF_SUCCESS) {
    … …  
    22742274                }
    22752275            }
    2276             if (cpu.pCurInstr->opcode == OP_JMP)
     2276            if (cpu.pCurInstr->uOpcode == OP_JMP)
    22772277            {
    22782278                /* Unconditional jump; return to caller. */
    … …  
    24112411                    goto end;
    24122412                }
    2413                 switch(cpunext.pCurInstr->opcode)
     2413                switch(cpunext.pCurInstr->uOpcode)
    24142414                {
    24152415                case OP_IRET:       /* inhibit cleared in generated code */
    … …  
    24322432
    24332433                /* Note: after a cli we must continue to a proper exit point */
    2434                 if (cpunext.pCurInstr->opcode != OP_CLI)
     2434                if (cpunext.pCurInstr->uOpcode != OP_CLI)
    24352435                {
    24362436                    rc = pfnPATMR3Recompile(pVM, &cpunext, pInstrGC, pNextInstrGC, pCacheRec);
    … …  
    24552455        if (   (cpu.pCurInstr->optype & DISOPTYPE_CONTROLFLOW)
    24562456            && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J)
    2457             &&  cpu.pCurInstr->opcode != OP_CALL /* complete functions are replaced; don't bother here. */
     2457            &&  cpu.pCurInstr->uOpcode != OP_CALL /* complete functions are replaced; don't bother here. */
    24582458           )
    24592459        {
    … …  
    24992499                }
    25002500
    2501                 if (cpu.pCurInstr->opcode == OP_CALL)  pPatch->pTempInfo->nrCalls++;
     2501                if (cpu.pCurInstr->uOpcode == OP_CALL)  pPatch->pTempInfo->nrCalls++;
    25022502                rc = patmRecompileCodeStream(pVM, pInstrGC, addr, pfnPATMR3Recompile, pCacheRec);
    2503                 if (cpu.pCurInstr->opcode == OP_CALL)  pPatch->pTempInfo->nrCalls--;
     2503                if (cpu.pCurInstr->uOpcode == OP_CALL)  pPatch->pTempInfo->nrCalls--;
    25042504
    25052505                if(pTargetPatch)
    … …  
    29782978    disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuPush, &cbInstr);
    29792979    Assert(disret);
    2980     if (disret && cpuPush.pCurInstr->opcode == OP_PUSH)
     2980    if (disret && cpuPush.pCurInstr->uOpcode == OP_PUSH)
    29812981    {
    29822982        RTRCPTR  pJmpInstrGC;
    … …  
    29862986        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuJmp, &cbInstr);
    29872987        if (   disret
    2988             && cpuJmp.pCurInstr->opcode == OP_JMP
     2988            && cpuJmp.pCurInstr->uOpcode == OP_JMP
    29892989            && (pJmpInstrGC = PATMResolveBranch(&cpuJmp, pCurInstrGC))
    29902990           )
    … …  
    35703570
    35713571    Assert(pPatch->flags & PATMFL_REPLACE_FUNCTION_CALL);
    3572     Assert((pCpu->pCurInstr->opcode == OP_CALL || pCpu->pCurInstr->opcode == OP_JMP) && pCpu->cbInstr == SIZEOF_NEARJUMP32);
    3573 
    3574     if ((pCpu->pCurInstr->opcode != OP_CALL && pCpu->pCurInstr->opcode != OP_JMP) || pCpu->cbInstr != SIZEOF_NEARJUMP32)
     3572    Assert((pCpu->pCurInstr->uOpcode == OP_CALL || pCpu->pCurInstr->uOpcode == OP_JMP) && pCpu->cbInstr == SIZEOF_NEARJUMP32);
     3573
     3574    if ((pCpu->pCurInstr->uOpcode != OP_CALL && pCpu->pCurInstr->uOpcode != OP_JMP) || pCpu->cbInstr != SIZEOF_NEARJUMP32)
    35753575    {
    35763576        rc = VERR_PATCHING_REFUSED;
    … …  
    36023602
    36033603            disret = patmR3DisInstr(pVM, pPatch, pTargetGC, pTmpInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
    3604             if (disret == false || cpu.pCurInstr->opcode != OP_JMP)
     3604            if (disret == false || cpu.pCurInstr->uOpcode != OP_JMP)
    36053605                break;
    36063606
    … …  
    38943894     * make sure this never happens. (unless a trap is triggered (intentionally or not))
    38953895     */
    3896     switch (pCpu->pCurInstr->opcode)
     3896    switch (pCpu->pCurInstr->uOpcode)
    38973897    {
    38983898    case OP_JO:
    … …  
    42514251
    42524252    pPatchRec->patch.cbPrivInstr = cbInstr;
    4253     pPatchRec->patch.opcode      = cpu.pCurInstr->opcode;
     4253    pPatchRec->patch.opcode      = cpu.pCurInstr->uOpcode;
    42544254
    42554255    /* Restricted hinting for now. */
    4256     Assert(!(flags & PATMFL_INSTR_HINT) || cpu.pCurInstr->opcode == OP_CLI);
     4256    Assert(!(flags & PATMFL_INSTR_HINT) || cpu.pCurInstr->uOpcode == OP_CLI);
    42574257
    42584258    /* Initialize cache record patch pointer. */
    … …  
    43174317    if (pPatchRec->patch.flags & PATMFL_GUEST_SPECIFIC)
    43184318    {
    4319         switch (cpu.pCurInstr->opcode)
     4319        switch (cpu.pCurInstr->uOpcode)
    43204320        {
    43214321        case OP_SYSENTER:
    … …  
    43374337    else
    43384338    {
    4339         switch (cpu.pCurInstr->opcode)
     4339        switch (cpu.pCurInstr->uOpcode)
    43404340        {
    43414341        case OP_SYSENTER:
    … …  
    43814381        case OP_CLI:
    43824382            Log(("PATMR3InstallPatch %s %RRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));
    4383             rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, cbInstr, pPatchRec);
     4383            rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->uOpcode, cbInstr, pPatchRec);
    43844384            break;
    43854385
    … …  
    51985198    if (    disret == true
    51995199        && (pConflictPatch->flags & PATMFL_CODE32)
    5200         && (cpu.pCurInstr->opcode == OP_JMP || (cpu.pCurInstr->optype & DISOPTYPE_COND_CONTROLFLOW))
     5200        && (cpu.pCurInstr->uOpcode == OP_JMP || (cpu.pCurInstr->optype & DISOPTYPE_COND_CONTROLFLOW))
    52015201        && (cpu.param1.fUse & DISUSE_IMMEDIATE32_REL))
    52025202    {
    … …  
    62806280
    62816281        if (    rc == VINF_SUCCESS
    6282             &&  (   Cpu.pCurInstr->opcode == OP_PUSHF
    6283                  || Cpu.pCurInstr->opcode == OP_PUSH
    6284                  || Cpu.pCurInstr->opcode == OP_CALL)
     6282            &&  (   Cpu.pCurInstr->uOpcode == OP_PUSHF
     6283                 || Cpu.pCurInstr->uOpcode == OP_PUSH
     6284                 || Cpu.pCurInstr->uOpcode == OP_CALL)
    62856285           )
    62866286        {
    … …  
    62896289            STAM_COUNTER_INC(&pVM->patm.s.StatPushTrap);
    62906290
    6291             if (Cpu.pCurInstr->opcode == OP_PUSH)
     6291            if (Cpu.pCurInstr->uOpcode == OP_PUSH)
    62926292            {
    62936293                rc = PGMShwGetPage(pVCpu, pCtx->esp, &fFlags, NULL);
    … …  
    64096409            PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
    64106410
    6411         if (disret && cpu.pCurInstr->opcode == OP_RETN)
     6411        if (disret && cpu.pCurInstr->uOpcode == OP_RETN)
    64126412        {
    64136413            RTRCPTR retaddr;
    … …  
    64486448            PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
    64496449
    6450         if (disret && (cpu.pCurInstr->opcode == OP_SYSEXIT || cpu.pCurInstr->opcode == OP_HLT || cpu.pCurInstr->opcode == OP_INT3))
     6450        if (disret && (cpu.pCurInstr->uOpcode == OP_SYSEXIT || cpu.pCurInstr->uOpcode == OP_HLT || cpu.pCurInstr->uOpcode == OP_INT3))
    64516451        {
    64526452            disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE,
    … …  
    64556455                PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
    64566456
    6457             Assert(cpu.pCurInstr->opcode == OP_SYSEXIT || cpu.pCurInstr->opcode == OP_HLT || cpu.pCurInstr->opcode == OP_IRET);
     6457            Assert(cpu.pCurInstr->uOpcode == OP_SYSEXIT || cpu.pCurInstr->uOpcode == OP_HLT || cpu.pCurInstr->uOpcode == OP_IRET);
    64586458        }
    64596459#endif

  • trunk/src/VBox/VMM/VMMR3/PATMGuest.cpp

    r35348 r41737  
    215215
    216216    /** @todo might have to check if the patch crosses a page boundary. Currently not necessary, but that might change in the future!! */
    217     switch (pCpu->pCurInstr->opcode)
     217    switch (pCpu->pCurInstr->uOpcode)
    218218    {
    219219    case OP_SYSENTER:
    … …  
    241241
    242242    default:
    243         AssertMsgFailed(("PATMInstallGuestSpecificPatch: unknown opcode %d\n", pCpu->pCurInstr->opcode));
     243        AssertMsgFailed(("PATMInstallGuestSpecificPatch: unknown opcode %d\n", pCpu->pCurInstr->uOpcode));
    244244        return VERR_PATCHING_REFUSED;
    245245    }

  • trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp

    r41734 r41737  
    859859        &&  pPatch->pTempInfo->uPatchRetParam1 == (uint32_t)pCpu->param1.parval) /* nr of bytes popped off the stack should be identical of course! */
    860860    {
    861         Assert(pCpu->pCurInstr->opcode == OP_RETN);
     861        Assert(pCpu->pCurInstr->uOpcode == OP_RETN);
    862862        STAM_COUNTER_INC(&pVM->patm.s.StatGenRetReused);
    863863
    … …  
    13361336        /* Modify REG part according to destination of original instruction */
    13371337        pPB[offset++] = MAKE_MODRM(0, pCpu->param1.base.reg_gen, 5);
    1338         if (pCpu->pCurInstr->opcode == OP_STR)
     1338        if (pCpu->pCurInstr->uOpcode == OP_STR)
    13391339        {
    13401340            *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
    … …  
    13811381        pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.tr/ldtr
    13821382        pPB[offset++] = 0xA1;
    1383         if (pCpu->pCurInstr->opcode == OP_STR)
     1383        if (pCpu->pCurInstr->uOpcode == OP_STR)
    13841384        {
    13851385            *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
    … …  
    14261426    // sidt %Ms
    14271427
    1428     switch (pCpu->pCurInstr->opcode)
     1428    switch (pCpu->pCurInstr->uOpcode)
    14291429    {
    14301430    case OP_SGDT:

  • trunk/src/VBox/VMM/VMMRC/IOMRC.cpp

    r40442 r41737  
    6767VMMRCDECL(VBOXSTRICTRC) IOMRCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
    6868{
    69     switch (pCpu->pCurInstr->opcode)
     69    switch (pCpu->pCurInstr->uOpcode)
    7070    {
    7171        case OP_IN:
    … …  
    8787         */
    8888        default:
    89             AssertMsgFailed(("Unknown I/O port access opcode %d.\n", pCpu->pCurInstr->opcode));
     89            AssertMsgFailed(("Unknown I/O port access opcode %d.\n", pCpu->pCurInstr->uOpcode));
    9090            return VERR_IOM_IOPORT_UNKNOWN_OPCODE;
    9191    }

  • trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

    r41734 r41737  
    521521         * Note! PATMGCHandleIllegalInstrTrap doesn't always return.
    522522         */
    523         if (    Cpu.pCurInstr->opcode == OP_ILLUD2
     523        if (    Cpu.pCurInstr->uOpcode == OP_ILLUD2
    524524            &&  PATMIsPatchGCAddr(pVM, pRegFrame->eip))
    525525        {
    … …  
    544544        else if (Cpu.fPrefix & DISPREFIX_LOCK)
    545545        {
    546             Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->opcode));
     546            Log(("TRPMGCTrap06Handler: pc=%08x op=%d\n", pRegFrame->eip, Cpu.pCurInstr->uOpcode));
    547547#ifdef DTRACE_EXPERIMENT /** @todo fix/remove/permanent-enable this when DIS/PATM handles invalid lock sequences. */
    548548            Assert(!PATMIsPatchGCAddr(pVM, pRegFrame->eip));
    … …  
    556556         * Handle MONITOR - it causes an #UD exception instead of #GP when not executed in ring 0.
    557557         */
    558         else if (Cpu.pCurInstr->opcode == OP_MONITOR)
     558        else if (Cpu.pCurInstr->uOpcode == OP_MONITOR)
    559559        {
    560560            LogFlow(("TRPMGCTrap06Handler: -> EMInterpretInstructionCPU\n"));
    … …  
    732732     * Try handle it here, if not return to HC and emulate/interpret it there.
    733733     */
    734     switch (pCpu->pCurInstr->opcode)
     734    switch (pCpu->pCurInstr->uOpcode)
    735735    {
    736736        case OP_INT3:
    … …  
    830830    Assert(!pRegFrame->eflags.Bits.u1VM);
    831831
    832     switch (pCpu->pCurInstr->opcode)
     832    switch (pCpu->pCurInstr->uOpcode)
    833833    {
    834834        /*
    … …  
    985985     * Note: it's no longer safe to access the instruction opcode directly due to possible stale code TLB entries
    986986     */
    987     if (Cpu.pCurInstr->opcode == OP_RDTSC)
     987    if (Cpu.pCurInstr->uOpcode == OP_RDTSC)
    988988        return trpmGCTrap0dHandlerRdTsc(pVM, pVCpu, pRegFrame);
    989989
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