Changeset 41847 in vbox for trunk/include/VBox
- Timestamp:
- Jun 20, 2012 1:43:46 PM (13 years ago)
- Location:
- trunk/include/VBox
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/err.h
r41825 r41847 569 569 /** PCI passthru is not supported by this build. */ 570 570 #define VERR_PGM_PCI_PASSTHRU_MISCONFIG (-1682) 571 /** PCI physical read with bus mastering disabled. */572 #define VINF_PGM_PCI_PHYS_READ_BM_DISABLED (1683)573 /** PCI physical write with bus mastering disabled. */574 #define VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED (1684)575 571 /** @} */ 576 572 … … 1215 1211 * misconfiguration or in rare cases a buggy pci device. */ 1216 1212 #define VERR_PDM_NO_PCI_BUS (-2833) 1213 /** PCI physical read with bus mastering disabled. */ 1214 #define VINF_PDM_PCI_PHYS_READ_BM_DISABLED (2833) 1217 1215 /** The device is not a registered PCI device and thus cannot 1218 1216 * perform any PCI operations. The device forgot to register it self. */ 1219 1217 #define VERR_PDM_NOT_PCI_DEVICE (-2834) 1218 /** PCI physical write with bus mastering disabled. */ 1219 #define VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED (2834) 1220 1220 1221 1221 /** The version of the device registration structure is unknown -
trunk/include/VBox/vmm/pdmdev.h
r41826 r41847 2189 2189 typedef struct PDMDEVHLPR3 2190 2190 { 2191 /** Structure version. PDM_DEVHLP _VERSION defines the current version. */2191 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */ 2192 2192 uint32_t u32Version; 2193 2193 … … 2857 2857 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, 2858 2858 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)); 2859 2860 /** 2861 * Reads data via bus mastering, if enabled. If no bus mastering is available, 2862 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 2863 * 2864 * @return IPRT status code. 2865 */ 2866 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 2867 2868 /** 2869 * Writes data via bus mastering, if enabled. If no bus mastering is available, 2870 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 2871 * 2872 * @return IPRT status code. 2873 */ 2874 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 2859 2875 2860 2876 /** … … 3511 3527 /** @} */ 3512 3528 3513 /** Just a safety precaution. (PDM_DEVHLP _VERSION) */3529 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */ 3514 3530 uint32_t u32TheEnd; 3515 3531 } PDMDEVHLPR3; … … 3521 3537 3522 3538 /** Current PDMDEVHLPR3 version number. */ 3523 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 8, 0)3539 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 9, 0) 3524 3540 3525 3541 … … 3531 3547 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */ 3532 3548 uint32_t u32Version; 3549 3550 /** 3551 * Reads data via bus mastering, if enabled. If no bus mastering is available, 3552 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 3553 * 3554 * @return IPRT status code. 3555 */ 3556 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 3557 3558 /** 3559 * Writes data via bus mastering, if enabled. If no bus mastering is available, 3560 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 3561 * 3562 * @return IPRT status code. 3563 */ 3564 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 3533 3565 3534 3566 /** … … 3712 3744 3713 3745 /** Current PDMDEVHLP version number. */ 3714 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 2, 0)3746 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 0) 3715 3747 3716 3748 … … 3722 3754 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */ 3723 3755 uint32_t u32Version; 3756 3757 /** 3758 * Reads data via bus mastering, if enabled. If no bus mastering is available, 3759 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 3760 * 3761 * @return IPRT status code. 3762 */ 3763 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 3764 3765 /** 3766 * Writes data via bus mastering, if enabled. If no bus mastering is available, 3767 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 3768 * 3769 * @return IPRT status code. 3770 */ 3771 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 3724 3772 3725 3773 /** … … 3911 3959 3912 3960 /** Current PDMDEVHLP version number. */ 3913 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 2, 0)3961 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 0) 3914 3962 3915 3963 … … 4641 4689 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead)); 4642 4690 #endif 4643 return VINF_P GM_PCI_PHYS_READ_BM_DISABLED;4691 return VINF_PDM_PCI_PHYS_READ_BM_DISABLED; 4644 4692 } 4645 4693 … … 4665 4713 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite)); 4666 4714 #endif 4667 return VINF_P GM_PCI_PHYS_WRITE_BM_DISABLED;4715 return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED; 4668 4716 } 4669 4717
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