VirtualBox

Changeset 41893 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Jun 23, 2012 8:01:09 AM (13 years ago)
Author:
vboxsync
Message:

VMM/VMMR3: doxygen, tidy.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/HWACCM.cpp

    r41801 r41893  
    374374
    375375#if HC_ARCH_BITS == 32
    376     /* 64-bit mode is configurable and it depends on both the kernel mode and VT-x.
    377      * (To use the default, don't set 64bitEnabled in CFGM.) */
     376    /*
     377     * 64-bit mode is configurable and it depends on both the kernel mode and VT-x.
     378     * (To use the default, don't set 64bitEnabled in CFGM.)
     379     */
    378380    rc = CFGMR3QueryBoolDef(pHWVirtExt, "64bitEnabled", &pVM->hwaccm.s.fAllow64BitGuests, false);
    379381    AssertLogRelRCReturn(rc, rc);
    … …  
    388390    }
    389391#else
    390     /* On 64-bit hosts 64-bit guest support is enabled by default, but allow this to be overridden
    391      * via VBoxInternal/HWVirtExt/64bitEnabled=0. (ConsoleImpl2.cpp doesn't set this to false for 64-bit.) */
     392    /*
     393     * On 64-bit hosts 64-bit guest support is enabled by default, but allow this to be overridden
     394     * via VBoxInternal/HWVirtExt/64bitEnabled=0. (ConsoleImpl2.cpp doesn't set this to false for 64-bit.)*
     395     */
    392396    rc = CFGMR3QueryBoolDef(pHWVirtExt, "64bitEnabled", &pVM->hwaccm.s.fAllow64BitGuests, true);
    393397    AssertLogRelRCReturn(rc, rc);
    … …  
    395399
    396400
    397     /** Determine the init method for AMD-V and VT-x; either one global init for each host CPU
     401    /*
     402     * Determine the init method for AMD-V and VT-x; either one global init for each host CPU
    398403     *  or local init each time we wish to execute guest code.
    399404     *
    … …  
    414419    return rc;
    415420}
     421
    416422
    417423/**
    … …  
    570576#endif
    571577
    572         for (unsigned j=0;j<RT_ELEMENTS(pVCpu->hwaccm.s.StatExitCRxWrite);j++)
     578        for (unsigned j = 0; j < RT_ELEMENTS(pVCpu->hwaccm.s.StatExitCRxWrite); j++)
    573579        {
    574580            rc = STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.StatExitCRxWrite[j], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Profiling of CRx writes",
    … …  
    589595        {
    590596            const char * const *papszDesc = ASMIsIntelCpu() ? &g_apszVTxExitReasons[0] : &g_apszAmdVExitReasons[0];
    591             for (int j=0;j<MAX_EXITREASON_STAT;j++)
     597            for (int j = 0; j < MAX_EXITREASON_STAT; j++)
    592598            {
    593599                if (papszDesc[j])
    … …  
    637643}
    638644
     645
    639646/**
    640647 * Called when a init phase has completed.
    … …  
    657664}
    658665
    659 /**
    660  * Turns off normal raw mode features
     666
     667/**
     668 * Turns off normal raw mode features.
    661669 *
    662670 * @param   pVM         Pointer to the VM.
    … …  
    690698}
    691699
     700
    692701/**
    693702 * Initialize VT-x or AMD-V.
    … …  
    700709    int rc;
    701710
    702     /* Hack to allow users to work around broken BIOSes that incorrectly set EFER.SVME, which makes us believe somebody else
     711    /*
     712     * Hack to allow users to work around broken BIOSes that incorrectly set EFER.SVME, which makes us believe somebody else
    703713     * is already using AMD-V.
    704714     */
    … …  
    11341144                    *((unsigned char *)pVM->hwaccm.s.vmx.pRealModeTSS + HWACCM_VTX_TSS_SIZE - 2) = 0xff;
    11351145
    1136                     /* Construct a 1024 element page directory with 4 MB pages for the identity mapped page table used in
     1146                    /*
     1147                     * Construct a 1024 element page directory with 4 MB pages for the identity mapped page table used in
    11371148                     * real and protected mode without paging with EPT.
    11381149                     */
    11391150                    pVM->hwaccm.s.vmx.pNonPagingModeEPTPageTable = (PX86PD)((char *)pVM->hwaccm.s.vmx.pRealModeTSS + PAGE_SIZE * 3);
    1140                     for (unsigned i=0;i<X86_PG_ENTRIES;i++)
     1151                    for (unsigned i = 0; i < X86_PG_ENTRIES; i++)
    11411152                    {
    11421153                        pVM->hwaccm.s.vmx.pNonPagingModeEPTPageTable->a[i].u  = _4M * i;
    … …  
    13991410}
    14001411
     1412
    14011413/**
    14021414 * Applies relocations to data and code managed by this
    … …  
    14261438    {
    14271439        int rc;
    1428 
    1429         switch(PGMGetHostMode(pVM))
     1440        switch (PGMGetHostMode(pVM))
    14301441        {
    1431         case PGMMODE_32_BIT:
    1432             pVM->hwaccm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_32_TO_AMD64);
    1433             break;
    1434 
    1435         case PGMMODE_PAE:
    1436         case PGMMODE_PAE_NX:
    1437             pVM->hwaccm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_PAE_TO_AMD64);
    1438             break;
    1439 
    1440         default:
    1441             AssertFailed();
    1442             break;
     1442            case PGMMODE_32_BIT:
     1443                pVM->hwaccm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_32_TO_AMD64);
     1444                break;
     1445
     1446            case PGMMODE_PAE:
     1447            case PGMMODE_PAE_NX:
     1448                pVM->hwaccm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_PAE_TO_AMD64);
     1449                break;
     1450
     1451            default:
     1452                AssertFailed();
     1453                break;
    14431454        }
    14441455        rc = PDMR3LdrGetSymbolRC(pVM, NULL,       "VMXGCStartVM64", &pVM->hwaccm.s.pfnVMXGCStartVM64);
    … …  
    14631474}
    14641475
    1465 /**
    1466  * Checks hardware accelerated raw mode is allowed.
    1467  *
    1468  * @returns boolean
     1476
     1477/**
     1478 * Checks if hardware accelerated raw mode is allowed.
     1479 *
     1480 * @returns true if hardware acceleration is allowed, otherwise false.
    14691481 * @param   pVM         Pointer to the VM.
    14701482 */
    … …  
    14731485    return pVM->hwaccm.s.fAllowed;
    14741486}
     1487
    14751488
    14761489/**
    … …  
    15261539    /* Reset the contents of the read cache. */
    15271540    PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
    1528     for (unsigned j=0;j<pCache->Read.cValidEntries;j++)
     1541    for (unsigned j = 0; j < pCache->Read.cValidEntries; j++)
    15291542        pCache->Read.aFieldVal[j] = 0;
    15301543}
    15311544
     1545
    15321546/**
    15331547 * Terminates the HWACCM.
    15341548 *
    15351549 * Termination means cleaning up and freeing all resources,
    1536  * the VM it self is at this point powered off or suspended.
     1550 * the VM itself is, at this point, powered off or suspended.
    15371551 *
    15381552 * @returns VBox status code.
    … …  
    15491563    return 0;
    15501564}
     1565
    15511566
    15521567/**
    … …  
    15861601}
    15871602
     1603
    15881604/**
    15891605 * Resets a virtual CPU.
    … …  
    16111627    /* Reset the contents of the read cache. */
    16121628    PVMCSCACHE pCache = &pVCpu->hwaccm.s.vmx.VMCSCache;
    1613     for (unsigned j=0;j<pCache->Read.cValidEntries;j++)
     1629    for (unsigned j = 0; j < pCache->Read.cValidEntries; j++)
    16141630        pCache->Read.aFieldVal[j] = 0;
    16151631
    … …  
    16201636#endif
    16211637}
     1638
    16221639
    16231640/**
    … …  
    16531670}
    16541671
    1655 /**
    1656  * Callback to patch a TPR instruction (vmmcall or mov cr8)
     1672
     1673/**
     1674 * Callback to patch a TPR instruction (vmmcall or mov cr8).
    16571675 *
    16581676 * @returns VBox strict status code.
    16591677 * @param   pVM     Pointer to the VM.
    16601678 * @param   pVCpu   The VMCPU for the EMT we're being called on.
    1661  * @param   pvUser  Unused
    1662  *
     1679 * @param   pvUser  Unused.
    16631680 */
    16641681DECLCALLBACK(VBOXSTRICTRC) hwaccmR3RemovePatches(PVM pVM, PVMCPU pVCpu, void *pvUser)
    … …  
    17181735}
    17191736
    1720 /**
    1721  * Enable patching in a VT-x/AMD-V guest
     1737
     1738/**
     1739 * Worker for enabling patching in a VT-x/AMD-V guest.
    17221740 *
    17231741 * @returns VBox status code.
    17241742 * @param   pVM         Pointer to the VM.
    1725  * @param   idCpu       VCPU to execute hwaccmR3RemovePatches on
    1726  * @param   pPatchMem   Patch memory range
    1727  * @param   cbPatchMem  Size of the memory range
    1728  */
    1729 int hwaccmR3EnablePatching(PVM pVM, VMCPUID idCpu, RTRCPTR pPatchMem, unsigned cbPatchMem)
     1743 * @param   idCpu       VCPU to execute hwaccmR3RemovePatches on.
     1744 * @param   pPatchMem   Patch memory range.
     1745 * @param   cbPatchMem  Size of the memory range.
     1746 */
     1747static int hwaccmR3EnablePatching(PVM pVM, VMCPUID idCpu, RTRCPTR pPatchMem, unsigned cbPatchMem)
    17301748{
    17311749    int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE, hwaccmR3RemovePatches, (void *)(uintptr_t)idCpu);
    … …  
    17381756}
    17391757
     1758
    17401759/**
    17411760 * Enable patching in a VT-x/AMD-V guest
    … …  
    17431762 * @returns VBox status code.
    17441763 * @param   pVM         Pointer to the VM.
    1745  * @param   pPatchMem   Patch memory range
    1746  * @param   cbPatchMem  Size of the memory range
     1764 * @param   pPatchMem   Patch memory range.
     1765 * @param   cbPatchMem  Size of the memory range.
    17471766 */
    17481767VMMR3DECL(int)  HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
    … …  
    17611780}
    17621781
    1763 /**
    1764  * Disable patching in a VT-x/AMD-V guest
     1782
     1783/**
     1784 * Disable patching in a VT-x/AMD-V guest.
    17651785 *
    17661786 * @returns VBox status code.
    17671787 * @param   pVM         Pointer to the VM.
    1768  * @param   pPatchMem   Patch memory range
    1769  * @param   cbPatchMem  Size of the memory range
     1788 * @param   pPatchMem   Patch memory range.
     1789 * @param   cbPatchMem  Size of the memory range.
    17701790 */
    17711791VMMR3DECL(int)  HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
    … …  
    17891809
    17901810/**
    1791  * Callback to patch a TPR instruction (vmmcall or mov cr8)
     1811 * Callback to patch a TPR instruction (vmmcall or mov cr8).
    17921812 *
    17931813 * @returns VBox strict status code.
    17941814 * @param   pVM     Pointer to the VM.
    17951815 * @param   pVCpu   The VMCPU for the EMT we're being called on.
    1796  * @param   pvUser  User specified CPU context
     1816 * @param   pvUser  User specified CPU context.
    17971817 *
    17981818 */
    … …  
    19601980}
    19611981
    1962 /**
    1963  * Callback to patch a TPR instruction (jump to generated code)
     1982
     1983/**
     1984 * Callback to patch a TPR instruction (jump to generated code).
    19641985 *
    19651986 * @returns VBox strict status code.
    19661987 * @param   pVM     Pointer to the VM.
    19671988 * @param   pVCpu   The VMCPU for the EMT we're being called on.
    1968  * @param   pvUser  User specified CPU context
     1989 * @param   pvUser  User specified CPU context.
    19691990 *
    19701991 */
    … …  
    21922213}
    21932214
    2194 /**
    2195  * Attempt to patch TPR mmio instructions
     2215
     2216/**
     2217 * Attempt to patch TPR mmio instructions.
    21962218 *
    21972219 * @returns VBox status code.
    … …  
    22102232}
    22112233
    2212 /**
    2213  * Force execution of the current IO code in the recompiler
     2234
     2235/**
     2236 * Force execution of the current IO code in the recompiler.
    22142237 *
    22152238 * @returns VBox status code.
    … …  
    22362259}
    22372260
     2261
    22382262/**
    22392263 * Checks if we can currently use hardware accelerated raw mode.
    22402264 *
    2241  * @returns boolean
     2265 * @returns true if we can currently use hardware acceleration, otherwise false.
    22422266 * @param   pVM         Pointer to the VM.
    22432267 * @param   pCtx        Partial VM execution context.
    … …  
    22732297    if (!pVM->hwaccm.s.vmx.fUnrestrictedGuest)
    22742298    {
    2275         /** The VMM device heap is a requirement for emulating real mode or protected mode without paging when the unrestricted guest execution feature is missing. */
     2299        /*
     2300         * The VMM device heap is a requirement for emulating real mode or protected mode without paging with the unrestricted
     2301         * guest execution feature i missing (VT-x only).
     2302         */
    22762303        if (fSupportsRealMode)
    22772304        {
    … …  
    23602387                if (pCtx->rsp >= pCtx->ssHid.u32Limit)
    23612388                    return false;
    2362     #if 0
     2389#if 0
    23632390                if (    pCtx->cs >= pCtx->gdtr.cbGdt
    23642391                    ||  pCtx->ss >= pCtx->gdtr.cbGdt
    … …  
    23682395                    ||  pCtx->gs >= pCtx->gdtr.cbGdt)
    23692396                    return false;
    2370     #endif
     2397#endif
    23712398            }
    23722399        }
    … …  
    24182445}
    24192446
    2420 /**
    2421  * Checks if we need to reschedule due to VMM device heap changes
    2422  *
    2423  * @returns boolean
     2447
     2448/**
     2449 * Checks if we need to reschedule due to VMM device heap changes.
     2450 *
     2451 * @returns true if a reschedule is required, otherwise false.
    24242452 * @param   pVM         Pointer to the VM.
    24252453 * @param   pCtx        VM execution context.
    … …  
    24272455VMMR3DECL(bool) HWACCMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx)
    24282456{
    2429     /** The VMM device heap is a requirement for emulating real mode or protected mode without paging when the unrestricted guest execution feature is missing. (VT-x only) */
     2457    /*
     2458     * The VMM device heap is a requirement for emulating real mode or protected mode without paging
     2459     * when the unrestricted guest execution feature is missing (VT-x only).
     2460     */
    24302461    if (    pVM->hwaccm.s.vmx.fEnabled
    24312462        &&  !pVM->hwaccm.s.vmx.fUnrestrictedGuest
    … …  
    24502481}
    24512482
     2483
    24522484/**
    24532485 * Notification from EM about returning from instruction emulation (REM / EM).
    … …  
    24602492}
    24612493
     2494
    24622495/**
    24632496 * Checks if we are currently using hardware accelerated raw mode.
    24642497 *
    2465  * @returns boolean
     2498 * @returns true if hardware acceleration is being used, otherwise false.
    24662499 * @param   pVCpu        Pointer to the VMCPU.
    24672500 */
    … …  
    24712504}
    24722505
     2506
    24732507/**
    24742508 * Checks if we are currently using nested paging.
    24752509 *
    2476  * @returns boolean
     2510 * @returns true if nested paging is being used, otherwise false.
    24772511 * @param   pVM         Pointer to the VM.
    24782512 */
    … …  
    24822516}
    24832517
     2518
    24842519/**
    24852520 * Checks if we are currently using VPID in VT-x mode.
    24862521 *
    2487  * @returns boolean
     2522 * @returns true if VPID is being used, otherwise false.
    24882523 * @param   pVM         Pointer to the VM.
    24892524 */
    … …  
    24972532 * Checks if internal events are pending. In that case we are not allowed to dispatch interrupts.
    24982533 *
    2499  * @returns boolean
     2534 * @returns true if an internal event is pending, otherwise false.
    25002535 * @param   pVM         Pointer to the VM.
    25012536 */
    … …  
    25052540}
    25062541
     2542
    25072543/**
    25082544 * Checks if the VMX-preemption timer is being used.
    25092545 *
    2510  * @returns true if it is, false if it isn't.
     2546 * @returns true if the VMX-preemption timer is being used, otherwise false.
    25112547 * @param   pVM         Pointer to the VM.
    25122548 */
    … …  
    25172553        && pVM->hwaccm.s.vmx.fUsePreemptTimer;
    25182554}
     2555
    25192556
    25202557/**
    … …  
    25452582    switch (enmType)
    25462583    {
    2547     case HWACCMPENDINGIO_PORT_READ:
    2548     {
    2549         uint32_t uAndVal = pVCpu->hwaccm.s.PendingIO.s.Port.uAndVal;
    2550         uint32_t u32Val  = 0;
    2551 
    2552         rcStrict = IOMIOPortRead(pVM, pVCpu->hwaccm.s.PendingIO.s.Port.uPort,
    2553                                  &u32Val,
    2554                                  pVCpu->hwaccm.s.PendingIO.s.Port.cbSize);
    2555         if (IOM_SUCCESS(rcStrict))
     2584        case HWACCMPENDINGIO_PORT_READ:
    25562585        {
    2557             /* Write back to the EAX register. */
    2558             pCtx->eax = (pCtx->eax & ~uAndVal) | (u32Val & uAndVal);
    2559             pCtx->rip = pVCpu->hwaccm.s.PendingIO.GCPtrRipNext;
     2586            uint32_t uAndVal = pVCpu->hwaccm.s.PendingIO.s.Port.uAndVal;
     2587            uint32_t u32Val  = 0;
     2588
     2589            rcStrict = IOMIOPortRead(pVM, pVCpu->hwaccm.s.PendingIO.s.Port.uPort,
     2590                                     &u32Val,
     2591                                     pVCpu->hwaccm.s.PendingIO.s.Port.cbSize);
     2592            if (IOM_SUCCESS(rcStrict))
     2593            {
     2594                /* Write back to the EAX register. */
     2595                pCtx->eax = (pCtx->eax & ~uAndVal) | (u32Val & uAndVal);
     2596                pCtx->rip = pVCpu->hwaccm.s.PendingIO.GCPtrRipNext;
     2597            }
     2598            break;
    25602599        }
    2561         break;
    2562     }
    2563 
    2564     case HWACCMPENDINGIO_PORT_WRITE:
    2565         rcStrict = IOMIOPortWrite(pVM, pVCpu->hwaccm.s.PendingIO.s.Port.uPort,
    2566                                   pCtx->eax & pVCpu->hwaccm.s.PendingIO.s.Port.uAndVal,
    2567                                   pVCpu->hwaccm.s.PendingIO.s.Port.cbSize);
    2568         if (IOM_SUCCESS(rcStrict))
    2569             pCtx->rip = pVCpu->hwaccm.s.PendingIO.GCPtrRipNext;
    2570         break;
    2571 
    2572     default:
    2573         AssertLogRelFailedReturn(VERR_HM_UNKNOWN_IO_INSTRUCTION);
     2600
     2601        case HWACCMPENDINGIO_PORT_WRITE:
     2602            rcStrict = IOMIOPortWrite(pVM, pVCpu->hwaccm.s.PendingIO.s.Port.uPort,
     2603                                      pCtx->eax & pVCpu->hwaccm.s.PendingIO.s.Port.uAndVal,
     2604                                      pVCpu->hwaccm.s.PendingIO.s.Port.cbSize);
     2605            if (IOM_SUCCESS(rcStrict))
     2606                pCtx->rip = pVCpu->hwaccm.s.PendingIO.GCPtrRipNext;
     2607            break;
     2608
     2609        default:
     2610            AssertLogRelFailedReturn(VERR_HM_UNKNOWN_IO_INSTRUCTION);
    25742611    }
    25752612
    25762613    return rcStrict;
    25772614}
     2615
    25782616
    25792617/**
    … …  
    25882626    return VINF_SUCCESS;
    25892627}
     2628
    25902629
    25912630/**
    … …  
    26332672    }
    26342673}
     2674
    26352675
    26362676/**
    … …  
    27162756    return VINF_SUCCESS;
    27172757}
     2758
    27182759
    27192760/**
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette