VirtualBox

Changeset 41939 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Jun 27, 2012 11:59:46 PM (13 years ago)
Author:
vboxsync
Message:

CPUMGetGuestCPL: Drop the context core pointer and use the Guest state in CPUMCPU via pVCpu.

Location:
trunk/src/VBox/VMM
Files:
17 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

    r41931 r41939  
    23922392 * Get the current privilege level of the guest.
    23932393 *
    2394  * @returns cpl
    2395  * @param   pVM         Pointer to the VM.
    2396  * @param   pRegFrame   Trap register frame.
    2397  */
    2398 VMMDECL(uint32_t) CPUMGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore)
    2399 {
    2400     uint32_t cpl;
     2394 * @returns CPL
     2395 * @param   pVCpu       Pointer to the current virtual CPU.
     2396 */
     2397VMMDECL(uint32_t) CPUMGetGuestCPL(PVMCPU pVCpu)
     2398{
     2399    uint32_t uCpl;
    24012400
    24022401    if (CPUMAreHiddenSelRegsValid(pVCpu))
    24032402    {
    24042403        /*
    2405          * The hidden CS.DPL register is always equal to the CPL, it is
    2406          * not affected by loading a conforming coding segment.
     2404         * CPL can reliably be found in SS.DPL.
    24072405         *
    2408          * This only seems to apply to AMD-V; in the VT-x case we *do* need to look
    2409          * at SS. (ACP2 regression during install after a far call to ring 2)
     2406         * Note! We used to check CS.DPL here, assuming it was always equal to
     2407         * CPL even if a conforming segment was loaded.  But this truned out to
     2408         * only apply to older AMD-V.  With VT-x we had an ACP2 regression
     2409         * during install after a far call to ring 2 with VT-x.  Then on newer
     2410         * AMD-V CPUs we have to move the VMCB.guest.u8CPL into cs.Attr.n.u2Dpl
     2411         * as well as ss.Attr.n.u2Dpl to make this (and other) code work right.
    24102412         *
    2411          * Seems it isn't necessiarly true for newer AMD-V CPUs even, we have
    2412          * to move the VMCB.guest.u8CPL into Attr.n.u2Dpl to make this (and
    2413          * other) code work right.  So, forget CS.DPL, always use SS.DPL.
     2413         * So, forget CS.DPL, always use SS.DPL.
    24142414         */
    24152415        if (RT_LIKELY(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
    24162416        {
    2417             if (!pCtxCore->eflags.Bits.u1VM)
    2418                 cpl = pCtxCore->ss.Attr.n.u2Dpl;
     2417            if (!pVCpu->cpum.s.Guest.eflags.Bits.u1VM)
     2418                uCpl = pVCpu->cpum.s.Guest.ss.Attr.n.u2Dpl;
    24192419            else
    2420                 cpl = 3; /* REM doesn't set DPL=3 in V8086 mode. See @bugref{5130}. */
     2420                uCpl = 3; /* REM doesn't set DPL=3 in V8086 mode. See @bugref{5130}. */
    24212421        }
    24222422        else
    2423             cpl = 0;  /* CPL set to 3 for VT-x real-mode emulation. */
     2423            uCpl = 0;  /* CPL set to 3 for VT-x real-mode emulation. */
    24242424    }
    24252425    else if (RT_LIKELY(pVCpu->cpum.s.Guest.cr0 & X86_CR0_PE))
    24262426    {
    2427         if (RT_LIKELY(!pCtxCore->eflags.Bits.u1VM))
     2427        if (RT_LIKELY(!pVCpu->cpum.s.Guest.eflags.Bits.u1VM))
    24282428        {
    24292429            /*
    … …  
    24322432             * See section 4.11.1 in the AMD manual.
    24332433             */
    2434             cpl = (pCtxCore->ss.Sel & X86_SEL_RPL);
     2434            uCpl = (pVCpu->cpum.s.Guest.ss.Sel & X86_SEL_RPL);
    24352435#ifndef IN_RING0
    2436             if (cpl == 1)
    2437                 cpl = 0;
     2436            if (uCpl == 1)
     2437                uCpl = 0;
    24382438#endif
    24392439        }
    24402440        else
    2441             cpl = 3;
     2441            uCpl = 3;
    24422442    }
    24432443    else
    2444         cpl = 0;        /* real mode; cpl is zero */
    2445 
    2446     return cpl;
     2444        uCpl = 0;        /* real mode; CPL is zero */
     2445
     2446    return uCpl;
    24472447}
    24482448

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41937 r41939  
    770770    /* If X86_CR4_PCE is not set, then CPL must be zero. */
    771771    if (    !(uCR4 & X86_CR4_PCE)
    772         &&  CPUMGetGuestCPL(pVCpu, pRegFrame) != 0)
     772        &&  CPUMGetGuestCPL(pVCpu) != 0)
    773773    {
    774774        Assert(CPUMGetGuestCR0(pVCpu) & X86_CR0_PE);
    … …  
    796796
    797797    /* Get the current privilege level. */
    798     cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     798    cpl = CPUMGetGuestCPL(pVCpu);
    799799    if (cpl != 0)
    800800        return VERR_EM_INTERPRETER; /* supervisor only */
    … …  
    841841
    842842    /* Get the current privilege level. */
    843     cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     843    cpl = CPUMGetGuestCPL(pVCpu);
    844844    if (cpl != 0)
    845845        return VERR_EM_INTERPRETER; /* supervisor only */
    … …  
    22692269        rc = PGMVerifyAccess(pVCpu, GCDest - ((offIncrement > 0) ? 0 : ((cTransfers-1) * cbSize)),
    22702270                             cTransfers * cbSize,
    2271                              X86_PTE_RW | (CPUMGetGuestCPL(pVCpu, pRegFrame) == 3 ? X86_PTE_US : 0));
     2271                             X86_PTE_RW | (CPUMGetGuestCPL(pVCpu) == 3 ? X86_PTE_US : 0));
    22722272        if (rc != VINF_SUCCESS)
    22732273        {
    … …  
    30053005
    30063006    /* Get the current privilege level. */
    3007     if (CPUMGetGuestCPL(pVCpu, pRegFrame) != 0)
     3007    if (CPUMGetGuestCPL(pVCpu) != 0)
    30083008        return VERR_EM_INTERPRETER; /* supervisor only */
    30093009
    … …  
    30483048
    30493049    /* Check the current privilege level, this instruction is supervisor only. */
    3050     if (CPUMGetGuestCPL(pVCpu, pRegFrame) != 0)
     3050    if (CPUMGetGuestCPL(pVCpu) != 0)
    30513051        return VERR_EM_INTERPRETER; /** @todo raise \#GP(0) */
    30523052
    … …  
    30923092         */
    30933093        /* Get the current privilege level. */
    3094         uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     3094        uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    30953095        if (    cpl != 0
    30963096            &&  pDis->pCurInstr->uOpcode != OP_RDTSC)    /* rdtsc requires emulation in ring 3 as well */

  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r41937 r41939  
    629629    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
    630630
    631     pIemCpu->uCpl               = CPUMGetGuestCPL(IEMCPU_TO_VMCPU(pIemCpu), CPUMCTX2CORE(pCtx));
     631    pIemCpu->uCpl               = CPUMGetGuestCPL(IEMCPU_TO_VMCPU(pIemCpu));
    632632    IEMMODE enmMode = CPUMIsGuestIn64BitCodeEx(pCtx)
    633633                    ? IEMMODE_64BIT

  • trunk/src/VBox/VMM/VMMAll/IOMAll.cpp

    r41801 r41939  
    854854     */
    855855    uint32_t efl = CPUMRawGetEFlags(pVCpu, pCtxCore);
    856     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pCtxCore);
     856    uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    857857
    858858    if (    (    cpl > 0

  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r41800 r41939  
    20652065
    20662066    /* Access verification first; we can't recover from traps inside this instruction, as the port read cannot be repeated. */
    2067     uint32_t const cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     2067    uint32_t const cpl = CPUMGetGuestCPL(pVCpu);
    20682068    rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
    20692069                          X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
    … …  
    22272227
    22282228    /* Access verification first; we currently can't recover properly from traps inside this instruction */
    2229     uint32_t const cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     2229    uint32_t const cpl = CPUMGetGuestCPL(pVCpu);
    22302230    rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
    22312231                          (cpl == 3) ? X86_PTE_US : 0);

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r41906 r41939  
    865865#   if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) && !defined(IN_RING0)
    866866        if (   !GstWalk.Core.fEffectiveUS
    867             && CPUMGetGuestCPL(pVCpu, pRegFrame) == 0)
     867            && CPUMGetGuestCPL(pVCpu) == 0)
    868868        {
    869869            /* Note: Can't check for X86_TRAP_ID bit, because that requires execute disable support on the CPU. */
    … …  
    981981            if (    !GstWalk.Core.fEffectiveRW
    982982                &&  (CPUMGetGuestCR0(pVCpu) & (X86_CR0_WP | X86_CR0_PG)) == X86_CR0_PG
    983                 &&  CPUMGetGuestCPL(pVCpu, pRegFrame) == 0)
     983                &&  CPUMGetGuestCPL(pVCpu) == 0)
    984984            {
    985985                Assert((uErr & (X86_TRAP_PF_RW | X86_TRAP_PF_P)) == (X86_TRAP_PF_RW | X86_TRAP_PF_P));

  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r41803 r41939  
    35593559
    35603560    /* Get the current privilege level. */
    3561     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pCtxCore);
     3561    uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    35623562    switch (rc)
    35633563    {
    … …  
    37483748     */
    37493749    /* Calc the error bits. */
    3750     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pCtxCore);
     3750    uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    37513751    uint32_t uErr;
    37523752    switch (rc)
    … …  
    38343834            if (    (fFlags & X86_PTE_RW)                   /** @todo Also check reserved bits. */
    38353835                ||  (   !(CPUMGetGuestCR0(pVCpu) & X86_CR0_WP)
    3836                      &&   CPUMGetGuestCPL(pVCpu, pCtxCore) <= 2) ) /** @todo it's 2, right? Check cpl check below as well. */
     3836                     &&   CPUMGetGuestCPL(pVCpu) <= 2) ) /** @todo it's 2, right? Check cpl check below as well. */
    38373837            {
    38383838                void *pvDst;
    … …  
    38873887                         && (fFlags2 & X86_PTE_RW))
    38883888                    ||  (   !(CPUMGetGuestCR0(pVCpu) & X86_CR0_WP)
    3889                          &&   CPUMGetGuestCPL(pVCpu, pCtxCore) <= 2) )
     3889                         &&   CPUMGetGuestCPL(pVCpu) <= 2) )
    38903890                {
    38913891                    void *pvDst;
    … …  
    39533953    /* Calc the error bits. */
    39543954    uint32_t uErr;
    3955     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pCtxCore);
     3955    uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    39563956    switch (rc)
    39573957    {

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r41906 r41939  
    764764
    765765    /* Non-supervisor mode write means it's used for something else. */
    766     if (CPUMGetGuestCPL(pVCpu, pRegFrame) != 0)
     766    if (CPUMGetGuestCPL(pVCpu) != 0)
    767767        return true;
    768768

  • trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

    r41906 r41939  
    438438
    439439        /* Get the current privilege level. */
    440         cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
     440        cpl = CPUMGetGuestCPL(pVCpu);
    441441
    442442        /*

  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r41906 r41939  
    18951895                &&  (uFaultAddress & 0xfff) == 0x080
    18961896                &&  !(errCode & X86_TRAP_PF_P)  /* not present */
    1897                 &&  CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0
     1897                &&  CPUMGetGuestCPL(pVCpu) == 0
    18981898                &&  !CPUMIsGuestInLongModeEx(pCtx)
    18991899                &&  pVM->hwaccm.s.cPatches < RT_ELEMENTS(pVM->hwaccm.s.aPatches))
    … …  
    20612061            &&  (   !(errCode & X86_TRAP_PF_P)  /* not present */
    20622062                 || (errCode & (X86_TRAP_PF_P | X86_TRAP_PF_RSVD)) == (X86_TRAP_PF_P | X86_TRAP_PF_RSVD) /* mmio optimization */)
    2063             &&  CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0
     2063            &&  CPUMGetGuestCPL(pVCpu) == 0
    20642064            &&  !CPUMIsGuestInLongModeEx(pCtx)
    20652065            &&  pVM->hwaccm.s.cPatches < RT_ELEMENTS(pVM->hwaccm.s.aPatches))

  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r41906 r41939  
    33413341                    &&  (exitQualification & 0xfff) == 0x080
    33423342                    &&  !(errCode & X86_TRAP_PF_P)  /* not present */
    3343                     &&  CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0
     3343                    &&  CPUMGetGuestCPL(pVCpu) == 0
    33443344                    &&  !CPUMIsGuestInLongModeEx(pCtx)
    33453345                    &&  pVM->hwaccm.s.cPatches < RT_ELEMENTS(pVM->hwaccm.s.aPatches))

  • trunk/src/VBox/VMM/VMMR3/CPUM.cpp

    r41931 r41939  
    41494149     * Get the CPL first.
    41504150     */
    4151     *puCpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(&pVCpu->cpum.s.Guest));
     4151    *puCpl = CPUMGetGuestCPL(pVCpu);
    41524152
    41534153    /*

  • trunk/src/VBox/VMM/VMMR3/EM.cpp

    r41906 r41939  
    962962#ifdef LOG_ENABLED
    963963    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
    964     uint32_t cpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
     964    uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    965965
    966966    if (pCtx->eflags.Bits.u1VM)

  • trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp

    r41906 r41939  
    511511            Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
    512512
    513         uint32_t cpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
     513        uint32_t cpl = CPUMGetGuestCPL(pVCpu);
    514514
    515515        if (pVM->cCpus == 1)

  • trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

    r41906 r41939  
    534534     * instead. One example is #DE.
    535535     */
    536     uint32_t uCpl = CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx));
     536    uint32_t uCpl = CPUMGetGuestCPL(pVCpu);
    537537    if (    uCpl == 0
    538538        &&  PATMIsPatchGCAddr(pVM, pCtx->eip))

  • trunk/src/VBox/VMM/VMMR3/PATM.cpp

    r41906 r41939  
    40834083    /* Make sure the code selector is wide open; otherwise refuse. */
    40844084    pCtx = CPUMQueryGuestCtxPtr(pVCpu);
    4085     if (CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0)
     4085    if (CPUMGetGuestCPL(pVCpu) == 0)
    40864086    {
    40874087        RTRCPTR pInstrGCFlat = SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pInstrGC);

  • trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

    r41906 r41939  
    491491    PGMRZDynMapStartAutoSet(pVCpu);
    492492
    493     if (CPUMGetGuestCPL(pVCpu, pRegFrame) == 0)
     493    if (CPUMGetGuestCPL(pVCpu) == 0)
    494494    {
    495495        /*
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