VirtualBox

Changeset 42044 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Jul 9, 2012 6:04:54 AM (13 years ago)
Author:
vboxsync
Message:

VMM/HWVMXR0: Fix for acquiring/signaling new ASIDs during host CPU suspend/resumes.

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

    r41965 r42044  
    867867    pCpu->uCurrentASID  = 0;    /* we'll aways increment this the first time (host uses ASID 0) */
    868868    pCpu->cTLBFlushes   = 0;
     869    pCpu->fASIDState    = true;
    869870
    870871    /* Should never happen */
     
    12391240        pVCpu->hwaccm.s.idLastCpu           = NIL_RTCPUID;
    12401241
    1241         /* we'll aways increment this the first time (host uses ASID 0) */
     1242        /* We'll aways increment this the first time (host uses ASID 0) */
    12421243        pVCpu->hwaccm.s.uCurrentASID        = 0;
    12431244    }
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r42036 r42044  
    166166     * Ensure each VCPU scheduled on this CPU gets a new VPID on resume. See @bugref{6255}.
    167167     */
    168     pCpu->uCurrentASID = 0;
     168    pCpu->fASIDState = !pCpu->fASIDState;
    169169
    170170    return VINF_SUCCESS;
     
    24012401    if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
    24022402        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
    2403         || pCpu->uCurrentASID == 0)
     2403        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
    24042404    {
    24052405        pVCpu->hwaccm.s.fForceTLBFlush = true;
     
    24522452        }
    24532453
     2454        pVCpu->hwaccm.s.fASIDState     = pCpu->fASIDState;
    24542455        pVCpu->hwaccm.s.cTLBFlushes    = pCpu->cTLBFlushes;
    24552456        pVCpu->hwaccm.s.fForceTLBFlush = false;
     
    24582459    {
    24592460        AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID,
    2460                   ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu\n",
     2461                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu"
     2462                   "hwaccm->fASIDState=%d cpu->fASIDState=%d\n",
    24612463                   pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes,
    2462                    pCpu->uCurrentASID, pCpu->cTLBFlushes));
     2464                   pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState));
    24632465
    24642466        /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should
     
    25272529    if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
    25282530        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
    2529         || pCpu->uCurrentASID == 0)
     2531        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
    25302532    {
    25312533        pVCpu->hwaccm.s.fForceTLBFlush = true;
     
    25402542    pVCpu->hwaccm.s.idLastCpu   = pCpu->idCpu;
    25412543    pVCpu->hwaccm.s.cTLBFlushes = pCpu->cTLBFlushes;
     2544    pVCpu->hwaccm.s.fASIDState  = pCpu->fASIDState;
    25422545
    25432546    if (pVCpu->hwaccm.s.fForceTLBFlush)
     
    25932596    if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
    25942597        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
    2595         || pCpu->uCurrentASID == 0)
     2598        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
    25962599    {
    25972600        /* Force a TLB flush on VM entry. */
     
    26222625        pVCpu->hwaccm.s.cTLBFlushes    = pCpu->cTLBFlushes;
    26232626        pVCpu->hwaccm.s.uCurrentASID   = pCpu->uCurrentASID;
     2627        pVCpu->hwaccm.s.fASIDState     = pCpu->fASIDState;
    26242628        if (pCpu->fFlushASIDBeforeUse)
    26252629            hmR0VmxFlushVPID(pVM, pVCpu, pVM->hwaccm.s.vmx.enmFlushVPID, 0 /* GCPtr */);
     
    26272631    else
    26282632    {
    2629         Assert(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID);
     2633        AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID,
     2634                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu"
     2635                   "hwaccm->fASIDState=%d cpu->fASIDState=%d\n",
     2636                   pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes,
     2637                   pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState));
    26302638
    26312639        /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should
  • trunk/src/VBox/VMM/include/HWACCMInternal.h

    r42025 r42044  
    149149    /** TLB flush count. */
    150150    uint32_t            cTLBFlushes;
    151 
    152151    /** Whether to flush each new ASID/VPID before use. */
    153152    bool                fFlushASIDBeforeUse;
    154 
    155153    /** Configured for VT-x or AMD-V. */
    156154    bool                fConfigured;
    157 
    158155    /** Set if the VBOX_HWVIRTEX_IGNORE_SVM_IN_USE hack is active. */
    159156    bool                fIgnoreAMDVInUseError;
    160 
    161157    /** In use by our code. (for power suspend) */
    162158    volatile bool       fInUse;
     159    /** Toggle bit for signaling new ASIDs (during suspend/resume)  */
     160    bool                fASIDState;
    163161} HMGLOBLCPUINFO;
    164162/** Pointer to the per-cpu global information. */
     
    548546    bool                        fForceTLBFlush;
    549547
     548    /** Toggle bit for acquiring a new ASID (during host CPU suspend/resume) */
     549    bool                        fASIDState;
     550
    550551    /** Set when we're using VT-x or AMD-V at that moment. */
    551552    bool                        fActive;
     
    553554    /** Set when the TLB has been checked until we return from the world switch. */
    554555    volatile bool               fCheckedTLBFlush;
    555     uint8_t                     bAlignment[3];
     556    uint8_t                     bAlignment[2];
    556557
    557558    /** World switch exit counter. */
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