Changeset 42044 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 9, 2012 6:04:54 AM (13 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r41965 r42044 867 867 pCpu->uCurrentASID = 0; /* we'll aways increment this the first time (host uses ASID 0) */ 868 868 pCpu->cTLBFlushes = 0; 869 pCpu->fASIDState = true; 869 870 870 871 /* Should never happen */ … … 1239 1240 pVCpu->hwaccm.s.idLastCpu = NIL_RTCPUID; 1240 1241 1241 /* we'll aways increment this the first time (host uses ASID 0) */1242 /* We'll aways increment this the first time (host uses ASID 0) */ 1242 1243 pVCpu->hwaccm.s.uCurrentASID = 0; 1243 1244 } -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r42036 r42044 166 166 * Ensure each VCPU scheduled on this CPU gets a new VPID on resume. See @bugref{6255}. 167 167 */ 168 pCpu-> uCurrentASID = 0;168 pCpu->fASIDState = !pCpu->fASIDState; 169 169 170 170 return VINF_SUCCESS; … … 2401 2401 if ( pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu 2402 2402 || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes 2403 || p Cpu->uCurrentASID == 0)2403 || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState) 2404 2404 { 2405 2405 pVCpu->hwaccm.s.fForceTLBFlush = true; … … 2452 2452 } 2453 2453 2454 pVCpu->hwaccm.s.fASIDState = pCpu->fASIDState; 2454 2455 pVCpu->hwaccm.s.cTLBFlushes = pCpu->cTLBFlushes; 2455 2456 pVCpu->hwaccm.s.fForceTLBFlush = false; … … 2458 2459 { 2459 2460 AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID, 2460 ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu\n", 2461 ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu" 2462 "hwaccm->fASIDState=%d cpu->fASIDState=%d\n", 2461 2463 pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes, 2462 pCpu->uCurrentASID, pCpu->cTLBFlushes ));2464 pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState)); 2463 2465 2464 2466 /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should … … 2527 2529 if ( pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu 2528 2530 || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes 2529 || p Cpu->uCurrentASID == 0)2531 || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState) 2530 2532 { 2531 2533 pVCpu->hwaccm.s.fForceTLBFlush = true; … … 2540 2542 pVCpu->hwaccm.s.idLastCpu = pCpu->idCpu; 2541 2543 pVCpu->hwaccm.s.cTLBFlushes = pCpu->cTLBFlushes; 2544 pVCpu->hwaccm.s.fASIDState = pCpu->fASIDState; 2542 2545 2543 2546 if (pVCpu->hwaccm.s.fForceTLBFlush) … … 2593 2596 if ( pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu 2594 2597 || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes 2595 || p Cpu->uCurrentASID == 0)2598 || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState) 2596 2599 { 2597 2600 /* Force a TLB flush on VM entry. */ … … 2622 2625 pVCpu->hwaccm.s.cTLBFlushes = pCpu->cTLBFlushes; 2623 2626 pVCpu->hwaccm.s.uCurrentASID = pCpu->uCurrentASID; 2627 pVCpu->hwaccm.s.fASIDState = pCpu->fASIDState; 2624 2628 if (pCpu->fFlushASIDBeforeUse) 2625 2629 hmR0VmxFlushVPID(pVM, pVCpu, pVM->hwaccm.s.vmx.enmFlushVPID, 0 /* GCPtr */); … … 2627 2631 else 2628 2632 { 2629 Assert(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID); 2633 AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID, 2634 ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu" 2635 "hwaccm->fASIDState=%d cpu->fASIDState=%d\n", 2636 pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes, 2637 pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState)); 2630 2638 2631 2639 /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should -
trunk/src/VBox/VMM/include/HWACCMInternal.h
r42025 r42044 149 149 /** TLB flush count. */ 150 150 uint32_t cTLBFlushes; 151 152 151 /** Whether to flush each new ASID/VPID before use. */ 153 152 bool fFlushASIDBeforeUse; 154 155 153 /** Configured for VT-x or AMD-V. */ 156 154 bool fConfigured; 157 158 155 /** Set if the VBOX_HWVIRTEX_IGNORE_SVM_IN_USE hack is active. */ 159 156 bool fIgnoreAMDVInUseError; 160 161 157 /** In use by our code. (for power suspend) */ 162 158 volatile bool fInUse; 159 /** Toggle bit for signaling new ASIDs (during suspend/resume) */ 160 bool fASIDState; 163 161 } HMGLOBLCPUINFO; 164 162 /** Pointer to the per-cpu global information. */ … … 548 546 bool fForceTLBFlush; 549 547 548 /** Toggle bit for acquiring a new ASID (during host CPU suspend/resume) */ 549 bool fASIDState; 550 550 551 /** Set when we're using VT-x or AMD-V at that moment. */ 551 552 bool fActive; … … 553 554 /** Set when the TLB has been checked until we return from the world switch. */ 554 555 volatile bool fCheckedTLBFlush; 555 uint8_t bAlignment[ 3];556 uint8_t bAlignment[2]; 556 557 557 558 /** World switch exit counter. */
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