Changeset 42504 in vbox
- Timestamp:
- Aug 1, 2012 12:35:11 PM (12 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r42486 r42504 1116 1116 * Intel: Cache and TLB information 1117 1117 * AMD: Reserved 1118 * VIA: Reserved 1118 1119 * Safe to expose; restrict the number of calls to 1 for the portable case. 1119 1120 */ … … 1130 1131 * ECX, EDX - Processor Serial Number if available, otherwise reserved 1131 1132 * AMD: Reserved 1133 * VIA: Reserved 1132 1134 * Safe to expose 1133 1135 */ … … 1143 1145 * Note: Depends on the ECX input! -> Feeling rather lazy now, so we just return 0 1144 1146 * AMD: Reserved 1147 * VIA: Reserved 1145 1148 * Safe to expose, except for EAX: 1146 1149 * Bits 25-14: Maximum number of addressable IDs for logical processors sharing this cache (see note)** … … 1151 1154 pCPUM->aGuestCpuIdStd[4].eax = pCPUM->aGuestCpuIdStd[4].ebx = 0; 1152 1155 #ifdef VBOX_WITH_MULTI_CORE 1153 if ( 1154 && 1156 if ( pVM->cCpus > 1 1157 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_INTEL) 1155 1158 { 1156 1159 AssertReturn(pVM->cCpus <= 64, VERR_TOO_MANY_CPUS); … … 1167 1170 * EAX, EBX - Smallest and largest monitor line size 1168 1171 * ECX - extensions (ignored for now) 1172 * VIA: Reserved 1169 1173 * Safe to expose 1170 1174 */ … … 1205 1209 * AMD: 0x800000005 L1 cache information 1206 1210 * 0x800000006 L2/L3 cache information 1211 * VIA: 0x800000005 TLB and L1 cache information 1212 * 0x800000006 L2 cache information 1207 1213 */ 1208 1214 1209 1215 /* Cpuid 0x800000007: 1216 * Intel: Reserved 1210 1217 * AMD: EAX, EBX, ECX - reserved 1211 1218 * EDX: Advanced Power Management Information 1212 * Intel:Reserved1219 * VIA: Reserved 1213 1220 */ 1214 1221 if (pCPUM->aGuestCpuIdExt[0].eax >= UINT32_C(0x80000007)) … … 1243 1250 1244 1251 /* Cpuid 0x800000008: 1252 * Intel: EAX: Virtual/Physical address Size 1253 * EBX, ECX, EDX - reserved 1245 1254 * AMD: EBX, EDX - reserved 1246 1255 * EAX: Virtual/Physical/Guest address Size 1247 1256 * ECX: Number of cores + APICIdCoreIdSize 1248 * Intel: EAX: Virtual/Physical address Size1257 * VIA: EAX: Virtual/Physical address size 1249 1258 * EBX, ECX, EDX - reserved 1250 1259 */
Note:
See TracChangeset
for help on using the changeset viewer.