- Timestamp:
- Aug 11, 2012 10:47:03 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r42777 r42778 75 75 * context. */ 76 76 //#define IEM_VERIFICATION_MODE_MINIMAL 77 //#define IEM_LOG_MEMORY_WRITES 77 78 78 79 /******************************************************************************* … … 635 636 636 637 637 #if def IEM_VERIFICATION_MODE_MINIMAL638 #if defined(IEM_VERIFICATION_MODE_MINIMAL) || defined(IEM_LOG_MEMORY_WRITES) 638 639 /** What IEM just wrote. */ 639 640 uint8_t g_abIemWrote[256]; … … 729 730 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu); 730 731 731 #if defined(VBOX_STRICT) && (defined(IEM_VERIFICATION_MODE_FULL) || defined(VBOX_WITH_RAW_MODE_NOT_R0))732 #if defined(VBOX_STRICT) && (defined(IEM_VERIFICATION_MODE_FULL) || !defined(VBOX_WITH_RAW_MODE_NOT_R0)) 732 733 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->cs)); 733 734 Assert(CPUMSELREG_ARE_HIDDEN_PARTS_VALID(pVCpu, &pCtx->ss)); … … 4737 4738 /* Force the alternative path so we can ignore writes. */ 4738 4739 if ((fAccess & IEM_ACCESS_TYPE_WRITE) && !pIemCpu->fNoRem) 4740 return VERR_PGM_PHYS_TLB_CATCH_ALL; 4741 #endif 4742 #ifdef IEM_LOG_MEMORY_WRITES 4743 if (fAccess & IEM_ACCESS_TYPE_WRITE) 4739 4744 return VERR_PGM_PHYS_TLB_CATCH_ALL; 4740 4745 #endif … … 4924 4929 } 4925 4930 #endif 4926 #if def IEM_VERIFICATION_MODE_MINIMAL4931 #if defined(IEM_VERIFICATION_MODE_MINIMAL) || defined(IEM_LOG_MEMORY_WRITES) 4927 4932 if (rc == VINF_SUCCESS) 4928 4933 { -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
r42777 r42778 2796 2796 if (rcStrict == VINF_SUCCESS) 2797 2797 { 2798 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))2798 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 2799 2799 rcStrict = CPUMSetGuestGDTR(IEMCPU_TO_VMCPU(pIemCpu), GCPtrBase, cbLimit); 2800 2800 else … … 2854 2854 if (rcStrict == VINF_SUCCESS) 2855 2855 { 2856 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))2856 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 2857 2857 CPUMSetGuestIDTR(IEMCPU_TO_VMCPU(pIemCpu), GCPtrBase, cbLimit); 2858 2858 else … … 2924 2924 { 2925 2925 Log(("lldt %04x: Loading NULL selector.\n", uNewLdt)); 2926 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))2926 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 2927 2927 CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), uNewLdt); 2928 2928 else … … 2991 2991 */ 2992 2992 /** @todo check if the actual value is loaded or if the RPL is dropped */ 2993 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))2993 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 2994 2994 CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), uNewLdt & X86_SEL_MASK_OFF_RPL); 2995 2995 else … … 3112 3112 */ 3113 3113 /** @todo check if the actual value is loaded or if the RPL is dropped */ 3114 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3114 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3115 3115 CPUMSetGuestTR(IEMCPU_TO_VMCPU(pIemCpu), uNewTr & X86_SEL_MASK_OFF_RPL); 3116 3116 else … … 3149 3149 case 4: crX = pCtx->cr4; break; 3150 3150 case 8: 3151 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3151 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3152 3152 IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(("Implement CR8/TPR read\n")); /** @todo implement CR8 reading and writing. */ 3153 3153 else … … 3260 3260 NewEFER &= ~MSR_K6_EFER_LME; 3261 3261 3262 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3262 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3263 3263 CPUMSetGuestEFER(pVCpu, NewEFER); 3264 3264 else … … 3270 3270 * Inform PGM. 3271 3271 */ 3272 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3272 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3273 3273 { 3274 3274 if ( (uNewCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) … … 3337 3337 3338 3338 /* Make the change. */ 3339 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3339 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3340 3340 { 3341 3341 rc = CPUMSetGuestCR3(pVCpu, uNewCrX); … … 3346 3346 3347 3347 /* Inform PGM. */ 3348 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3348 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3349 3349 { 3350 3350 if (pCtx->cr0 & X86_CR0_PG) 3351 3351 { 3352 rc = PGMFlushTLB(pVCpu, pCtx->cr3, !(pCtx->cr 3& X86_CR4_PGE));3352 rc = PGMFlushTLB(pVCpu, pCtx->cr3, !(pCtx->cr4 & X86_CR4_PGE)); 3353 3353 AssertRCReturn(rc, rc); 3354 3354 /* ignore informational status codes */ … … 3397 3397 * Change it. 3398 3398 */ 3399 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3399 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3400 3400 { 3401 3401 rc = CPUMSetGuestCR4(pVCpu, uNewCrX); … … 3409 3409 * Notify SELM and PGM. 3410 3410 */ 3411 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3411 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3412 3412 { 3413 3413 /* SELM - VME may change things wrt to the TSS shadowing. */ … … 3420 3420 3421 3421 /* PGM - flushing and mode. */ 3422 if ( (uNewCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) 3423 != (uOldCrX & (X86_CR0_PG | X86_CR0_WP | X86_CR0_PE)) ) 3422 if ((uNewCrX ^ uOldCrX) & (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE)) 3424 3423 { 3425 3424 rc = PGMFlushTLB(pVCpu, pCtx->cr3, true /* global */); … … 3438 3437 */ 3439 3438 case 8: 3440 if (!IEM_ VERIFICATION_ENABLED(pIemCpu))3439 if (!IEM_FULL_VERIFICATION_ENABLED(pIemCpu)) 3441 3440 IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(("Implement CR8/TPR read\n")); /** @todo implement CR8 reading and writing. */ 3442 3441 else -
trunk/src/VBox/VMM/include/IEMInternal.h
r42777 r42778 480 480 #endif 481 481 482 /** 483 * Tests if full verification mode is enabled. 484 * 485 * This expands to @c false when IEM_VERIFICATION_MODE is not defined and 486 * should therefore cause the compiler to eliminate the verification branch 487 * of an if statement. */ 488 #ifdef IEM_VERIFICATION_MODE_FULL 489 # define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem) 490 #else 491 # define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false) 492 #endif 493 482 494 /** @def IEM_VERIFICATION_MODE 483 495 * Indicates that one of the verfication modes are enabled.
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