VirtualBox

Ignore:
Timestamp:
Sep 14, 2012 3:55:26 PM (12 years ago)
Author:
vboxsync
Message:

BusLogic: Minor emulation improvements (see #5112).

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Storage/DevBusLogic.cpp

    r40963 r43329  
    6969#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
    7070
     71/** The duration of software-initiated reset. Not documented, set to 500 us. */
     72#define BUSLOGIC_RESET_DURATION_NS      (500*1000)
     73
    7174/**
    7275 * State of a device attached to the buslogic host adapter.
     
    121124enum BUSLOGICCOMMAND
    122125{
    123     BUSLOGICCOMMAND_TEST_COMMAND_COMPLETE_INTERRUPT = 0x00,
     126    BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
    124127    BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
    125128    BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
     
    249252#pragma pack()
    250253
    251 #pragma pack(1)
    252254/**
    253255 * The local Ram.
     
    267269} HostAdapterLocalRam, *PHostAdapterLocalRam;
    268270AssertCompileSize(HostAdapterLocalRam, 256);
    269 #pragma pack()
    270271
    271272/** Pointer to a task state structure. */
     
    304305    /** Geometry register - Readonly. */
    305306    volatile uint8_t                regGeometry;
     307    /** Pending (delayed) interrupt. */
     308    uint8_t                         uPendingIntr;
    306309
    307310    /** Local RAM for the fetch hostadapter local RAM request.
     
    345348#endif
    346349
     350    /** Time when HBA reset was last initiated. */  //@todo: does this need to be saved?
     351    uint64_t                        u64ResetTime;
    347352    /** Physical base address of the outgoing mailboxes. */
    348353    RTGCPHYS                        GCPhysAddrMailboxOutgoingBase;
     
    442447/** Fields for the interrupt register. */
    443448# define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED      RT_BIT(0)
    444 # define BUSLOGIC_REGISTER_INTERRUPT_OUTCOMING_MAILBOX_AVAILABLE  RT_BIT(1)
     449# define BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE   RT_BIT(1)
    445450# define BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE             RT_BIT(2)
    446451# define BUSLOGIC_REGISTER_INTERRUPT_EXTERNAL_BUS_RESET           RT_BIT(3)
     
    451456
    452457/* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
    453 #pragma pack(1)
    454458typedef struct ReplyInquirePCIHostAdapterInformation
    455459{
     
    467471} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
    468472AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
    469 #pragma pack()
    470473
    471474/* Structure for the INQUIRE_CONFIGURATION reply. */
    472 #pragma pack(1)
    473475typedef struct ReplyInquireConfiguration
    474476{
     
    489491} ReplyInquireConfiguration, *PReplyInquireConfiguration;
    490492AssertCompileSize(ReplyInquireConfiguration, 3);
    491 #pragma pack()
    492493
    493494/* Structure for the INQUIRE_SETUP_INFORMATION reply. */
    494 #pragma pack(1)
    495495typedef struct ReplyInquireSetupInformationSynchronousValue
    496496{
     
    500500}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
    501501AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
    502 #pragma pack()
    503 
    504 #pragma pack(1)
     502
    505503typedef struct ReplyInquireSetupInformation
    506504{
     
    527525} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
    528526AssertCompileSize(ReplyInquireSetupInformation, 34);
    529 #pragma pack()
    530527
    531528/* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
     
    789786
    790787/**
     788 * Assert IRQ line of the BusLogic adapter.
     789 *
     790 * @returns nothing.
     791 * @param   pBusLogic       Pointer to the BusLogic device instance.
     792 * @param   fSuppressIrq    Flag to suppress IRQ generation regardless of fIRQEnabled
     793 * @param   uFlag           Type of interrupt being generated.
     794 */
     795static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
     796{
     797    LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
     798
     799    /* The CMDC interrupt has priority over IMBL and MBOR. */
     800    if (uIrqType & (BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED | BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE))
     801    {
     802        if (!(pBusLogic->regInterrupt & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE))
     803            pBusLogic->regInterrupt |= uIrqType;    /* Report now. */
     804        else
     805            pBusLogic->uPendingIntr |= uIrqType;    /* Report later. */
     806    }
     807    else if (uIrqType & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE)
     808    {
     809        Assert(!pBusLogic->regInterrupt);
     810        pBusLogic->regInterrupt |= uIrqType;
     811    }
     812    else
     813        AssertMsgFailed(("Invalid interrupt state!\n"));
     814
     815    pBusLogic->regInterrupt |= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
     816    if (pBusLogic->fIRQEnabled && !fSuppressIrq)
     817        PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
     818}
     819
     820/**
    791821 * Deasserts the interrupt line of the BusLogic adapter.
    792822 *
     
    799829    pBusLogic->regInterrupt = 0;
    800830    PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
    801 }
    802 
    803 /**
    804  * Assert IRQ line of the BusLogic adapter.
    805  *
    806  * @returns nothing.
    807  * @param   pBusLogic       Pointer to the BusLogic device instance.
    808  * @param   fSuppressIrq    Flag to suppress IRQ generation regardless of fIRQEnabled
    809  */
    810 static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq)
    811 {
    812     LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
    813     pBusLogic->regInterrupt |= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
    814     if (pBusLogic->fIRQEnabled && !fSuppressIrq)
    815         PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
     831    /* If there's another pending interrupt, report it now. */
     832    if (pBusLogic->uPendingIntr)
     833    {
     834        buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
     835        pBusLogic->uPendingIntr = 0;
     836    }
    816837}
    817838
     
    876897    pBusLogic->regStatus = BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY | BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
    877898    pBusLogic->regInterrupt = 0;
     899    pBusLogic->uPendingIntr = 0;
    878900    pBusLogic->regGeometry = BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED;
    879901    pBusLogic->uOperationCode = 0xff; /* No command executing. */
     
    912934        /* Notify that the command is complete. */
    913935        pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
    914         pBusLogic->regInterrupt |= BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE;
    915 
    916         buslogicSetInterrupt(pBusLogic, fSuppressIrq);
     936        buslogicSetInterrupt(pBusLogic, fSuppressIrq, BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE);
    917937    }
    918938
     
    931951{
    932952    LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
     953
     954    /* Remember when the guest initiated a reset. */
     955    pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
    933956
    934957    buslogicHwReset(pBusLogic);
     
    9871010#endif
    9881011
    989     pBusLogic->regInterrupt |= BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED;
    990     buslogicSetInterrupt(pBusLogic, false);
     1012    buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED);
    9911013
    9921014    PDMCritSectLeave(&pBusLogic->CritSectIntr);
     
    13181340    switch (pBusLogic->uOperationCode)
    13191341    {
     1342        case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
     1343            /* Valid command, no reply. */
     1344            pBusLogic->cbReplyParametersLeft = 0;
     1345            break;
    13201346        case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
    13211347        {
     
    13261352            pReply->InformationIsValid = 0;
    13271353            pReply->IsaIOPort = 0xff; /* Make it invalid. */
     1354            pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
    13281355            pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
    13291356            break;
     
    13671394            break;
    13681395        }
     1396        case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
     1397            /* The parameter list length is determined by the first byte of the command buffer. */
     1398            if (pBusLogic->iParameter == 1)
     1399            {
     1400                /* First pass - set the number of following parameter bytes. */
     1401                pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
     1402                Log(("Set HA options: %u bytes follow\n", pBusLogic->aCommandBuffer[0]));
     1403            }
     1404            else
     1405            {
     1406                /* Second pass - process received data. */
     1407                Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
     1408                /* We ignore the data - it only concerns the SCSI hardware protocol. */
     1409            }
     1410            pBusLogic->cbReplyParametersLeft = 0;
     1411            break;
     1412
    13691413        case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
    13701414        {
     
    13841428        case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
    13851429        {
     1430            uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
     1431
    13861432            pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
    13871433            PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
     
    13891435
    13901436            pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
    1391             /*
    1392              * The rest of this reply only applies for ISA adapters.
    1393              * This is a PCI adapter so they are not important and are skipped.
    1394              */
     1437            //@todo: What should the DMA channel be?
     1438            pReply->fDmaChannel6  = 1;
     1439            /* The IRQ is not necessarily representable in this structure. */
     1440            switch (uPciIrq) {
     1441            case 9:     pReply->fIrqChannel9  = 1; break;
     1442            case 10:    pReply->fIrqChannel10 = 1; break;
     1443            case 11:    pReply->fIrqChannel11 = 1; break;
     1444            case 12:    pReply->fIrqChannel12 = 1; break;
     1445            case 14:    pReply->fIrqChannel14 = 1; break;
     1446            case 15:    pReply->fIrqChannel15 = 1; break;
     1447            default:   
     1448                Log(("Inquire configuration: PCI IRQ %d cannot be represented\n", uPciIrq));
     1449                break;
     1450            }
    13951451            break;
    13961452        }
     
    14051461            pReply->uBusType = 'E';         /* EISA style */
    14061462            pReply->u16ScatterGatherLimit = 8192;
     1463            pReply->cMailbox = pBusLogic->cMailbox;
     1464            pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
    14071465            pReply->fLevelSensitiveInterrupt = true;
    14081466            pReply->fHostWideSCSI = true;
     
    14441502            Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
    14451503            Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
    1446             Log(("cMailboxes=%u\n", pBusLogic->cMailbox));
     1504            Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
     1505            LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
    14471506
    14481507            pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
     
    14741533            break;
    14751534        }
     1535        case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
     1536            /* This is supposed to send TEST UNIT READY to each target/LUN.
     1537             * We cheat and skip that, since we already know what's attached
     1538             */
     1539            memset(pBusLogic->aReplyBuffer, 0, 8);
     1540            for (int i = 0; i < 8; ++i)
     1541            {
     1542                if (pBusLogic->aDeviceStates[i].fPresent)
     1543                    pBusLogic->aReplyBuffer[i] = 1;
     1544            }
     1545            pBusLogic->aReplyBuffer[7] = 0;     /* HA hardcoded at ID 7. */
     1546            pBusLogic->cbReplyParametersLeft = 8;
     1547            break;
    14761548        case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
    14771549        {
     
    15281600            break;
    15291601        }
     1602        default:
     1603            AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
    15301604        case BUSLOGICCOMMAND_EXT_BIOS_INFO:
    15311605        case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
     
    15381612            break;
    15391613        case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
    1540         default:
    1541             AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
     1614            AssertMsgFailed(("Invalid mailbox execute state!\n"));
    15421615    }
    15431616
     
    15471620    if (pBusLogic->cbReplyParametersLeft)
    15481621        pBusLogic->regStatus |= BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
    1549     else
     1622    else if (!pBusLogic->cbCommandParametersLeft)
    15501623        buslogicCommandComplete(pBusLogic, fSuppressIrq);
    15511624
     
    15701643        {
    15711644            *pu32 = pBusLogic->regStatus;
    1572             /*
    1573              * If the diagnostic active bit is set we are in a hard reset initiated from the guest.
    1574              * The guest reads the status register and waits that the host adapter ready bit is set.
     1645
     1646            /* If the diagnostic active bit is set, we are in a guest-initiated
     1647             * hard or soft reset. If the guest reads the status register and
     1648             * waits for the host adapter ready bit to be set, we terminate the
     1649             * reset right away. However, guests may also expect the reset
     1650             * condition to clear automatically after a period of time.
    15751651             */
    15761652            if (pBusLogic->regStatus & BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE)
    15771653            {
     1654                uint64_t    u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
     1655
    15781656                pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
    15791657                pBusLogic->regStatus |= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
     1658                if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
     1659                {
     1660                    /* Let the guest see the ready condition right away. */
     1661                    *pu32 &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
     1662                    *pu32 |= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
     1663                    pBusLogic->u64ResetTime = 0;
     1664                }
    15801665            }
    15811666            break;
     
    15881673                *pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
    15891674
    1590             pBusLogic->iReply++;
    1591             pBusLogic->cbReplyParametersLeft--;
    1592 
    1593             LogFlowFunc(("cbReplyParametersLeft=%u\n", pBusLogic->cbReplyParametersLeft));
    1594             if (!pBusLogic->cbReplyParametersLeft)
     1675            /* Careful about underflow - guest can read data register even if
     1676             * no data is available.
     1677             */
     1678            if (pBusLogic->cbReplyParametersLeft)
    15951679            {
    1596                 /*
    1597                  * Reply finished, set command complete bit, unset data in ready bit and
    1598                  * interrupt the guest if enabled.
    1599                  */
    1600                 buslogicCommandComplete(pBusLogic, false);
     1680                pBusLogic->iReply++;
     1681                pBusLogic->cbReplyParametersLeft--;
     1682                if (!pBusLogic->cbReplyParametersLeft)
     1683                {
     1684                    /*
     1685                     * Reply finished, set command complete bit, unset data-in ready bit and
     1686                     * interrupt the guest if enabled.
     1687                     */
     1688                    buslogicCommandComplete(pBusLogic, false);
     1689                }
    16011690            }
     1691            LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
     1692                         pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
    16021693            break;
    16031694        }
     
    16441735#ifdef LOG_ENABLED
    16451736            uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
    1646             Log(("%u incoming mailboxes are ready when this interrupt was cleared\n", cMailboxesReady));
     1737            Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
    16471738#endif
    16481739
     
    16951786                switch (pBusLogic->uOperationCode)
    16961787                {
     1788                    case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
    16971789                    case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
    16981790                    case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
     
    17001792                    case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
    17011793                    case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
     1794                    case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
    17021795                    case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
    17031796                        pBusLogic->cbCommandParametersLeft = 0;
     
    17211814                    case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
    17221815                        pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
     1816                        break;
     1817                    case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
     1818                        /* There must be at least one byte following this command. */
     1819                        pBusLogic->cbCommandParametersLeft = 1;
    17231820                        break;
    17241821                    case BUSLOGICCOMMAND_EXT_BIOS_INFO:
     
    18261923{
    18271924    PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);;
    1828     unsigned iRegister = Port - pBusLogic->IOPortBase;
     1925    unsigned iRegister = Port % 4;
    18291926
    18301927    Assert(cb == 1);
     
    18491946    PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
    18501947    int rc = VINF_SUCCESS;
    1851     unsigned iRegister = Port - pBusLogic->IOPortBase;
     1948    unsigned iRegister = Port % 4;
    18521949    uint8_t uVal = (uint8_t)u32;
    18531950
     
    18741971 * @param   cb          Number of bytes read.
    18751972 */
    1876 static int  buslogicIsaIOPortRead (PPDMDEVINS pDevIns, void *pvUser,
     1973static int  buslogicBIOSIOPortRead (PPDMDEVINS pDevIns, void *pvUser,
    18771974                                   RTIOPORT Port, uint32_t *pu32, unsigned cb)
    18781975{
     
    20082105 * @param   cb          The value size in bytes.
    20092106 */
    2010 static int buslogicIsaIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,
     2107static int buslogicBIOSIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,
    20112108                                   RTIOPORT Port, uint32_t u32, unsigned cb)
    20122109{
     
    20382135 * @see FNIOMIOPORTOUTSTRING for details.
    20392136 */
    2040 static DECLCALLBACK(int) buslogicIsaIOPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
     2137static DECLCALLBACK(int) buslogicBIOSIOPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
    20412138{
    20422139    PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
     
    20632160 * @see FNIOMIOPORTINSTRING for details.
    20642161 */
    2065 static DECLCALLBACK(int) buslogicIsaIOPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
     2162static DECLCALLBACK(int) buslogicBIOSIOPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
    20662163{
    20672164    PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
     
    20912188        rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
    20922189                                   IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
    2093                                    buslogicMMIOWrite, buslogicMMIORead, "BusLogic");
     2190                                   buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
    20942191        if (RT_FAILURE(rc))
    20952192            return rc;
     
    21162213    {
    21172214        rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
    2118                                      NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic");
     2215                                     NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
    21192216        if (RT_FAILURE(rc))
    21202217            return rc;
     
    21232220        {
    21242221            rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
    2125                                            0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic");
     2222                                           0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
    21262223            if (RT_FAILURE(rc))
    21272224                return rc;
     
    21312228        {
    21322229            rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
    2133                                            0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic");
     2230                                           0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
    21342231            if (RT_FAILURE(rc))
    21352232                return rc;
     
    22032300                AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
    22042301        }
    2205 
    2206         /* Add task to the cache. */
     2302        /* Remove task from the cache. */
    22072303        RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
    22082304    }
     
    22352331    int rc = VINF_SUCCESS;
    22362332
    2237     /* Fetch CCB. */
     2333    /* Fetch the CCB from guest memory. */
    22382334    RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
    22392335    PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
     
    23712467    }
    23722468
    2373     LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, pTaskState->MailboxGuest.u32PhysAddrCCB));
     2469    LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
    23742470#ifdef DEBUG
    23752471    buslogicDumpMailboxInfo(&pTaskState->MailboxGuest, true);
     
    31283224        /* Register I/O port space in ISA region for BIOS access. */
    31293225        rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 3, NULL,
    3130                                      buslogicIsaIOPortWrite, buslogicIsaIOPortRead,
    3131                                      buslogicIsaIOPortWriteStr, buslogicIsaIOPortReadStr,
     3226                                     buslogicBIOSIOPortWrite, buslogicBIOSIOPortRead,
     3227                                     buslogicBIOSIOPortWriteStr, buslogicBIOSIOPortReadStr,
    31323228                                     "BusLogic BIOS");
    31333229        if (RT_FAILURE(rc))
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