Changeset 43700 in vbox for trunk/include/VBox/vmm
- Timestamp:
- Oct 22, 2012 3:15:51 PM (12 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/hm_vmx.h
r43657 r43700 735 735 * @{ 736 736 */ 737 #define VMX_VMCS _HOST_FIELD_PAT_FULL 0x2C00738 #define VMX_VMCS _HOST_FIELD_PAT_HIGH 0x2C01739 #define VMX_VMCS _HOST_FIELD_EFER_FULL 0x2C02740 #define VMX_VMCS _HOST_FIELD_EFER_HIGH 0x2C03741 #define VMX_VMCS _HOST_PERF_GLOBAL_CTRL_FULL 0x2C04 /**< MSR IA32_PERF_GLOBAL_CTRL */742 #define VMX_VMCS _HOST_PERF_GLOBAL_CTRL_HIGH 0x2C05 /**< MSR IA32_PERF_GLOBAL_CTRL */737 #define VMX_VMCS64_HOST_FIELD_PAT_FULL 0x2C00 738 #define VMX_VMCS64_HOST_FIELD_PAT_HIGH 0x2C01 739 #define VMX_VMCS64_HOST_FIELD_EFER_FULL 0x2C02 740 #define VMX_VMCS64_HOST_FIELD_EFER_HIGH 0x2C03 741 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_FULL 0x2C04 /**< MSR IA32_PERF_GLOBAL_CTRL */ 742 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_HIGH 0x2C05 /**< MSR IA32_PERF_GLOBAL_CTRL */ 743 743 /** @} */ 744 744 … … 747 747 * @{ 748 748 */ 749 #define VMX_VMCS _CTRL_IO_BITMAP_A_FULL 0x2000750 #define VMX_VMCS _CTRL_IO_BITMAP_A_HIGH 0x2001751 #define VMX_VMCS _CTRL_IO_BITMAP_B_FULL 0x2002752 #define VMX_VMCS _CTRL_IO_BITMAP_B_HIGH 0x2003749 #define VMX_VMCS64_CTRL_IO_BITMAP_A_FULL 0x2000 750 #define VMX_VMCS64_CTRL_IO_BITMAP_A_HIGH 0x2001 751 #define VMX_VMCS64_CTRL_IO_BITMAP_B_FULL 0x2002 752 #define VMX_VMCS64_CTRL_IO_BITMAP_B_HIGH 0x2003 753 753 754 754 /* Optional */ 755 #define VMX_VMCS _CTRL_MSR_BITMAP_FULL 0x2004756 #define VMX_VMCS _CTRL_MSR_BITMAP_HIGH 0x2005757 758 #define VMX_VMCS _CTRL_VMEXIT_MSR_STORE_FULL 0x2006759 #define VMX_VMCS _CTRL_VMEXIT_MSR_STORE_HIGH 0x2007760 #define VMX_VMCS _CTRL_VMEXIT_MSR_LOAD_FULL 0x2008761 #define VMX_VMCS _CTRL_VMEXIT_MSR_LOAD_HIGH 0x2009762 763 #define VMX_VMCS _CTRL_VMENTRY_MSR_LOAD_FULL 0x200A764 #define VMX_VMCS _CTRL_VMENTRY_MSR_LOAD_HIGH 0x200B765 766 #define VMX_VMCS _CTRL_EXEC_VMCS_PTR_FULL 0x200C767 #define VMX_VMCS _CTRL_EXEC_VMCS_PTR_HIGH 0x200D768 769 #define VMX_VMCS _CTRL_TSC_OFFSET_FULL 0x2010770 #define VMX_VMCS _CTRL_TSC_OFFSET_HIGH 0x2011755 #define VMX_VMCS64_CTRL_MSR_BITMAP_FULL 0x2004 756 #define VMX_VMCS64_CTRL_MSR_BITMAP_HIGH 0x2005 757 758 #define VMX_VMCS64_CTRL_VMEXIT_MSR_STORE_FULL 0x2006 759 #define VMX_VMCS64_CTRL_VMEXIT_MSR_STORE_HIGH 0x2007 760 #define VMX_VMCS64_CTRL_VMEXIT_MSR_LOAD_FULL 0x2008 761 #define VMX_VMCS64_CTRL_VMEXIT_MSR_LOAD_HIGH 0x2009 762 763 #define VMX_VMCS64_CTRL_VMENTRY_MSR_LOAD_FULL 0x200A 764 #define VMX_VMCS64_CTRL_VMENTRY_MSR_LOAD_HIGH 0x200B 765 766 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_FULL 0x200C 767 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_HIGH 0x200D 768 769 #define VMX_VMCS64_CTRL_TSC_OFFSET_FULL 0x2010 770 #define VMX_VMCS64_CTRL_TSC_OFFSET_HIGH 0x2011 771 771 772 772 /** Optional (VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW) */ 773 #define VMX_VMCS _CTRL_VAPIC_PAGEADDR_FULL 0x2012774 #define VMX_VMCS _CTRL_VAPIC_PAGEADDR_HIGH 0x2013773 #define VMX_VMCS64_CTRL_VAPIC_PAGEADDR_FULL 0x2012 774 #define VMX_VMCS64_CTRL_VAPIC_PAGEADDR_HIGH 0x2013 775 775 776 776 /** Optional (VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC) */ 777 #define VMX_VMCS_CTRL_APIC_ACCESSADDR_FULL 0x2014 778 #define VMX_VMCS_CTRL_APIC_ACCESSADDR_HIGH 0x2015 777 #define VMX_VMCS64_CTRL_APIC_ACCESSADDR_FULL 0x2014 778 #define VMX_VMCS64_CTRL_APIC_ACCESSADDR_HIGH 0x2015 779 780 /** Optional (VMX_VMCS_CTRL_PROC_EXEC2_VMFUNC) */ 781 #define VMX_VMCS64_CTRL_VMFUNC_CTRLS_FULL 0x2018 782 #define VMX_VMCS64_CTRL_VMFUNC_CTRLS_HIGH 0x2019 779 783 780 784 /** Extended page table pointer. */ 781 #define VMX_VMCS_CTRL_EPTP_FULL 0x201a 782 #define VMX_VMCS_CTRL_EPTP_HIGH 0x201b 783 784 /** VM-exit phyiscal address. */ 785 #define VMX_VMCS_EXIT_PHYS_ADDR_FULL 0x2400 786 #define VMX_VMCS_EXIT_PHYS_ADDR_HIGH 0x2401 785 #define VMX_VMCS64_CTRL_EPTP_FULL 0x201a 786 #define VMX_VMCS64_CTRL_EPTP_HIGH 0x201b 787 788 /** Extended page table pointer lists. */ 789 #define VMX_VMCS64_CTRL_EPTP_LIST_FULL 0x2024 790 #define VMX_VMCS64_CTRL_EPTP_LIST_HIGH 0x2025 791 792 /** VM-exit guest phyiscal address. */ 793 #define VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL 0x2400 794 #define VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_HIGH 0x2401 787 795 /** @} */ 788 796 … … 791 799 * @{ 792 800 */ 793 #define VMX_VMCS _GUEST_LINK_PTR_FULL0x2800794 #define VMX_VMCS _GUEST_LINK_PTR_HIGH0x2801795 #define VMX_VMCS _GUEST_DEBUGCTL_FULL0x2802 /**< MSR IA32_DEBUGCTL */796 #define VMX_VMCS _GUEST_DEBUGCTL_HIGH0x2803 /**< MSR IA32_DEBUGCTL */797 #define VMX_VMCS _GUEST_PAT_FULL0x2804798 #define VMX_VMCS _GUEST_PAT_HIGH0x2805799 #define VMX_VMCS _GUEST_EFER_FULL0x2806800 #define VMX_VMCS _GUEST_EFER_HIGH0x2807801 #define VMX_VMCS _GUEST_PERF_GLOBAL_CTRL_FULL0x2808 /**< MSR IA32_PERF_GLOBAL_CTRL */802 #define VMX_VMCS _GUEST_PERF_GLOBAL_CTRL_HIGH0x2809 /**< MSR IA32_PERF_GLOBAL_CTRL */803 #define VMX_VMCS _GUEST_PDPTR0_FULL0x280A804 #define VMX_VMCS _GUEST_PDPTR0_HIGH0x280B805 #define VMX_VMCS _GUEST_PDPTR1_FULL0x280C806 #define VMX_VMCS _GUEST_PDPTR1_HIGH0x280D807 #define VMX_VMCS _GUEST_PDPTR2_FULL0x280E808 #define VMX_VMCS _GUEST_PDPTR2_HIGH0x280F809 #define VMX_VMCS _GUEST_PDPTR3_FULL0x2810810 #define VMX_VMCS _GUEST_PDPTR3_HIGH0x2811801 #define VMX_VMCS64_GUEST_VMCS_LINK_PTR_FULL 0x2800 802 #define VMX_VMCS64_GUEST_VMCS_LINK_PTR_HIGH 0x2801 803 #define VMX_VMCS64_GUEST_DEBUGCTL_FULL 0x2802 /**< MSR IA32_DEBUGCTL */ 804 #define VMX_VMCS64_GUEST_DEBUGCTL_HIGH 0x2803 /**< MSR IA32_DEBUGCTL */ 805 #define VMX_VMCS64_GUEST_PAT_FULL 0x2804 806 #define VMX_VMCS64_GUEST_PAT_HIGH 0x2805 807 #define VMX_VMCS64_GUEST_EFER_FULL 0x2806 808 #define VMX_VMCS64_GUEST_EFER_HIGH 0x2807 809 #define VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_FULL 0x2808 /**< MSR IA32_PERF_GLOBAL_CTRL */ 810 #define VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_HIGH 0x2809 /**< MSR IA32_PERF_GLOBAL_CTRL */ 811 #define VMX_VMCS64_GUEST_PDPTE0_FULL 0x280A 812 #define VMX_VMCS64_GUEST_PDPTE0_HIGH 0x280B 813 #define VMX_VMCS64_GUEST_PDPTE1_FULL 0x280C 814 #define VMX_VMCS64_GUEST_PDPTE1_HIGH 0x280D 815 #define VMX_VMCS64_GUEST_PDPTE2_FULL 0x280E 816 #define VMX_VMCS64_GUEST_PDPTE2_HIGH 0x280F 817 #define VMX_VMCS64_GUEST_PDPTE3_FULL 0x2810 818 #define VMX_VMCS64_GUEST_PDPTE3_HIGH 0x2811 811 819 /** @} */ 812 820 … … 815 823 * @{ 816 824 */ 817 #define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS 0x4000 818 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS 0x4002 819 #define VMX_VMCS_CTRL_EXCEPTION_BITMAP 0x4004 820 #define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MASK 0x4006 821 #define VMX_VMCS_CTRL_PAGEFAULT_ERROR_MATCH 0x4008 822 #define VMX_VMCS_CTRL_CR3_TARGET_COUNT 0x400A 823 #define VMX_VMCS_CTRL_EXIT_CONTROLS 0x400C 824 #define VMX_VMCS_CTRL_EXIT_MSR_STORE_COUNT 0x400E 825 #define VMX_VMCS_CTRL_EXIT_MSR_LOAD_COUNT 0x4010 826 #define VMX_VMCS_CTRL_ENTRY_CONTROLS 0x4012 827 #define VMX_VMCS_CTRL_ENTRY_MSR_LOAD_COUNT 0x4014 828 #define VMX_VMCS_CTRL_ENTRY_IRQ_INFO 0x4016 829 #define VMX_VMCS_CTRL_ENTRY_EXCEPTION_ERRCODE 0x4018 830 #define VMX_VMCS_CTRL_ENTRY_INSTR_LENGTH 0x401A 831 /** This field exists only on processors that support the 1-setting of the use TPR shadow VM-execution control. */ 832 #define VMX_VMCS_CTRL_TPR_THRESHOLD 0x401C 833 /** This field exists only on processors that support the 1-setting of the activate secondary controls VM-execution control. */ 834 #define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS2 0x401E 825 #define VMX_VMCS32_CTRL_PIN_EXEC_CONTROLS 0x4000 826 #define VMX_VMCS32_CTRL_PROC_EXEC_CONTROLS 0x4002 827 #define VMX_VMCS32_CTRL_EXCEPTION_BITMAP 0x4004 828 #define VMX_VMCS32_CTRL_PAGEFAULT_ERROR_MASK 0x4006 829 #define VMX_VMCS32_CTRL_PAGEFAULT_ERROR_MATCH 0x4008 830 #define VMX_VMCS32_CTRL_CR3_TARGET_COUNT 0x400A 831 #define VMX_VMCS32_CTRL_EXIT_CONTROLS 0x400C 832 #define VMX_VMCS32_CTRL_EXIT_MSR_STORE_COUNT 0x400E 833 #define VMX_VMCS32_CTRL_EXIT_MSR_LOAD_COUNT 0x4010 834 #define VMX_VMCS32_CTRL_ENTRY_CONTROLS 0x4012 835 #define VMX_VMCS32_CTRL_ENTRY_MSR_LOAD_COUNT 0x4014 836 #define VMX_VMCS32_CTRL_ENTRY_IRQ_INFO 0x4016 837 #define VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE 0x4018 838 #define VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH 0x401A 839 #define VMX_VMCS32_CTRL_TPR_THRESHOLD 0x401C 840 #define VMX_VMCS32_CTRL_PROC_EXEC_CONTROLS2 0x401E 835 841 /** @} */ 836 842 … … 918 924 /** A specified nr of pause loops cause a VM-exit. */ 919 925 #define VMX_VMCS_CTRL_PROC_EXEC2_PAUSE_LOOP_EXIT RT_BIT(10) 926 /** VM Exit when executing RDRAND instructions. */ 927 #define VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT RT_BIT(11) 928 /** Enables INVPCID instructions. */ 929 #define VMX_VMCS_CTRL_PROC_EXEC2_INVPCID RT_BIT(12) 930 /** Enables VMFUNC instructions. */ 931 #define VMX_VMCS_CTRL_PROC_EXEC2_VMFUNC RT_BIT(13) 920 932 /** @} */ 921 933 … … 1250 1262 * @{ 1251 1263 */ 1252 #define VMX_VMCS 64_GUEST_CR0 0x68001253 #define VMX_VMCS 64_GUEST_CR3 0x68021254 #define VMX_VMCS 64_GUEST_CR4 0x68041255 #define VMX_VMCS 64_GUEST_ES_BASE 0x68061256 #define VMX_VMCS 64_GUEST_CS_BASE 0x68081257 #define VMX_VMCS 64_GUEST_SS_BASE 0x680A1258 #define VMX_VMCS 64_GUEST_DS_BASE 0x680C1259 #define VMX_VMCS 64_GUEST_FS_BASE 0x680E1260 #define VMX_VMCS 64_GUEST_GS_BASE 0x68101261 #define VMX_VMCS 64_GUEST_LDTR_BASE 0x68121262 #define VMX_VMCS 64_GUEST_TR_BASE 0x68141263 #define VMX_VMCS 64_GUEST_GDTR_BASE 0x68161264 #define VMX_VMCS 64_GUEST_IDTR_BASE 0x68181265 #define VMX_VMCS 64_GUEST_DR7 0x681A1266 #define VMX_VMCS 64_GUEST_RSP 0x681C1267 #define VMX_VMCS 64_GUEST_RIP 0x681E1268 #define VMX_VMCS_GUEST_RFLAGS 1269 #define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS 1270 #define VMX_VMCS 64_GUEST_SYSENTER_ESP 0x6824 /**< MSR IA32_SYSENTER_ESP */1271 #define VMX_VMCS 64_GUEST_SYSENTER_EIP 0x6826 /**< MSR IA32_SYSENTER_EIP */1264 #define VMX_VMCS_GUEST_CR0 0x6800 1265 #define VMX_VMCS_GUEST_CR3 0x6802 1266 #define VMX_VMCS_GUEST_CR4 0x6804 1267 #define VMX_VMCS_GUEST_ES_BASE 0x6806 1268 #define VMX_VMCS_GUEST_CS_BASE 0x6808 1269 #define VMX_VMCS_GUEST_SS_BASE 0x680A 1270 #define VMX_VMCS_GUEST_DS_BASE 0x680C 1271 #define VMX_VMCS_GUEST_FS_BASE 0x680E 1272 #define VMX_VMCS_GUEST_GS_BASE 0x6810 1273 #define VMX_VMCS_GUEST_LDTR_BASE 0x6812 1274 #define VMX_VMCS_GUEST_TR_BASE 0x6814 1275 #define VMX_VMCS_GUEST_GDTR_BASE 0x6816 1276 #define VMX_VMCS_GUEST_IDTR_BASE 0x6818 1277 #define VMX_VMCS_GUEST_DR7 0x681A 1278 #define VMX_VMCS_GUEST_RSP 0x681C 1279 #define VMX_VMCS_GUEST_RIP 0x681E 1280 #define VMX_VMCS_GUEST_RFLAGS 0x6820 1281 #define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS 0x6822 1282 #define VMX_VMCS_GUEST_SYSENTER_ESP 0x6824 /**< MSR IA32_SYSENTER_ESP */ 1283 #define VMX_VMCS_GUEST_SYSENTER_EIP 0x6826 /**< MSR IA32_SYSENTER_EIP */ 1272 1284 /** @} */ 1273 1285
Note:
See TracChangeset
for help on using the changeset viewer.