VirtualBox

Changeset 44639 in vbox for trunk/src


Ignore:
Timestamp:
Feb 11, 2013 7:25:42 PM (12 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
83727
Message:

Eliminated PCIINTELHDLinkState, moving the pci device structure up into INTELHDLinkState. Codec pNodes -> paNodes.

Location:
trunk/src/VBox/Devices/Audio
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevCodec.cpp

    r44528 r44639  
    321321    pState->u8BSKU = 0x76;
    322322    pState->u8AssemblyId = 0x80;
    323     pState->pNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pState->cTotalNodes);
     323    pState->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pState->cTotalNodes);
    324324    pState->fInReset = false;
    325325#define STAC9220WIDGET(type) pState->au8##type##s = g_abStac9220##type##s
     
    412412                                                    | CODEC_F00_09_CAP_FMT_OVERRIDE
    413413                                                    | CODEC_F00_09_CAP_LSB;//(4 << 16) | RT_BIT(9)|RT_BIT(4)|0x1;
    414             pNode->node.au32F00_param[0xa] = pState->pNodes[1].node.au32F00_param[0xA];
     414            pNode->node.au32F00_param[0xa] = pState->paNodes[1].node.au32F00_param[0xA];
    415415            pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM;
    416416            pNode->spdifout.u32F06_param = 0;
     
    424424                                                   | CODEC_F00_09_CAP_FMT_OVERRIDE
    425425                                                   | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1;
    426             pNode->node.au32F00_param[0xA] = pState->pNodes[1].node.au32F00_param[0xA];
     426            pNode->node.au32F00_param[0xA] = pState->paNodes[1].node.au32F00_param[0xA];
    427427            pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0);
    428428            pNode->node.au32F02_param[0] = 0x11;
     
    771771    uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT? 0 : CODEC_GET_AMP_INDEX(cmd);
    772772
    773     PCODECNODE pNode = &pState->pNodes[CODEC_NID(cmd)];
     773    PCODECNODE pNode = &pState->paNodes[CODEC_NID(cmd)];
    774774    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    775775        *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params,
     
    823823    }
    824824    *pResp = 0;
    825     PCODECNODE pNode = &pState->pNodes[CODEC_NID(cmd)];
     825    PCODECNODE pNode = &pState->paNodes[CODEC_NID(cmd)];
    826826    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    827827        pAmplifier = &pNode->dac.B_params;
     
    884884    }
    885885    *pResp = 0;
    886     *pResp = pState->pNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
     886    *pResp = pState->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];
    887887    return VINF_SUCCESS;
    888888}
     
    900900    *pResp = 0;
    901901    if (codecIsAdcMuxNode(pState, CODEC_NID(cmd)))
    902         *pResp = pState->pNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
     902        *pResp = pState->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
    903903    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    904         *pResp = pState->pNodes[CODEC_NID(cmd)].digout.u32F01_param;
     904        *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
    905905    else if (codecIsPortNode(pState, CODEC_NID(cmd)))
    906         *pResp = pState->pNodes[CODEC_NID(cmd)].port.u32F01_param;
     906        *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F01_param;
    907907    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    908         *pResp = pState->pNodes[CODEC_NID(cmd)].adc.u32F01_param;
     908        *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
    909909    else if (codecIsAdcVolNode(pState, CODEC_NID(cmd)))
    910         *pResp = pState->pNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
     910        *pResp = pState->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
    911911    return VINF_SUCCESS;
    912912}
     
    924924    *pResp = 0;
    925925    if (codecIsAdcMuxNode(pState, CODEC_NID(cmd)))
    926         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
     926        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;
    927927    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    928         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digout.u32F01_param;
     928        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F01_param;
    929929    else if (codecIsPortNode(pState, CODEC_NID(cmd)))
    930         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].port.u32F01_param;
     930        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F01_param;
    931931    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    932         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].adc.u32F01_param;
     932        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adc.u32F01_param;
    933933    else if (codecIsAdcVolNode(pState, CODEC_NID(cmd)))
    934         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
     934        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;
    935935    Assert((pu32Reg));
    936936    if (pu32Reg)
     
    951951    *pResp = 0;
    952952    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    953         *pResp = pState->pNodes[CODEC_NID(cmd)].port.u32F07_param;
     953        *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F07_param;
    954954    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    955         *pResp = pState->pNodes[CODEC_NID(cmd)].digout.u32F07_param;
     955        *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
    956956    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    957         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F07_param;
     957        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
    958958    else if (codecIsCdNode(pState, CODEC_NID(cmd)))
    959         *pResp = pState->pNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
     959        *pResp = pState->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
    960960    else if (codecIsPcbeepNode(pState, CODEC_NID(cmd)))
    961         *pResp = pState->pNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
     961        *pResp = pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
    962962    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    963         *pResp = pState->pNodes[CODEC_NID(cmd)].reserved.u32F07_param;
     963        *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
    964964    else
    965965        AssertMsgFailed(("Unsupported"));
     
    980980    uint32_t *pu32Reg = NULL;
    981981    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    982         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].port.u32F07_param;
     982        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F07_param;
    983983    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    984         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F07_param;
     984        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F07_param;
    985985    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    986         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digout.u32F07_param;
     986        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F07_param;
    987987    else if (codecIsCdNode(pState, CODEC_NID(cmd)))
    988         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
     988        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;
    989989    else if (codecIsPcbeepNode(pState, CODEC_NID(cmd)))
    990         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
     990        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;
    991991    else if (   codecIsReservedNode(pState, CODEC_NID(cmd))
    992992             && CODEC_NID(cmd) == 0x1b)
    993         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].reserved.u32F07_param;
     993        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;
    994994    Assert((pu32Reg));
    995995    if (pu32Reg)
     
    10101010    *pResp = 0;
    10111011    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1012         *pResp = pState->pNodes[CODEC_NID(cmd)].port.u32F08_param;
     1012        *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F08_param;
    10131013    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1014         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F08_param;
     1014        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
    10151015    else if ((cmd) == 1 /* AFG */)
    1016         *pResp = pState->pNodes[CODEC_NID(cmd)].afg.u32F08_param;
     1016        *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
    10171017    else if (codecIsVolKnobNode(pState, CODEC_NID(cmd)))
    1018         *pResp = pState->pNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
     1018        *pResp = pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
    10191019    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    1020         *pResp = pState->pNodes[CODEC_NID(cmd)].digout.u32F08_param;
     1020        *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
    10211021    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1022         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F08_param;
     1022        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
    10231023    else
    10241024        AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
     
    10391039    uint32_t *pu32Reg = NULL;
    10401040    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1041         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].port.u32F08_param;
     1041        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F08_param;
    10421042    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1043         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F08_param;
     1043        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
    10441044    else if (CODEC_NID(cmd) == 1 /* AFG */)
    1045         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].afg.u32F08_param;
     1045        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F08_param;
    10461046    else if (codecIsVolKnobNode(pState, CODEC_NID(cmd)))
    1047         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
     1047        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;
    10481048    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1049         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F08_param;
     1049        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param;
    10501050    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    1051         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digout.u32F08_param;
     1051        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F08_param;
    10521052    else
    10531053        AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
     
    10701070    *pResp = 0;
    10711071    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1072         *pResp = pState->pNodes[CODEC_NID(cmd)].port.u32F09_param;
     1072        *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F09_param;
    10731073    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1074         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F09_param;
     1074        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
    10751075    else
    10761076        AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)));
     
    10911091    uint32_t *pu32Reg = NULL;
    10921092    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1093         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].port.u32F09_param;
     1093        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F09_param;
    10941094    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1095         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F09_param;
     1095        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param;
    10961096    Assert(pu32Reg);
    10971097    if(pu32Reg)
     
    11161116        return VINF_SUCCESS;
    11171117    }
    1118     *pResp = pState->pNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
     1118    *pResp = pState->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];
    11191119    return VINF_SUCCESS;
    11201120}
     
    11311131    *pResp = 0;
    11321132    if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1133         *pResp = pState->pNodes[CODEC_NID(cmd)].adc.u32F03_param;
     1133        *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F03_param;
    11341134    return VINF_SUCCESS;
    11351135}
     
    11481148    if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    11491149    {
    1150         codecSetRegisterU8(&pState->pNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
     1150        codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);
    11511151    }
    11521152    return VINF_SUCCESS;
     
    11651165    *pResp = 0;
    11661166    if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1167         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
     1167        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;
    11681168    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1169         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
     1169        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;
    11701170    return VINF_SUCCESS;
    11711171}
     
    11821182    *pResp = 0;
    11831183    if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1184         codecSetRegisterU8(&pState->pNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
     1184        codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);
    11851185    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1186         codecSetRegisterU8(&pState->pNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
     1186        codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);
    11871187    return VINF_SUCCESS;
    11881188}
     
    12131213    if (CODEC_NID(cmd) == 1 /* AFG */)
    12141214    {
    1215         *pResp = pState->pNodes[CODEC_NID(cmd)].afg.u32F20_param;
     1215        *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
    12161216    }
    12171217    return VINF_SUCCESS;
     
    12291229    uint32_t *pu32Reg = NULL;
    12301230    if (CODEC_NID(cmd) == 0x1 /* AFG */)
    1231         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].afg.u32F20_param;
     1231        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F20_param;
    12321232    Assert((pu32Reg));
    12331233    if (pu32Reg)
     
    12731273        for (i = 0; i < pState->cTotalNodes; ++i)
    12741274        {
    1275             pState->pfnCodecNodeReset(pState, i, &pState->pNodes[i]);
     1275            pState->pfnCodecNodeReset(pState, i, &pState->paNodes[i]);
    12761276        }
    12771277        pState->fInReset = false;
     
    12941294    *pResp = 0;
    12951295    if (CODEC_NID(cmd) == 1 /* AFG */)
    1296         *pResp = pState->pNodes[CODEC_NID(cmd)].afg.u32F05_param;
     1296        *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
    12971297    else if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1298         *pResp = pState->pNodes[CODEC_NID(cmd)].dac.u32F05_param;
     1298        *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
    12991299    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1300         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F05_param;
     1300        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
    13011301    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1302         *pResp = pState->pNodes[CODEC_NID(cmd)].adc.u32F05_param;
     1302        *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
    13031303    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1304         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
     1304        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
    13051305    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1306         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
     1306        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
    13071307    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    1308         *pResp = pState->pNodes[CODEC_NID(cmd)].reserved.u32F05_param;
     1308        *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
    13091309    return VINF_SUCCESS;
    13101310}
     
    13351335    *pResp = 0;
    13361336    if (CODEC_NID(cmd) == 1 /* AFG */)
    1337         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].afg.u32F05_param;
     1337        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F05_param;
    13381338    else if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1339         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].dac.u32F05_param;
     1339        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F05_param;
    13401340    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1341         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F05_param;
     1341        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F05_param;
    13421342    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1343         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].adc.u32F05_param;
     1343        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adc.u32F05_param;
    13441344    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1345         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
     1345        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;
    13461346    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1347         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
     1347        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;
    13481348    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    1349         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].reserved.u32F05_param;
     1349        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;
    13501350    Assert((pu32Reg));
    13511351    if (!pu32Reg)
     
    13611361         */
    13621362        *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0,
    1363                                   CODEC_F05_ACT(pState->pNodes[1].afg.u32F05_param),
     1363                                  CODEC_F05_ACT(pState->paNodes[1].afg.u32F05_param),
    13641364                                  CODEC_F05_SET(cmd));
    13651365    }
     
    13671367    /* Propagate next power state only if AFG is on or verb modifies AFG power state */
    13681368    if (   CODEC_NID(cmd) == 1 /* AFG */
    1369         || !CODEC_F05_ACT(pState->pNodes[1].afg.u32F05_param))
     1369        || !CODEC_F05_ACT(pState->paNodes[1].afg.u32F05_param))
    13701370    {
    13711371        *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd));
     
    13761376            const uint8_t *pu8NodeIndex = &pState->au8Dacs[0];
    13771377            while (*(++pu8NodeIndex))
    1378                 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].dac.u32F05_param);
     1378                codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].dac.u32F05_param);
    13791379
    13801380            pu8NodeIndex = &pState->au8Adcs[0];
    13811381            while (*(++pu8NodeIndex))
    1382                 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].adc.u32F05_param);
     1382                codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].adc.u32F05_param);
    13831383
    13841384            pu8NodeIndex = &pState->au8DigInPins[0];
    13851385            while (*(++pu8NodeIndex))
    1386                 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].digin.u32F05_param);
     1386                codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].digin.u32F05_param);
    13871387        }
    13881388    }
     
    14011401    *pResp = 0;
    14021402    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1403         *pResp = pState->pNodes[CODEC_NID(cmd)].dac.u32F06_param;
     1403        *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
    14041404    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1405         *pResp = pState->pNodes[CODEC_NID(cmd)].adc.u32F06_param;
     1405        *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
    14061406    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1407         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
     1407        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
    14081408    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1409         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
     1409        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
    14101410    else if (CODEC_NID(cmd) == 0x1A)
    1411         *pResp = pState->pNodes[CODEC_NID(cmd)].reserved.u32F06_param;
     1411        *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
    14121412    return VINF_SUCCESS;
    14131413}
     
    14251425    *pResp = 0;
    14261426    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1427         pu32addr = &pState->pNodes[CODEC_NID(cmd)].dac.u32F06_param;
     1427        pu32addr = &pState->paNodes[CODEC_NID(cmd)].dac.u32F06_param;
    14281428    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1429         pu32addr = &pState->pNodes[CODEC_NID(cmd)].adc.u32F06_param;
     1429        pu32addr = &pState->paNodes[CODEC_NID(cmd)].adc.u32F06_param;
    14301430    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1431         pu32addr = &pState->pNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
     1431        pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;
    14321432    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1433         pu32addr = &pState->pNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
     1433        pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;
    14341434    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    1435         pu32addr = &pState->pNodes[CODEC_NID(cmd)].reserved.u32F06_param;
     1435        pu32addr = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param;
    14361436    Assert((pu32addr));
    14371437    if (pu32addr)
     
    14511451    *pResp = 0;
    14521452    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1453         *pResp = pState->pNodes[CODEC_NID(cmd)].dac.u32A_param;
     1453        *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32A_param;
    14541454    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1455         *pResp = pState->pNodes[CODEC_NID(cmd)].adc.u32A_param;
     1455        *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32A_param;
    14561456    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1457         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifout.u32A_param;
     1457        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param;
    14581458    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1459         *pResp = pState->pNodes[CODEC_NID(cmd)].spdifin.u32A_param;
     1459        *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param;
    14601460    return VINF_SUCCESS;
    14611461}
     
    14721472    *pResp = 0;
    14731473    if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1474         codecSetRegisterU16(&pState->pNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
     1474        codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);
    14751475    else if (codecIsAdcNode(pState, CODEC_NID(cmd)))
    1476         codecSetRegisterU16(&pState->pNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
     1476        codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);
    14771477    else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd)))
    1478         codecSetRegisterU16(&pState->pNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
     1478        codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);
    14791479    else if (codecIsSpdifInNode(pState, CODEC_NID(cmd)))
    1480         codecSetRegisterU16(&pState->pNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
     1480        codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);
    14811481    return VINF_SUCCESS;
    14821482}
     
    14941494    *pResp = 0;
    14951495    if (codecIsAdcVolNode(pState, CODEC_NID(cmd)))
    1496         *pResp = pState->pNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
     1496        *pResp = pState->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
    14971497    else if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1498         *pResp = pState->pNodes[CODEC_NID(cmd)].dac.u32F0c_param;
     1498        *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
    14991499    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1500         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F0c_param;
     1500        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
    15011501    return VINF_SUCCESS;
    15021502}
     
    15151515    uint32_t *pu32Reg = NULL;
    15161516    if (codecIsAdcVolNode(pState, CODEC_NID(cmd)))
    1517         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
     1517        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;
    15181518    else if (codecIsDacNode(pState, CODEC_NID(cmd)))
    1519         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].dac.u32F0c_param;
     1519        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;
    15201520    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1521         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F0c_param;
     1521        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;
    15221522    *pResp = 0;
    15231523    Assert((pu32Reg));
     
    15391539    *pResp = 0;
    15401540    if (codecIsVolKnobNode(pState, CODEC_NID(cmd)))
    1541         *pResp = pState->pNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
     1541        *pResp = pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
    15421542    return VINF_SUCCESS;
    15431543}
     
    15561556    *pResp = 0;
    15571557    if (codecIsVolKnobNode(pState, CODEC_NID(cmd)))
    1558         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
     1558        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;
    15591559    Assert((pu32Reg));
    15601560    if (pu32Reg)
     
    15761576    /* note: this is true for ALC885 */
    15771577    if (CODEC_NID(cmd) == 0x1 /* AFG */)
    1578         *pResp = pState->pNodes[1].afg.u32F17_param;
     1578        *pResp = pState->paNodes[1].afg.u32F17_param;
    15791579    return VINF_SUCCESS;
    15801580}
     
    15931593    *pResp = 0;
    15941594    if (CODEC_NID(cmd) == 1 /* AFG */)
    1595         pu32Reg = &pState->pNodes[1].afg.u32F17_param;
     1595        pu32Reg = &pState->paNodes[1].afg.u32F17_param;
    15961596    Assert((pu32Reg));
    15971597    if (pu32Reg)
     
    16121612    *pResp = 0;
    16131613    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1614         *pResp = pState->pNodes[CODEC_NID(cmd)].port.u32F1c_param;
     1614        *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
    16151615    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    1616         *pResp = pState->pNodes[CODEC_NID(cmd)].digout.u32F1c_param;
     1616        *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
    16171617    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1618         *pResp = pState->pNodes[CODEC_NID(cmd)].digin.u32F1c_param;
     1618        *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
    16191619    else if (codecIsPcbeepNode(pState, CODEC_NID(cmd)))
    1620         *pResp = pState->pNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
     1620        *pResp = pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
    16211621    else if (codecIsCdNode(pState, CODEC_NID(cmd)))
    1622         *pResp = pState->pNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
     1622        *pResp = pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
    16231623    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    1624         *pResp = pState->pNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
     1624        *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
    16251625    return VINF_SUCCESS;
    16261626}
     
    16361636    uint32_t *pu32Reg = NULL;
    16371637    if (codecIsPortNode(pState, CODEC_NID(cmd)))
    1638         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].port.u32F1c_param;
     1638        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param;
    16391639    else if (codecIsDigInPinNode(pState, CODEC_NID(cmd)))
    1640         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digin.u32F1c_param;
     1640        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param;
    16411641    else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd)))
    1642         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].digout.u32F1c_param;
     1642        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param;
    16431643    else if (codecIsCdNode(pState, CODEC_NID(cmd)))
    1644         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
     1644        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param;
    16451645    else if (codecIsPcbeepNode(pState, CODEC_NID(cmd)))
    1646         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
     1646        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;
    16471647    else if (codecIsReservedNode(pState, CODEC_NID(cmd)))
    1648         pu32Reg = &pState->pNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
     1648        pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param;
    16491649    Assert((pu32Reg));
    16501650    if (pu32Reg)
     
    18321832    AssertRC(rc);
    18331833    /* common root node initializers */
    1834     pState->pNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pState->u16VendorId, pState->u16DeviceId);
    1835     pState->pNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
     1834    pState->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pState->u16VendorId, pState->u16DeviceId);
     1835    pState->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);
    18361836    /* common AFG node initializers */
    1837     pState->pNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pState->cTotalNodes - 2);
    1838     pState->pNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
    1839     pState->pNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pState->u16VendorId, pState->u8BSKU, pState->u8AssemblyId);
     1837    pState->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pState->cTotalNodes - 2);
     1838    pState->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);
     1839    pState->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pState->u16VendorId, pState->u8BSKU, pState->u8AssemblyId);
    18401840
    18411841    //** @todo r=michaln: Was this meant to be 'HDA' or something like that? (AC'97 was on ICH0)
     
    18481848    as.endianness = 0;
    18491849
    1850     pState->pNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;
     1850    pState->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;
    18511851    codecOpenVoice(pState, PI_INDEX, &as);
    18521852    codecOpenVoice(pState, PO_INDEX, &as);
    1853     pState->pNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;
     1853    pState->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;
    18541854
    18551855    uint8_t i;
    1856     Assert(pState->pNodes);
     1856    Assert(pState->paNodes);
    18571857    Assert(pState->pfnCodecNodeReset);
    18581858    for (i = 0; i < pState->cTotalNodes; ++i)
    18591859    {
    1860         pState->pfnCodecNodeReset(pState, i, &pState->pNodes[i]);
    1861     }
    1862 
    1863     codecToAudVolume(&pState->pNodes[pState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);
    1864     codecToAudVolume(&pState->pNodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);
     1860        pState->pfnCodecNodeReset(pState, i, &pState->paNodes[i]);
     1861    }
     1862
     1863    codecToAudVolume(&pState->paNodes[pState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);
     1864    codecToAudVolume(&pState->paNodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);
    18651865
    18661866    /* If no host voices were created, then fallback to nul audio. */
     
    19061906int codecDestruct(CODECState *pCodecState)
    19071907{
    1908     RTMemFree(pCodecState->pNodes);
     1908    RTMemFree(pCodecState->paNodes);
     1909    pCodecState->paNodes = NULL;
    19091910    return VINF_SUCCESS;
    19101911}
     
    19161917    SSMR3PutU32(pSSM, pCodecState->cTotalNodes);
    19171918    for (unsigned idxNode = 0; idxNode < pCodecState->cTotalNodes; ++idxNode)
    1918         SSMR3PutStructEx(pSSM, &pCodecState->pNodes[idxNode].SavedState, sizeof(pCodecState->pNodes[idxNode].SavedState),
     1919        SSMR3PutStructEx(pSSM, &pCodecState->paNodes[idxNode].SavedState, sizeof(pCodecState->paNodes[idxNode].SavedState),
    19191920                         0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/);
    19201921    return VINF_SUCCESS;
     
    19611962    for (unsigned idxNode = 0; idxNode < pCodecState->cTotalNodes; ++idxNode)
    19621963    {
    1963         uint8_t idOld = pCodecState->pNodes[idxNode].SavedState.Core.id;
    1964         int rc = SSMR3GetStructEx(pSSM, &pCodecState->pNodes[idxNode].SavedState,
    1965                                   sizeof(pCodecState->pNodes[idxNode].SavedState),
     1964        uint8_t idOld = pCodecState->paNodes[idxNode].SavedState.Core.id;
     1965        int rc = SSMR3GetStructEx(pSSM, &pCodecState->paNodes[idxNode].SavedState,
     1966                                  sizeof(pCodecState->paNodes[idxNode].SavedState),
    19661967                                  fFlags, pFields, NULL);
    19671968        if (RT_FAILURE(rc))
    19681969            return rc;
    1969         AssertLogRelMsgReturn(idOld == pCodecState->pNodes[idxNode].SavedState.Core.id,
    1970                               ("loaded %#x, expected \n", pCodecState->pNodes[idxNode].SavedState.Core.id, idOld),
     1970        AssertLogRelMsgReturn(idOld == pCodecState->paNodes[idxNode].SavedState.Core.id,
     1971                              ("loaded %#x, expected \n", pCodecState->paNodes[idxNode].SavedState.Core.id, idOld),
    19711972                              VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
    19721973    }
     
    19761977     */
    19771978    if (codecIsDacNode(pCodecState, pCodecState->u8DacLineOut))
    1978         codecToAudVolume(&pCodecState->pNodes[pCodecState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);
     1979        codecToAudVolume(&pCodecState->paNodes[pCodecState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);
    19791980    else if (codecIsSpdifOutNode(pCodecState, pCodecState->u8DacLineOut))
    1980         codecToAudVolume(&pCodecState->pNodes[pCodecState->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME);
    1981     codecToAudVolume(&pCodecState->pNodes[pCodecState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);
    1982 
    1983     return VINF_SUCCESS;
    1984 }
    1985 
     1981        codecToAudVolume(&pCodecState->paNodes[pCodecState->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME);
     1982    codecToAudVolume(&pCodecState->paNodes[pCodecState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);
     1983
     1984    return VINF_SUCCESS;
     1985}
     1986
  • trunk/src/VBox/Devices/Audio/DevCodec.h

    r44637 r44639  
    488488    PCODECEMU               pCodecBackend;
    489489#endif
    490     PCODECNODE               pNodes;
     490    PCODECNODE              paNodes;
    491491    QEMUSoundCard           card;
    492492    /** PCM in */
  • trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp

    r44636 r44639  
    437437typedef struct INTELHDLinkState
    438438{
     439    /** The PCI device structure. */
     440    PCIDevice               PciDev;
    439441    /** Pointer to the device instance. */
    440442    PPDMDEVINSR3            pDevIns;
     
    469471    uint64_t                u64BaseTS;
    470472} INTELHDLinkState, *PINTELHDLinkState;
     473/** ICH Intel HD Audio Controller state. */
     474typedef INTELHDLinkState HDASTATE;
     475/** Pointer to the ICH Intel HD Audio Controller state. */
     476typedef HDASTATE *PHDASTATE;
    471477
    472478#define ICH6_HDASTATE_2_DEVINS(pINTELHD)   ((pINTELHD)->pDevIns)
    473 #define PCIDEV_2_ICH6_HDASTATE(pPciDev) ((PCIINTELHDLinkState *)(pPciDev))
     479#define PCIDEV_2_ICH6_HDASTATE(pPciDev) ((PHDASTATE)(pPciDev))
    474480
    475481#define ISD0FMT_TO_AUDIO_SELECTOR(pState) (AUDIO_FORMAT_SELECTOR(&(pState)->Codec, In,     \
     
    477483#define OSD0FMT_TO_AUDIO_SELECTOR(pState) (AUDIO_FORMAT_SELECTOR(&(pState)->Codec, Out,     \
    478484                SDFMT_BASE_RATE(pState, 4), SDFMT_MULT(pState, 4), SDFMT_DIV(pState, 4)))
    479 
    480 
    481 typedef struct PCIINTELHDLinkState
    482 {
    483     PCIDevice dev;
    484     INTELHDLinkState hda;
    485 } PCIINTELHDLinkState;
    486485
    487486
     
    19201919PDMBOTHCBDECL(int) hdaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
    19211920{
    1922     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    1923     uint32_t    offReg = GCPhysAddr - pThis->hda.addrMMReg;
    1924     int         idxReg = hdaMMIORegLookup(&pThis->hda, offReg);
     1921    PHDASTATE   pThis  = PDMINS_2_DATA(pDevIns, PHDASTATE);
     1922    uint32_t    offReg = GCPhysAddr - pThis->addrMMReg;
     1923    int         idxReg = hdaMMIORegLookup(pThis, offReg);
    19251924    int         rc;
    19261925    Assert(!(offReg & 3)); Assert(cb == 4);
    19271926
    1928     if (pThis->hda.fInReset && idxReg != ICH6_HDA_REG_GCTL)
     1927    if (pThis->fInReset && idxReg != ICH6_HDA_REG_GCTL)
    19291928        Log(("hda: access to registers except GCTL is blocked while reset\n"));
    19301929
     
    19341933    if (idxReg != -1)
    19351934    {
    1936         rc = g_aIchIntelHDRegMap[idxReg].pfnRead(&pThis->hda, offReg, idxReg, (uint32_t *)pv);
     1935        rc = g_aIchIntelHDRegMap[idxReg].pfnRead(pThis, offReg, idxReg, (uint32_t *)pv);
    19371936        Log(("hda: read %s[%x/%x]\n", g_aIchIntelHDRegMap[idxReg].abbrev, *(uint32_t *)pv));
    19381937    }
     
    19511950PDMBOTHCBDECL(int) hdaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
    19521951{
    1953     PCIINTELHDLinkState    *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    1954     uint32_t    offReg = GCPhysAddr - pThis->hda.addrMMReg;
    1955     int         idxReg = hdaMMIORegLookup(&pThis->hda, offReg);
     1952    PHDASTATE   pThis  = PDMINS_2_DATA(pDevIns, PHDASTATE);
     1953    uint32_t    offReg = GCPhysAddr - pThis->addrMMReg;
     1954    int         idxReg = hdaMMIORegLookup(pThis, offReg);
    19561955    int         rc;
    19571956    Assert(!(offReg & 3)); Assert(cb == 4);
    19581957
    1959     if (pThis->hda.fInReset && idxReg != ICH6_HDA_REG_GCTL)
     1958    if (pThis->fInReset && idxReg != ICH6_HDA_REG_GCTL)
    19601959        Log(("hda: access to registers except GCTL is blocked while reset\n"));
    19611960
     
    19631962    {
    19641963#ifdef LOG_ENABLED
    1965         uint32_t const u32CurValue = pThis->hda.au32Regs[idxReg];
     1964        uint32_t const u32CurValue = pThis->au32Regs[idxReg];
    19661965#endif
    1967         rc = g_aIchIntelHDRegMap[idxReg].pfnWrite(&pThis->hda, offReg, idxReg, *(uint32_t const *)pv);
     1966        rc = g_aIchIntelHDRegMap[idxReg].pfnWrite(pThis, offReg, idxReg, *(uint32_t const *)pv);
    19681967        Log(("hda: write %s:(%x) %x => %x\n", g_aIchIntelHDRegMap[idxReg].abbrev, *(uint32_t const *)pv,
    1969              u32CurValue, pThis->hda.au32Regs[idxReg]));
     1968             u32CurValue, pThis->au32Regs[idxReg]));
    19701969    }
    19711970    else
     
    19851984 * @callback_method_impl{FNPCIIOREGIONMAP}
    19861985 */
    1987 static DECLCALLBACK(int) hdaMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType)
     1986static DECLCALLBACK(int) hdaPciIoRegionMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb,
     1987                                           PCIADDRESSSPACE enmType)
    19881988{
    19891989    int         rc;
    19901990    PPDMDEVINS  pDevIns = pPciDev->pDevIns;
    19911991    RTIOPORT    Port = (RTIOPORT)GCPhysAddress;
    1992     PCIINTELHDLinkState *pThis = PCIDEV_2_ICH6_HDASTATE(pPciDev);
     1992    PHDASTATE pThis = PCIDEV_2_ICH6_HDASTATE(pPciDev);
    19931993
    19941994    /* 18.2 of the ICH6 datasheet defines the valid access widths as byte, word, and double word */
     
    20012001        return rc;
    20022002
    2003     pThis->hda.addrMMReg = GCPhysAddress;
     2003    pThis->addrMMReg = GCPhysAddress;
    20042004    return VINF_SUCCESS;
    20052005}
     
    20132013static DECLCALLBACK(int) hdaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    20142014{
    2015     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
     2015    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
    20162016    /* Save Codec nodes states */
    2017     codecSaveState(&pThis->hda.Codec, pSSM);
     2017    codecSaveState(&pThis->Codec, pSSM);
    20182018
    20192019    /* Save MMIO registers */
    2020     AssertCompile(RT_ELEMENTS(pThis->hda.au32Regs) == 112);
    2021     SSMR3PutU32(pSSM, RT_ELEMENTS(pThis->hda.au32Regs));
    2022     SSMR3PutMem(pSSM, pThis->hda.au32Regs, sizeof(pThis->hda.au32Regs));
     2020    AssertCompile(RT_ELEMENTS(pThis->au32Regs) == 112);
     2021    SSMR3PutU32(pSSM, RT_ELEMENTS(pThis->au32Regs));
     2022    SSMR3PutMem(pSSM, pThis->au32Regs, sizeof(pThis->au32Regs));
    20232023
    20242024    /* Save HDA dma counters */
    2025     SSMR3PutStructEx(pSSM, &pThis->hda.stOutBdle, sizeof(pThis->hda.stOutBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
    2026     SSMR3PutStructEx(pSSM, &pThis->hda.stMicBdle, sizeof(pThis->hda.stMicBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
    2027     SSMR3PutStructEx(pSSM, &pThis->hda.stInBdle,  sizeof(pThis->hda.stInBdle),  0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
     2025    SSMR3PutStructEx(pSSM, &pThis->stOutBdle, sizeof(pThis->stOutBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
     2026    SSMR3PutStructEx(pSSM, &pThis->stMicBdle, sizeof(pThis->stMicBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
     2027    SSMR3PutStructEx(pSSM, &pThis->stInBdle,  sizeof(pThis->stInBdle),  0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);
    20282028    return VINF_SUCCESS;
    20292029}
     
    20352035static DECLCALLBACK(int) hdaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    20362036{
    2037     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
     2037    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
    20382038
    20392039    Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
     
    20422042     * Load Codec nodes states.
    20432043     */
    2044     int rc = codecLoadState(&pThis->hda.Codec, pSSM, uVersion);
     2044    int rc = codecLoadState(&pThis->Codec, pSSM, uVersion);
    20452045    if (RT_FAILURE(rc))
    20462046        return rc;
     
    20702070        case HDA_SSM_VERSION_3:
    20712071            cRegs = 112;
    2072             AssertCompile(RT_ELEMENTS(pThis->hda.au32Regs) == 112);
     2072            AssertCompile(RT_ELEMENTS(pThis->au32Regs) == 112);
    20732073            break;
    20742074
    20752075        case HDA_SSM_VERSION:
    20762076            rc = SSMR3GetU32(pSSM, &cRegs); AssertRCReturn(rc, rc);
    2077             AssertLogRelMsgReturn(cRegs == RT_ELEMENTS(pThis->hda.au32Regs),
    2078                                   ("cRegs is %d, expected %d\n", cRegs, RT_ELEMENTS(pThis->hda.au32Regs)),
     2077            AssertLogRelMsgReturn(cRegs == RT_ELEMENTS(pThis->au32Regs),
     2078                                  ("cRegs is %d, expected %d\n", cRegs, RT_ELEMENTS(pThis->au32Regs)),
    20792079                                  VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
    20802080            break;
     
    20842084    }
    20852085
    2086     if (cRegs >= RT_ELEMENTS(pThis->hda.au32Regs))
    2087     {
    2088         SSMR3GetMem(pSSM, pThis->hda.au32Regs, sizeof(pThis->hda.au32Regs));
    2089         SSMR3Skip(pSSM, sizeof(uint32_t) * (cRegs - RT_ELEMENTS(pThis->hda.au32Regs)));
     2086    if (cRegs >= RT_ELEMENTS(pThis->au32Regs))
     2087    {
     2088        SSMR3GetMem(pSSM, pThis->au32Regs, sizeof(pThis->au32Regs));
     2089        SSMR3Skip(pSSM, sizeof(uint32_t) * (cRegs - RT_ELEMENTS(pThis->au32Regs)));
    20902090    }
    20912091    else
    20922092    {
    2093         RT_ZERO(pThis->hda.au32Regs);
    2094         SSMR3GetMem(pSSM, pThis->hda.au32Regs, sizeof(uint32_t) * cRegs);
     2093        RT_ZERO(pThis->au32Regs);
     2094        SSMR3GetMem(pSSM, pThis->au32Regs, sizeof(uint32_t) * cRegs);
    20952095    }
    20962096
     
    21002100    uint32_t   fFlags   = uVersion <= HDA_SSM_VERSION_2 ? SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED : 0;
    21012101    PCSSMFIELD paFields = uVersion <= HDA_SSM_VERSION_2 ? g_aHdaBDLEDescFieldsOld              : g_aHdaBDLEDescFields;
    2102     SSMR3GetStructEx(pSSM, &pThis->hda.stOutBdle, sizeof(pThis->hda.stOutBdle), fFlags, paFields, NULL);
    2103     SSMR3GetStructEx(pSSM, &pThis->hda.stMicBdle, sizeof(pThis->hda.stMicBdle), fFlags, paFields, NULL);
    2104     rc = SSMR3GetStructEx(pSSM, &pThis->hda.stInBdle, sizeof(pThis->hda.stInBdle), fFlags, paFields, NULL);
     2102    SSMR3GetStructEx(pSSM, &pThis->stOutBdle, sizeof(pThis->stOutBdle), fFlags, paFields, NULL);
     2103    SSMR3GetStructEx(pSSM, &pThis->stMicBdle, sizeof(pThis->stMicBdle), fFlags, paFields, NULL);
     2104    rc = SSMR3GetStructEx(pSSM, &pThis->stInBdle, sizeof(pThis->stInBdle), fFlags, paFields, NULL);
    21052105    AssertRCReturn(rc, rc);
    21062106
     
    21082108     * Update stuff after the state changes.
    21092109     */
    2110     AUD_set_active_in(pThis->hda.Codec.SwVoiceIn, SDCTL(&pThis->hda, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
    2111     AUD_set_active_out(pThis->hda.Codec.SwVoiceOut, SDCTL(&pThis->hda, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
    2112 
    2113     pThis->hda.u64CORBBase = RT_MAKE_U64(CORBLBASE(&pThis->hda), CORBUBASE(&pThis->hda));
    2114     pThis->hda.u64RIRBBase = RT_MAKE_U64(RIRLBASE(&pThis->hda), RIRUBASE(&pThis->hda));
    2115     pThis->hda.u64DPBase   = RT_MAKE_U64(DPLBASE(&pThis->hda), DPUBASE(&pThis->hda));
     2110    AUD_set_active_in(pThis->Codec.SwVoiceIn, SDCTL(pThis, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
     2111    AUD_set_active_out(pThis->Codec.SwVoiceOut, SDCTL(pThis, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
     2112
     2113    pThis->u64CORBBase = RT_MAKE_U64(CORBLBASE(pThis), CORBUBASE(pThis));
     2114    pThis->u64RIRBBase = RT_MAKE_U64(RIRLBASE(pThis), RIRUBASE(pThis));
     2115    pThis->u64DPBase   = RT_MAKE_U64(DPLBASE(pThis), DPUBASE(pThis));
    21162116    return VINF_SUCCESS;
    21172117}
     
    22342234static DECLCALLBACK(void) hdaInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    22352235{
    2236     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2237     INTELHDLinkState *hda = &pThis->hda;
    2238     int iHdaRegisterIndex = hdaLookUpRegisterByName(hda, pszArgs);
     2236    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2237    int iHdaRegisterIndex = hdaLookUpRegisterByName(pThis, pszArgs);
    22392238    if (iHdaRegisterIndex != -1)
    2240         hdaDbgPrintRegister(hda, pHlp, iHdaRegisterIndex);
     2239        hdaDbgPrintRegister(pThis, pHlp, iHdaRegisterIndex);
    22412240    else
    22422241        for(iHdaRegisterIndex = 0; (unsigned int)iHdaRegisterIndex < HDA_NREGS; ++iHdaRegisterIndex)
    2243             hdaDbgPrintRegister(hda, pHlp, iHdaRegisterIndex);
     2242            hdaDbgPrintRegister(pThis, pHlp, iHdaRegisterIndex);
    22442243}
    22452244
     
    22702269static DECLCALLBACK(void) hdaInfoStream(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    22712270{
    2272     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2273     INTELHDLinkState *hda = &pThis->hda;
    2274     int iHdaStrmIndex = hdaLookUpStreamIndex(hda, pszArgs);
     2271    PHDASTATE   pThis         = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2272    int         iHdaStrmIndex = hdaLookUpStreamIndex(pThis, pszArgs);
    22752273    if (iHdaStrmIndex != -1)
    2276         hdaDbgPrintStream(hda, pHlp, iHdaStrmIndex);
     2274        hdaDbgPrintStream(pThis, pHlp, iHdaStrmIndex);
    22772275    else
    22782276        for(iHdaStrmIndex = 0; iHdaStrmIndex < 7; ++iHdaStrmIndex)
    2279             hdaDbgPrintStream(hda, pHlp, iHdaStrmIndex);
     2277            hdaDbgPrintStream(pThis, pHlp, iHdaStrmIndex);
    22802278}
    22812279
     
    22852283static DECLCALLBACK(void) hdaInfoCodecNodes(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    22862284{
    2287     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2288     INTELHDLinkState *hda = &pThis->hda;
    2289     if (hda->Codec.pfnCodecDbgListNodes)
    2290         hda->Codec.pfnCodecDbgListNodes(&hda->Codec, pHlp, pszArgs);
     2285    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2286    if (pThis->Codec.pfnCodecDbgListNodes)
     2287        pThis->Codec.pfnCodecDbgListNodes(&pThis->Codec, pHlp, pszArgs);
    22912288    else
    22922289        pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback.\n");
     
    22992296static DECLCALLBACK(void) hdaInfoCodecSelector(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    23002297{
    2301     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2302     INTELHDLinkState *hda = &pThis->hda;
    2303     if (hda->Codec.pfnCodecDbgSelector)
    2304         hda->Codec.pfnCodecDbgSelector(&hda->Codec, pHlp, pszArgs);
     2298    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2299    if (pThis->Codec.pfnCodecDbgSelector)
     2300        pThis->Codec.pfnCodecDbgSelector(&pThis->Codec, pHlp, pszArgs);
    23052301    else
    23062302        pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback.\n");
     
    23152311static DECLCALLBACK(void *) hdaQueryInterface(struct PDMIBASE *pInterface, const char *pszIID)
    23162312{
    2317     PCIINTELHDLinkState *pThis = RT_FROM_MEMBER(pInterface, PCIINTELHDLinkState, hda.IBase);
    2318     Assert(&pThis->hda.IBase == pInterface);
    2319 
    2320     PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->hda.IBase);
     2313    PHDASTATE pThis = RT_FROM_MEMBER(pInterface, HDASTATE, IBase);
     2314    Assert(&pThis->IBase == pInterface);
     2315
     2316    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
    23212317    return NULL;
    23222318}
     
    23362332static DECLCALLBACK(void)  hdaReset(PPDMDEVINS pDevIns)
    23372333{
    2338     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2339     GCAP(&pThis->hda) = HDA_MAKE_GCAP(4,4,0,0,1); /* see 6.2.1 */
    2340     VMIN(&pThis->hda) = 0x00;       /* see 6.2.2 */
    2341     VMAJ(&pThis->hda) = 0x01;       /* see 6.2.3 */
    2342     VMAJ(&pThis->hda) = 0x01;       /* see 6.2.3 */
    2343     OUTPAY(&pThis->hda) = 0x003C;   /* see 6.2.4 */
    2344     INPAY(&pThis->hda)  = 0x001D;   /* see 6.2.5 */
    2345     pThis->hda.au32Regs[ICH6_HDA_REG_CORBSIZE] = 0x42; /* see 6.2.1 */
    2346     pThis->hda.au32Regs[ICH6_HDA_REG_RIRBSIZE] = 0x42; /* see 6.2.1 */
    2347     CORBRP(&pThis->hda) = 0x0;
    2348     RIRBWP(&pThis->hda) = 0x0;
     2334    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2335    GCAP(pThis) = HDA_MAKE_GCAP(4,4,0,0,1); /* see 6.2.1 */
     2336    VMIN(pThis) = 0x00;       /* see 6.2.2 */
     2337    VMAJ(pThis) = 0x01;       /* see 6.2.3 */
     2338    VMAJ(pThis) = 0x01;       /* see 6.2.3 */
     2339    OUTPAY(pThis) = 0x003C;   /* see 6.2.4 */
     2340    INPAY(pThis)  = 0x001D;   /* see 6.2.5 */
     2341    pThis->au32Regs[ICH6_HDA_REG_CORBSIZE] = 0x42; /* see 6.2.1 */
     2342    pThis->au32Regs[ICH6_HDA_REG_RIRBSIZE] = 0x42; /* see 6.2.1 */
     2343    CORBRP(pThis) = 0x0;
     2344    RIRBWP(pThis) = 0x0;
    23492345
    23502346    Log(("hda: inter HDA reset.\n"));
    2351     pThis->hda.cbCorbBuf = 256 * sizeof(uint32_t);
    2352 
    2353     if (pThis->hda.pu32CorbBuf)
    2354         memset(pThis->hda.pu32CorbBuf, 0, pThis->hda.cbCorbBuf);
     2347    pThis->cbCorbBuf = 256 * sizeof(uint32_t);
     2348
     2349    if (pThis->pu32CorbBuf)
     2350        memset(pThis->pu32CorbBuf, 0, pThis->cbCorbBuf);
    23552351    else
    2356         pThis->hda.pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->hda.cbCorbBuf);
    2357 
    2358     pThis->hda.cbRirbBuf = 256 * sizeof(uint64_t);
    2359     if (pThis->hda.pu64RirbBuf)
    2360         memset(pThis->hda.pu64RirbBuf, 0, pThis->hda.cbRirbBuf);
     2352        pThis->pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->cbCorbBuf);
     2353
     2354    pThis->cbRirbBuf = 256 * sizeof(uint64_t);
     2355    if (pThis->pu64RirbBuf)
     2356        memset(pThis->pu64RirbBuf, 0, pThis->cbRirbBuf);
    23612357    else
    2362         pThis->hda.pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->hda.cbRirbBuf);
    2363 
    2364     pThis->hda.u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns);
     2358        pThis->pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->cbRirbBuf);
     2359
     2360    pThis->u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns);
    23652361
    23662362    HDABDLEDESC stEmptyBdle;
     
    23702366        PHDABDLEDESC pBdle = NULL;
    23712367        if (u8Strm == 0)
    2372             pBdle = &pThis->hda.stInBdle;
     2368            pBdle = &pThis->stInBdle;
    23732369        else if(u8Strm == 4)
    2374             pBdle = &pThis->hda.stOutBdle;
     2370            pBdle = &pThis->stOutBdle;
    23752371        else
    23762372        {
     
    23782374            pBdle = &stEmptyBdle;
    23792375        }
    2380         hdaInitTransferDescriptor(&pThis->hda, pBdle, u8Strm, &StreamDesc);
     2376        hdaInitTransferDescriptor(pThis, pBdle, u8Strm, &StreamDesc);
    23812377        /* hdaStreamReset prevents changing the SRST bit, so we force it to zero here. */
    2382         HDA_STREAM_REG2(&pThis->hda, CTL, u8Strm) = 0;
    2383         hdaStreamReset(&pThis->hda, pBdle, &StreamDesc, u8Strm);
     2378        HDA_STREAM_REG2(pThis, CTL, u8Strm) = 0;
     2379        hdaStreamReset(pThis, pBdle, &StreamDesc, u8Strm);
    23842380    }
    23852381
    23862382    /* emulation of codec "wake up" (HDA spec 5.5.1 and 6.5)*/
    2387     STATESTS(&pThis->hda) = 0x1;
     2383    STATESTS(pThis) = 0x1;
    23882384
    23892385    Log(("hda: reset finished\n"));
     
    23962392static DECLCALLBACK(int) hdaDestruct(PPDMDEVINS pDevIns)
    23972393{
    2398     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2399 
    2400     int rc = codecDestruct(&pThis->hda.Codec);
     2394    PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2395
     2396    int rc = codecDestruct(&pThis->Codec);
    24012397    AssertRC(rc);
    2402     if (pThis->hda.pu32CorbBuf)
    2403         RTMemFree(pThis->hda.pu32CorbBuf);
    2404     if (pThis->hda.pu64RirbBuf)
    2405         RTMemFree(pThis->hda.pu64RirbBuf);
     2398
     2399    RTMemFree(pThis->pu32CorbBuf);
     2400    pThis->pu32CorbBuf = NULL;
     2401
     2402    RTMemFree(pThis->pu64RirbBuf);
     2403    pThis->pu64RirbBuf = NULL;
     2404
    24062405    return VINF_SUCCESS;
    24072406}
     
    24122411static DECLCALLBACK(int) hdaConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle)
    24132412{
    2414     PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    2415     INTELHDLinkState    *s     = &pThis->hda;
    2416     int               rc;
     2413    PHDASTATE   pThis = PDMINS_2_DATA(pDevIns, PHDASTATE);
     2414    int         rc;
    24172415
    24182416    Assert(iInstance == 0);
     
    24272425
    24282426    // ** @todo r=michaln: This device may need R0/RC enabling, especially if guests
    2429     // poll some register(s).
     2427    // poll some register(pThis).
    24302428
    24312429    /*
    24322430     * Initialize data (most of it anyway).
    24332431     */
    2434     s->pDevIns                  = pDevIns;
     2432    pThis->pDevIns                  = pDevIns;
    24352433    /* IBase */
    2436     s->IBase.pfnQueryInterface  = hdaQueryInterface;
     2434    pThis->IBase.pfnQueryInterface  = hdaQueryInterface;
    24372435
    24382436    /* PCI Device */
    2439     PCIDevSetVendorId           (&pThis->dev, HDA_PCI_VENDOR_ID); /* nVidia */
    2440     PCIDevSetDeviceId           (&pThis->dev, HDA_PCI_DEICE_ID); /* HDA */
    2441 
    2442     PCIDevSetCommand            (&pThis->dev, 0x0000); /* 04 rw,ro - pcicmd. */
    2443     PCIDevSetStatus             (&pThis->dev, VBOX_PCI_STATUS_CAP_LIST); /* 06 rwc?,ro? - pcists. */
    2444     PCIDevSetRevisionId         (&pThis->dev, 0x01);   /* 08 ro - rid. */
    2445     PCIDevSetClassProg          (&pThis->dev, 0x00);   /* 09 ro - pi. */
    2446     PCIDevSetClassSub           (&pThis->dev, 0x03);   /* 0a ro - scc; 03 == HDA. */
    2447     PCIDevSetClassBase          (&pThis->dev, 0x04);   /* 0b ro - bcc; 04 == multimedia. */
    2448     PCIDevSetHeaderType         (&pThis->dev, 0x00);   /* 0e ro - headtyp. */
    2449     PCIDevSetBaseAddress        (&pThis->dev, 0,       /* 10 rw - MMIO */
     2437    PCIDevSetVendorId           (&pThis->PciDev, HDA_PCI_VENDOR_ID); /* nVidia */
     2438    PCIDevSetDeviceId           (&pThis->PciDev, HDA_PCI_DEICE_ID); /* HDA */
     2439
     2440    PCIDevSetCommand            (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */
     2441    PCIDevSetStatus             (&pThis->PciDev, VBOX_PCI_STATUS_CAP_LIST); /* 06 rwc?,ro? - pcists. */
     2442    PCIDevSetRevisionId         (&pThis->PciDev, 0x01);   /* 08 ro - rid. */
     2443    PCIDevSetClassProg          (&pThis->PciDev, 0x00);   /* 09 ro - pi. */
     2444    PCIDevSetClassSub           (&pThis->PciDev, 0x03);   /* 0a ro - scc; 03 == HDA. */
     2445    PCIDevSetClassBase          (&pThis->PciDev, 0x04);   /* 0b ro - bcc; 04 == multimedia. */
     2446    PCIDevSetHeaderType         (&pThis->PciDev, 0x00);   /* 0e ro - headtyp. */
     2447    PCIDevSetBaseAddress        (&pThis->PciDev, 0,       /* 10 rw - MMIO */
    24502448                                 false /* fIoSpace */, false /* fPrefetchable */, true /* f64Bit */, 0x00000000);
    2451     PCIDevSetInterruptLine      (&pThis->dev, 0x00);   /* 3c rw. */
    2452     PCIDevSetInterruptPin       (&pThis->dev, 0x01);   /* 3d ro - INTA#. */
     2449    PCIDevSetInterruptLine      (&pThis->PciDev, 0x00);   /* 3c rw. */
     2450    PCIDevSetInterruptPin       (&pThis->PciDev, 0x01);   /* 3d ro - INTA#. */
    24532451
    24542452#if defined(HDA_AS_PCI_EXPRESS)
    2455     PCIDevSetCapabilityList     (&pThis->dev, 0x80);
     2453    PCIDevSetCapabilityList     (&pThis->PciDev, 0x80);
    24562454#elif defined(VBOX_WITH_MSI_DEVICES)
    2457     PCIDevSetCapabilityList     (&pThis->dev, 0x60);
     2455    PCIDevSetCapabilityList     (&pThis->PciDev, 0x60);
    24582456#else
    2459     PCIDevSetCapabilityList     (&pThis->dev, 0x50);   /* ICH6 datasheet 18.1.16 */
     2457    PCIDevSetCapabilityList     (&pThis->PciDev, 0x50);   /* ICH6 datasheet 18.1.16 */
    24602458#endif
    24612459
     
    24632461    /// of these values needs to be properly documented!
    24642462    /* HDCTL off 0x40 bit 0 selects signaling mode (1-HDA, 0 - Ac97) 18.1.19 */
    2465     PCIDevSetByte(&pThis->dev, 0x40, 0x01);
     2463    PCIDevSetByte(&pThis->PciDev, 0x40, 0x01);
    24662464
    24672465    /* Power Management */
    2468     PCIDevSetByte(&pThis->dev, 0x50 + 0, VBOX_PCI_CAP_ID_PM);
    2469     PCIDevSetByte(&pThis->dev, 0x50 + 1, 0x0); /* next */
    2470     PCIDevSetWord(&pThis->dev, 0x50 + 2, VBOX_PCI_PM_CAP_DSI | 0x02 /* version, PM1.1 */ );
     2466    PCIDevSetByte(&pThis->PciDev, 0x50 + 0, VBOX_PCI_CAP_ID_PM);
     2467    PCIDevSetByte(&pThis->PciDev, 0x50 + 1, 0x0); /* next */
     2468    PCIDevSetWord(&pThis->PciDev, 0x50 + 2, VBOX_PCI_PM_CAP_DSI | 0x02 /* version, PM1.1 */ );
    24712469
    24722470#ifdef HDA_AS_PCI_EXPRESS
    24732471    /* PCI Express */
    2474     PCIDevSetByte(&pThis->dev, 0x80 + 0, VBOX_PCI_CAP_ID_EXP); /* PCI_Express */
    2475     PCIDevSetByte(&pThis->dev, 0x80 + 1, 0x60); /* next */
     2472    PCIDevSetByte(&pThis->PciDev, 0x80 + 0, VBOX_PCI_CAP_ID_EXP); /* PCI_Express */
     2473    PCIDevSetByte(&pThis->PciDev, 0x80 + 1, 0x60); /* next */
    24762474    /* Device flags */
    2477     PCIDevSetWord(&pThis->dev, 0x80 + 2,
     2475    PCIDevSetWord(&pThis->PciDev, 0x80 + 2,
    24782476                   /* version */ 0x1     |
    24792477                   /* Root Complex Integrated Endpoint */ (VBOX_PCI_EXP_TYPE_ROOT_INT_EP << 4) |
    24802478                   /* MSI */ (100) << 9 );
    24812479    /* Device capabilities */
    2482     PCIDevSetDWord(&pThis->dev, 0x80 + 4, VBOX_PCI_EXP_DEVCAP_FLRESET);
     2480    PCIDevSetDWord(&pThis->PciDev, 0x80 + 4, VBOX_PCI_EXP_DEVCAP_FLRESET);
    24832481    /* Device control */
    2484     PCIDevSetWord( &pThis->dev, 0x80 + 8, 0);
     2482    PCIDevSetWord( &pThis->PciDev, 0x80 + 8, 0);
    24852483    /* Device status */
    2486     PCIDevSetWord( &pThis->dev, 0x80 + 10, 0);
     2484    PCIDevSetWord( &pThis->PciDev, 0x80 + 10, 0);
    24872485    /* Link caps */
    2488     PCIDevSetDWord(&pThis->dev, 0x80 + 12, 0);
     2486    PCIDevSetDWord(&pThis->PciDev, 0x80 + 12, 0);
    24892487    /* Link control */
    2490     PCIDevSetWord( &pThis->dev, 0x80 + 16, 0);
     2488    PCIDevSetWord( &pThis->PciDev, 0x80 + 16, 0);
    24912489    /* Link status */
    2492     PCIDevSetWord( &pThis->dev, 0x80 + 18, 0);
     2490    PCIDevSetWord( &pThis->PciDev, 0x80 + 18, 0);
    24932491    /* Slot capabilities */
    2494     PCIDevSetDWord(&pThis->dev, 0x80 + 20, 0);
     2492    PCIDevSetDWord(&pThis->PciDev, 0x80 + 20, 0);
    24952493    /* Slot control */
    2496     PCIDevSetWord( &pThis->dev, 0x80 + 24, 0);
     2494    PCIDevSetWord( &pThis->PciDev, 0x80 + 24, 0);
    24972495    /* Slot status */
    2498     PCIDevSetWord( &pThis->dev, 0x80 + 26, 0);
     2496    PCIDevSetWord( &pThis->PciDev, 0x80 + 26, 0);
    24992497    /* Root control */
    2500     PCIDevSetWord( &pThis->dev, 0x80 + 28, 0);
     2498    PCIDevSetWord( &pThis->PciDev, 0x80 + 28, 0);
    25012499    /* Root capabilities */
    2502     PCIDevSetWord( &pThis->dev, 0x80 + 30, 0);
     2500    PCIDevSetWord( &pThis->PciDev, 0x80 + 30, 0);
    25032501    /* Root status */
    2504     PCIDevSetDWord(&pThis->dev, 0x80 + 32, 0);
     2502    PCIDevSetDWord(&pThis->PciDev, 0x80 + 32, 0);
    25052503    /* Device capabilities 2 */
    2506     PCIDevSetDWord(&pThis->dev, 0x80 + 36, 0);
     2504    PCIDevSetDWord(&pThis->PciDev, 0x80 + 36, 0);
    25072505    /* Device control 2 */
    2508     PCIDevSetQWord(&pThis->dev, 0x80 + 40, 0);
     2506    PCIDevSetQWord(&pThis->PciDev, 0x80 + 40, 0);
    25092507    /* Link control 2 */
    2510     PCIDevSetQWord(&pThis->dev, 0x80 + 48, 0);
     2508    PCIDevSetQWord(&pThis->PciDev, 0x80 + 48, 0);
    25112509    /* Slot control 2 */
    2512     PCIDevSetWord( &pThis->dev, 0x80 + 56, 0);
     2510    PCIDevSetWord( &pThis->PciDev, 0x80 + 56, 0);
    25132511#endif
    25142512
     
    25162514     * Register the PCI device.
    25172515     */
    2518     rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
     2516    rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
    25192517    if (RT_FAILURE(rc))
    25202518        return rc;
    25212519
    2522     rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 0x4000, PCI_ADDRESS_SPACE_MEM, hdaMap);
     2520    rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 0x4000, PCI_ADDRESS_SPACE_MEM, hdaPciIoRegionMap);
    25232521    if (RT_FAILURE(rc))
    25242522        return rc;
     
    25342532    {
    25352533        LogRel(("Chipset cannot do MSI: %Rrc\n", rc));
    2536         PCIDevSetCapabilityList(&pThis->dev, 0x50);
     2534        PCIDevSetCapabilityList(&pThis->PciDev, 0x50);
    25372535    }
    25382536#endif
     
    25452543     * Attach driver.
    25462544     */
    2547     rc = PDMDevHlpDriverAttach(pDevIns, 0, &s->IBase, &s->pDrvBase, "Audio Driver Port");
     2545    rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Audio Driver Port");
    25482546    if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
    25492547        Log(("hda: No attached driver!\n"));
     
    25542552    }
    25552553
    2556 
    2557 
    2558     pThis->hda.Codec.pvHDAState = (void *)&pThis->hda;
    2559     rc = codecConstruct(pDevIns, &pThis->hda.Codec, pCfgHandle);
     2554    pThis->Codec.pvHDAState = pThis;
     2555    rc = codecConstruct(pDevIns, &pThis->Codec, pCfgHandle);
    25602556    if (RT_FAILURE(rc))
    25612557        AssertRCReturn(rc, rc);
     
    25632559    /* ICH6 datasheet defines 0 values for SVID and SID (18.1.14-15), which together with values returned for
    25642560       verb F20 should provide device/codec recognition. */
    2565     Assert(pThis->hda.Codec.u16VendorId);
    2566     Assert(pThis->hda.Codec.u16DeviceId);
    2567     PCIDevSetSubSystemVendorId  (&pThis->dev, pThis->hda.Codec.u16VendorId); /* 2c ro - intel.) */
    2568     PCIDevSetSubSystemId        (&pThis->dev, pThis->hda.Codec.u16DeviceId); /* 2e ro. */
     2561    Assert(pThis->Codec.u16VendorId);
     2562    Assert(pThis->Codec.u16DeviceId);
     2563    PCIDevSetSubSystemVendorId(&pThis->PciDev, pThis->Codec.u16VendorId); /* 2c ro - intel.) */
     2564    PCIDevSetSubSystemId(      &pThis->PciDev, pThis->Codec.u16DeviceId); /* 2e ro. */
    25692565
    25702566    hdaReset(pDevIns);
    2571     pThis->hda.Codec.id = 0;
    2572     pThis->hda.Codec.pfnTransfer = hdaTransfer;
    2573     pThis->hda.Codec.pfnReset = hdaCodecReset;
     2567    pThis->Codec.id = 0;
     2568    pThis->Codec.pfnTransfer = hdaTransfer;
     2569    pThis->Codec.pfnReset = hdaCodecReset;
    25742570
    25752571    /*
     
    25772573     * hdaReset shouldn't affects these registers.
    25782574     */
    2579     WAKEEN(&pThis->hda) = 0x0;
    2580     STATESTS(&pThis->hda) = 0x0;
     2575    WAKEEN(pThis) = 0x0;
     2576    STATESTS(pThis) = 0x0;
    25812577
    25822578    /*
     
    26262622    1,
    26272623    /* cbInstance */
    2628     sizeof(PCIINTELHDLinkState),
     2624    sizeof(HDASTATE),
    26292625    /* pfnConstruct */
    26302626    hdaConstruct,
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette