- Timestamp:
- Feb 11, 2013 7:25:42 PM (12 years ago)
- svn:sync-xref-src-repo-rev:
- 83727
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevCodec.cpp
r44528 r44639 321 321 pState->u8BSKU = 0x76; 322 322 pState->u8AssemblyId = 0x80; 323 pState->p Nodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pState->cTotalNodes);323 pState->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pState->cTotalNodes); 324 324 pState->fInReset = false; 325 325 #define STAC9220WIDGET(type) pState->au8##type##s = g_abStac9220##type##s … … 412 412 | CODEC_F00_09_CAP_FMT_OVERRIDE 413 413 | CODEC_F00_09_CAP_LSB;//(4 << 16) | RT_BIT(9)|RT_BIT(4)|0x1; 414 pNode->node.au32F00_param[0xa] = pState->p Nodes[1].node.au32F00_param[0xA];414 pNode->node.au32F00_param[0xa] = pState->paNodes[1].node.au32F00_param[0xA]; 415 415 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM; 416 416 pNode->spdifout.u32F06_param = 0; … … 424 424 | CODEC_F00_09_CAP_FMT_OVERRIDE 425 425 | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1; 426 pNode->node.au32F00_param[0xA] = pState->p Nodes[1].node.au32F00_param[0xA];426 pNode->node.au32F00_param[0xA] = pState->paNodes[1].node.au32F00_param[0xA]; 427 427 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0); 428 428 pNode->node.au32F02_param[0] = 0x11; … … 771 771 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT? 0 : CODEC_GET_AMP_INDEX(cmd); 772 772 773 PCODECNODE pNode = &pState->p Nodes[CODEC_NID(cmd)];773 PCODECNODE pNode = &pState->paNodes[CODEC_NID(cmd)]; 774 774 if (codecIsDacNode(pState, CODEC_NID(cmd))) 775 775 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params, … … 823 823 } 824 824 *pResp = 0; 825 PCODECNODE pNode = &pState->p Nodes[CODEC_NID(cmd)];825 PCODECNODE pNode = &pState->paNodes[CODEC_NID(cmd)]; 826 826 if (codecIsDacNode(pState, CODEC_NID(cmd))) 827 827 pAmplifier = &pNode->dac.B_params; … … 884 884 } 885 885 *pResp = 0; 886 *pResp = pState->p Nodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA];886 *pResp = pState->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA]; 887 887 return VINF_SUCCESS; 888 888 } … … 900 900 *pResp = 0; 901 901 if (codecIsAdcMuxNode(pState, CODEC_NID(cmd))) 902 *pResp = pState->p Nodes[CODEC_NID(cmd)].adcmux.u32F01_param;902 *pResp = pState->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param; 903 903 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 904 *pResp = pState->p Nodes[CODEC_NID(cmd)].digout.u32F01_param;904 *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F01_param; 905 905 else if (codecIsPortNode(pState, CODEC_NID(cmd))) 906 *pResp = pState->p Nodes[CODEC_NID(cmd)].port.u32F01_param;906 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F01_param; 907 907 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 908 *pResp = pState->p Nodes[CODEC_NID(cmd)].adc.u32F01_param;908 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F01_param; 909 909 else if (codecIsAdcVolNode(pState, CODEC_NID(cmd))) 910 *pResp = pState->p Nodes[CODEC_NID(cmd)].adcvol.u32F01_param;910 *pResp = pState->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param; 911 911 return VINF_SUCCESS; 912 912 } … … 924 924 *pResp = 0; 925 925 if (codecIsAdcMuxNode(pState, CODEC_NID(cmd))) 926 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].adcmux.u32F01_param;926 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param; 927 927 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 928 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digout.u32F01_param;928 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F01_param; 929 929 else if (codecIsPortNode(pState, CODEC_NID(cmd))) 930 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].port.u32F01_param;930 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F01_param; 931 931 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 932 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].adc.u32F01_param;932 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adc.u32F01_param; 933 933 else if (codecIsAdcVolNode(pState, CODEC_NID(cmd))) 934 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].adcvol.u32F01_param;934 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param; 935 935 Assert((pu32Reg)); 936 936 if (pu32Reg) … … 951 951 *pResp = 0; 952 952 if (codecIsPortNode(pState, CODEC_NID(cmd))) 953 *pResp = pState->p Nodes[CODEC_NID(cmd)].port.u32F07_param;953 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F07_param; 954 954 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 955 *pResp = pState->p Nodes[CODEC_NID(cmd)].digout.u32F07_param;955 *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F07_param; 956 956 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 957 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F07_param;957 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F07_param; 958 958 else if (codecIsCdNode(pState, CODEC_NID(cmd))) 959 *pResp = pState->p Nodes[CODEC_NID(cmd)].cdnode.u32F07_param;959 *pResp = pState->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param; 960 960 else if (codecIsPcbeepNode(pState, CODEC_NID(cmd))) 961 *pResp = pState->p Nodes[CODEC_NID(cmd)].pcbeep.u32F07_param;961 *pResp = pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param; 962 962 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 963 *pResp = pState->p Nodes[CODEC_NID(cmd)].reserved.u32F07_param;963 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F07_param; 964 964 else 965 965 AssertMsgFailed(("Unsupported")); … … 980 980 uint32_t *pu32Reg = NULL; 981 981 if (codecIsPortNode(pState, CODEC_NID(cmd))) 982 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].port.u32F07_param;982 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F07_param; 983 983 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 984 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F07_param;984 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F07_param; 985 985 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 986 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digout.u32F07_param;986 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F07_param; 987 987 else if (codecIsCdNode(pState, CODEC_NID(cmd))) 988 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].cdnode.u32F07_param;988 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param; 989 989 else if (codecIsPcbeepNode(pState, CODEC_NID(cmd))) 990 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].pcbeep.u32F07_param;990 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param; 991 991 else if ( codecIsReservedNode(pState, CODEC_NID(cmd)) 992 992 && CODEC_NID(cmd) == 0x1b) 993 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].reserved.u32F07_param;993 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F07_param; 994 994 Assert((pu32Reg)); 995 995 if (pu32Reg) … … 1010 1010 *pResp = 0; 1011 1011 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1012 *pResp = pState->p Nodes[CODEC_NID(cmd)].port.u32F08_param;1012 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F08_param; 1013 1013 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1014 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F08_param;1014 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1015 1015 else if ((cmd) == 1 /* AFG */) 1016 *pResp = pState->p Nodes[CODEC_NID(cmd)].afg.u32F08_param;1016 *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F08_param; 1017 1017 else if (codecIsVolKnobNode(pState, CODEC_NID(cmd))) 1018 *pResp = pState->p Nodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;1018 *pResp = pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param; 1019 1019 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1020 *pResp = pState->p Nodes[CODEC_NID(cmd)].digout.u32F08_param;1020 *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F08_param; 1021 1021 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1022 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F08_param;1022 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1023 1023 else 1024 1024 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); … … 1039 1039 uint32_t *pu32Reg = NULL; 1040 1040 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1041 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].port.u32F08_param;1041 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F08_param; 1042 1042 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1043 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F08_param;1043 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1044 1044 else if (CODEC_NID(cmd) == 1 /* AFG */) 1045 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].afg.u32F08_param;1045 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F08_param; 1046 1046 else if (codecIsVolKnobNode(pState, CODEC_NID(cmd))) 1047 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;1047 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param; 1048 1048 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1049 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F08_param;1049 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1050 1050 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1051 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digout.u32F08_param;1051 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F08_param; 1052 1052 else 1053 1053 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); … … 1070 1070 *pResp = 0; 1071 1071 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1072 *pResp = pState->p Nodes[CODEC_NID(cmd)].port.u32F09_param;1072 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1073 1073 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1074 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F09_param;1074 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1075 1075 else 1076 1076 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); … … 1091 1091 uint32_t *pu32Reg = NULL; 1092 1092 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1093 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].port.u32F09_param;1093 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1094 1094 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1095 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F09_param;1095 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1096 1096 Assert(pu32Reg); 1097 1097 if(pu32Reg) … … 1116 1116 return VINF_SUCCESS; 1117 1117 } 1118 *pResp = pState->p Nodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];1118 *pResp = pState->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA]; 1119 1119 return VINF_SUCCESS; 1120 1120 } … … 1131 1131 *pResp = 0; 1132 1132 if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1133 *pResp = pState->p Nodes[CODEC_NID(cmd)].adc.u32F03_param;1133 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F03_param; 1134 1134 return VINF_SUCCESS; 1135 1135 } … … 1148 1148 if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1149 1149 { 1150 codecSetRegisterU8(&pState->p Nodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0);1150 codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0); 1151 1151 } 1152 1152 return VINF_SUCCESS; … … 1165 1165 *pResp = 0; 1166 1166 if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1167 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F0d_param;1167 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param; 1168 1168 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1169 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F0d_param;1169 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param; 1170 1170 return VINF_SUCCESS; 1171 1171 } … … 1182 1182 *pResp = 0; 1183 1183 if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1184 codecSetRegisterU8(&pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);1184 codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset); 1185 1185 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1186 codecSetRegisterU8(&pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);1186 codecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset); 1187 1187 return VINF_SUCCESS; 1188 1188 } … … 1213 1213 if (CODEC_NID(cmd) == 1 /* AFG */) 1214 1214 { 1215 *pResp = pState->p Nodes[CODEC_NID(cmd)].afg.u32F20_param;1215 *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F20_param; 1216 1216 } 1217 1217 return VINF_SUCCESS; … … 1229 1229 uint32_t *pu32Reg = NULL; 1230 1230 if (CODEC_NID(cmd) == 0x1 /* AFG */) 1231 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].afg.u32F20_param;1231 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F20_param; 1232 1232 Assert((pu32Reg)); 1233 1233 if (pu32Reg) … … 1273 1273 for (i = 0; i < pState->cTotalNodes; ++i) 1274 1274 { 1275 pState->pfnCodecNodeReset(pState, i, &pState->p Nodes[i]);1275 pState->pfnCodecNodeReset(pState, i, &pState->paNodes[i]); 1276 1276 } 1277 1277 pState->fInReset = false; … … 1294 1294 *pResp = 0; 1295 1295 if (CODEC_NID(cmd) == 1 /* AFG */) 1296 *pResp = pState->p Nodes[CODEC_NID(cmd)].afg.u32F05_param;1296 *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F05_param; 1297 1297 else if (codecIsDacNode(pState, CODEC_NID(cmd))) 1298 *pResp = pState->p Nodes[CODEC_NID(cmd)].dac.u32F05_param;1298 *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F05_param; 1299 1299 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1300 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F05_param;1300 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F05_param; 1301 1301 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1302 *pResp = pState->p Nodes[CODEC_NID(cmd)].adc.u32F05_param;1302 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F05_param; 1303 1303 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1304 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F05_param;1304 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param; 1305 1305 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1306 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F05_param;1306 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param; 1307 1307 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 1308 *pResp = pState->p Nodes[CODEC_NID(cmd)].reserved.u32F05_param;1308 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F05_param; 1309 1309 return VINF_SUCCESS; 1310 1310 } … … 1335 1335 *pResp = 0; 1336 1336 if (CODEC_NID(cmd) == 1 /* AFG */) 1337 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].afg.u32F05_param;1337 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F05_param; 1338 1338 else if (codecIsDacNode(pState, CODEC_NID(cmd))) 1339 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].dac.u32F05_param;1339 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F05_param; 1340 1340 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1341 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F05_param;1341 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F05_param; 1342 1342 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1343 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].adc.u32F05_param;1343 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adc.u32F05_param; 1344 1344 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1345 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F05_param;1345 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param; 1346 1346 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1347 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F05_param;1347 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param; 1348 1348 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 1349 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].reserved.u32F05_param;1349 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F05_param; 1350 1350 Assert((pu32Reg)); 1351 1351 if (!pu32Reg) … … 1361 1361 */ 1362 1362 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, 1363 CODEC_F05_ACT(pState->p Nodes[1].afg.u32F05_param),1363 CODEC_F05_ACT(pState->paNodes[1].afg.u32F05_param), 1364 1364 CODEC_F05_SET(cmd)); 1365 1365 } … … 1367 1367 /* Propagate next power state only if AFG is on or verb modifies AFG power state */ 1368 1368 if ( CODEC_NID(cmd) == 1 /* AFG */ 1369 || !CODEC_F05_ACT(pState->p Nodes[1].afg.u32F05_param))1369 || !CODEC_F05_ACT(pState->paNodes[1].afg.u32F05_param)) 1370 1370 { 1371 1371 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd)); … … 1376 1376 const uint8_t *pu8NodeIndex = &pState->au8Dacs[0]; 1377 1377 while (*(++pu8NodeIndex)) 1378 codecPropogatePowerState(&pState->p Nodes[*pu8NodeIndex].dac.u32F05_param);1378 codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].dac.u32F05_param); 1379 1379 1380 1380 pu8NodeIndex = &pState->au8Adcs[0]; 1381 1381 while (*(++pu8NodeIndex)) 1382 codecPropogatePowerState(&pState->p Nodes[*pu8NodeIndex].adc.u32F05_param);1382 codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].adc.u32F05_param); 1383 1383 1384 1384 pu8NodeIndex = &pState->au8DigInPins[0]; 1385 1385 while (*(++pu8NodeIndex)) 1386 codecPropogatePowerState(&pState->p Nodes[*pu8NodeIndex].digin.u32F05_param);1386 codecPropogatePowerState(&pState->paNodes[*pu8NodeIndex].digin.u32F05_param); 1387 1387 } 1388 1388 } … … 1401 1401 *pResp = 0; 1402 1402 if (codecIsDacNode(pState, CODEC_NID(cmd))) 1403 *pResp = pState->p Nodes[CODEC_NID(cmd)].dac.u32F06_param;1403 *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F06_param; 1404 1404 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1405 *pResp = pState->p Nodes[CODEC_NID(cmd)].adc.u32F06_param;1405 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32F06_param; 1406 1406 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1407 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F06_param;1407 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param; 1408 1408 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1409 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F06_param;1409 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param; 1410 1410 else if (CODEC_NID(cmd) == 0x1A) 1411 *pResp = pState->p Nodes[CODEC_NID(cmd)].reserved.u32F06_param;1411 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1412 1412 return VINF_SUCCESS; 1413 1413 } … … 1425 1425 *pResp = 0; 1426 1426 if (codecIsDacNode(pState, CODEC_NID(cmd))) 1427 pu32addr = &pState->p Nodes[CODEC_NID(cmd)].dac.u32F06_param;1427 pu32addr = &pState->paNodes[CODEC_NID(cmd)].dac.u32F06_param; 1428 1428 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1429 pu32addr = &pState->p Nodes[CODEC_NID(cmd)].adc.u32F06_param;1429 pu32addr = &pState->paNodes[CODEC_NID(cmd)].adc.u32F06_param; 1430 1430 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1431 pu32addr = &pState->p Nodes[CODEC_NID(cmd)].spdifout.u32F06_param;1431 pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param; 1432 1432 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1433 pu32addr = &pState->p Nodes[CODEC_NID(cmd)].spdifin.u32F06_param;1433 pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param; 1434 1434 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 1435 pu32addr = &pState->p Nodes[CODEC_NID(cmd)].reserved.u32F06_param;1435 pu32addr = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1436 1436 Assert((pu32addr)); 1437 1437 if (pu32addr) … … 1451 1451 *pResp = 0; 1452 1452 if (codecIsDacNode(pState, CODEC_NID(cmd))) 1453 *pResp = pState->p Nodes[CODEC_NID(cmd)].dac.u32A_param;1453 *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32A_param; 1454 1454 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1455 *pResp = pState->p Nodes[CODEC_NID(cmd)].adc.u32A_param;1455 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32A_param; 1456 1456 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1457 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifout.u32A_param;1457 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param; 1458 1458 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1459 *pResp = pState->p Nodes[CODEC_NID(cmd)].spdifin.u32A_param;1459 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param; 1460 1460 return VINF_SUCCESS; 1461 1461 } … … 1472 1472 *pResp = 0; 1473 1473 if (codecIsDacNode(pState, CODEC_NID(cmd))) 1474 codecSetRegisterU16(&pState->p Nodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0);1474 codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0); 1475 1475 else if (codecIsAdcNode(pState, CODEC_NID(cmd))) 1476 codecSetRegisterU16(&pState->p Nodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0);1476 codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0); 1477 1477 else if (codecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1478 codecSetRegisterU16(&pState->p Nodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0);1478 codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0); 1479 1479 else if (codecIsSpdifInNode(pState, CODEC_NID(cmd))) 1480 codecSetRegisterU16(&pState->p Nodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0);1480 codecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0); 1481 1481 return VINF_SUCCESS; 1482 1482 } … … 1494 1494 *pResp = 0; 1495 1495 if (codecIsAdcVolNode(pState, CODEC_NID(cmd))) 1496 *pResp = pState->p Nodes[CODEC_NID(cmd)].adcvol.u32F0c_param;1496 *pResp = pState->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param; 1497 1497 else if (codecIsDacNode(pState, CODEC_NID(cmd))) 1498 *pResp = pState->p Nodes[CODEC_NID(cmd)].dac.u32F0c_param;1498 *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32F0c_param; 1499 1499 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1500 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F0c_param;1500 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F0c_param; 1501 1501 return VINF_SUCCESS; 1502 1502 } … … 1515 1515 uint32_t *pu32Reg = NULL; 1516 1516 if (codecIsAdcVolNode(pState, CODEC_NID(cmd))) 1517 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].adcvol.u32F0c_param;1517 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param; 1518 1518 else if (codecIsDacNode(pState, CODEC_NID(cmd))) 1519 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].dac.u32F0c_param;1519 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F0c_param; 1520 1520 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1521 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F0c_param;1521 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F0c_param; 1522 1522 *pResp = 0; 1523 1523 Assert((pu32Reg)); … … 1539 1539 *pResp = 0; 1540 1540 if (codecIsVolKnobNode(pState, CODEC_NID(cmd))) 1541 *pResp = pState->p Nodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;1541 *pResp = pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param; 1542 1542 return VINF_SUCCESS; 1543 1543 } … … 1556 1556 *pResp = 0; 1557 1557 if (codecIsVolKnobNode(pState, CODEC_NID(cmd))) 1558 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;1558 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param; 1559 1559 Assert((pu32Reg)); 1560 1560 if (pu32Reg) … … 1576 1576 /* note: this is true for ALC885 */ 1577 1577 if (CODEC_NID(cmd) == 0x1 /* AFG */) 1578 *pResp = pState->p Nodes[1].afg.u32F17_param;1578 *pResp = pState->paNodes[1].afg.u32F17_param; 1579 1579 return VINF_SUCCESS; 1580 1580 } … … 1593 1593 *pResp = 0; 1594 1594 if (CODEC_NID(cmd) == 1 /* AFG */) 1595 pu32Reg = &pState->p Nodes[1].afg.u32F17_param;1595 pu32Reg = &pState->paNodes[1].afg.u32F17_param; 1596 1596 Assert((pu32Reg)); 1597 1597 if (pu32Reg) … … 1612 1612 *pResp = 0; 1613 1613 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1614 *pResp = pState->p Nodes[CODEC_NID(cmd)].port.u32F1c_param;1614 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 1615 1615 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1616 *pResp = pState->p Nodes[CODEC_NID(cmd)].digout.u32F1c_param;1616 *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 1617 1617 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1618 *pResp = pState->p Nodes[CODEC_NID(cmd)].digin.u32F1c_param;1618 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 1619 1619 else if (codecIsPcbeepNode(pState, CODEC_NID(cmd))) 1620 *pResp = pState->p Nodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;1620 *pResp = pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 1621 1621 else if (codecIsCdNode(pState, CODEC_NID(cmd))) 1622 *pResp = pState->p Nodes[CODEC_NID(cmd)].cdnode.u32F1c_param;1622 *pResp = pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 1623 1623 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 1624 *pResp = pState->p Nodes[CODEC_NID(cmd)].reserved.u32F1c_param;1624 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 1625 1625 return VINF_SUCCESS; 1626 1626 } … … 1636 1636 uint32_t *pu32Reg = NULL; 1637 1637 if (codecIsPortNode(pState, CODEC_NID(cmd))) 1638 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].port.u32F1c_param;1638 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 1639 1639 else if (codecIsDigInPinNode(pState, CODEC_NID(cmd))) 1640 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digin.u32F1c_param;1640 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 1641 1641 else if (codecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1642 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].digout.u32F1c_param;1642 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 1643 1643 else if (codecIsCdNode(pState, CODEC_NID(cmd))) 1644 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].cdnode.u32F1c_param;1644 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 1645 1645 else if (codecIsPcbeepNode(pState, CODEC_NID(cmd))) 1646 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].pcbeep.u32F1c_param;1646 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 1647 1647 else if (codecIsReservedNode(pState, CODEC_NID(cmd))) 1648 pu32Reg = &pState->p Nodes[CODEC_NID(cmd)].reserved.u32F1c_param;1648 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 1649 1649 Assert((pu32Reg)); 1650 1650 if (pu32Reg) … … 1832 1832 AssertRC(rc); 1833 1833 /* common root node initializers */ 1834 pState->p Nodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pState->u16VendorId, pState->u16DeviceId);1835 pState->p Nodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);1834 pState->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pState->u16VendorId, pState->u16DeviceId); 1835 pState->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1); 1836 1836 /* common AFG node initializers */ 1837 pState->p Nodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pState->cTotalNodes - 2);1838 pState->p Nodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);1839 pState->p Nodes[1].afg.u32F20_param = CODEC_MAKE_F20(pState->u16VendorId, pState->u8BSKU, pState->u8AssemblyId);1837 pState->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pState->cTotalNodes - 2); 1838 pState->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG); 1839 pState->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pState->u16VendorId, pState->u8BSKU, pState->u8AssemblyId); 1840 1840 1841 1841 //** @todo r=michaln: Was this meant to be 'HDA' or something like that? (AC'97 was on ICH0) … … 1848 1848 as.endianness = 0; 1849 1849 1850 pState->p Nodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;1850 pState->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT; 1851 1851 codecOpenVoice(pState, PI_INDEX, &as); 1852 1852 codecOpenVoice(pState, PO_INDEX, &as); 1853 pState->p Nodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;1853 pState->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ; 1854 1854 1855 1855 uint8_t i; 1856 Assert(pState->p Nodes);1856 Assert(pState->paNodes); 1857 1857 Assert(pState->pfnCodecNodeReset); 1858 1858 for (i = 0; i < pState->cTotalNodes; ++i) 1859 1859 { 1860 pState->pfnCodecNodeReset(pState, i, &pState->p Nodes[i]);1861 } 1862 1863 codecToAudVolume(&pState->p Nodes[pState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);1864 codecToAudVolume(&pState->p Nodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);1860 pState->pfnCodecNodeReset(pState, i, &pState->paNodes[i]); 1861 } 1862 1863 codecToAudVolume(&pState->paNodes[pState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME); 1864 codecToAudVolume(&pState->paNodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN); 1865 1865 1866 1866 /* If no host voices were created, then fallback to nul audio. */ … … 1906 1906 int codecDestruct(CODECState *pCodecState) 1907 1907 { 1908 RTMemFree(pCodecState->pNodes); 1908 RTMemFree(pCodecState->paNodes); 1909 pCodecState->paNodes = NULL; 1909 1910 return VINF_SUCCESS; 1910 1911 } … … 1916 1917 SSMR3PutU32(pSSM, pCodecState->cTotalNodes); 1917 1918 for (unsigned idxNode = 0; idxNode < pCodecState->cTotalNodes; ++idxNode) 1918 SSMR3PutStructEx(pSSM, &pCodecState->p Nodes[idxNode].SavedState, sizeof(pCodecState->pNodes[idxNode].SavedState),1919 SSMR3PutStructEx(pSSM, &pCodecState->paNodes[idxNode].SavedState, sizeof(pCodecState->paNodes[idxNode].SavedState), 1919 1920 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/); 1920 1921 return VINF_SUCCESS; … … 1961 1962 for (unsigned idxNode = 0; idxNode < pCodecState->cTotalNodes; ++idxNode) 1962 1963 { 1963 uint8_t idOld = pCodecState->p Nodes[idxNode].SavedState.Core.id;1964 int rc = SSMR3GetStructEx(pSSM, &pCodecState->p Nodes[idxNode].SavedState,1965 sizeof(pCodecState->p Nodes[idxNode].SavedState),1964 uint8_t idOld = pCodecState->paNodes[idxNode].SavedState.Core.id; 1965 int rc = SSMR3GetStructEx(pSSM, &pCodecState->paNodes[idxNode].SavedState, 1966 sizeof(pCodecState->paNodes[idxNode].SavedState), 1966 1967 fFlags, pFields, NULL); 1967 1968 if (RT_FAILURE(rc)) 1968 1969 return rc; 1969 AssertLogRelMsgReturn(idOld == pCodecState->p Nodes[idxNode].SavedState.Core.id,1970 ("loaded %#x, expected \n", pCodecState->p Nodes[idxNode].SavedState.Core.id, idOld),1970 AssertLogRelMsgReturn(idOld == pCodecState->paNodes[idxNode].SavedState.Core.id, 1971 ("loaded %#x, expected \n", pCodecState->paNodes[idxNode].SavedState.Core.id, idOld), 1971 1972 VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 1972 1973 } … … 1976 1977 */ 1977 1978 if (codecIsDacNode(pCodecState, pCodecState->u8DacLineOut)) 1978 codecToAudVolume(&pCodecState->p Nodes[pCodecState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);1979 codecToAudVolume(&pCodecState->paNodes[pCodecState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME); 1979 1980 else if (codecIsSpdifOutNode(pCodecState, pCodecState->u8DacLineOut)) 1980 codecToAudVolume(&pCodecState->p Nodes[pCodecState->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME);1981 codecToAudVolume(&pCodecState->p Nodes[pCodecState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);1982 1983 return VINF_SUCCESS; 1984 } 1985 1981 codecToAudVolume(&pCodecState->paNodes[pCodecState->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME); 1982 codecToAudVolume(&pCodecState->paNodes[pCodecState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN); 1983 1984 return VINF_SUCCESS; 1985 } 1986 -
trunk/src/VBox/Devices/Audio/DevCodec.h
r44637 r44639 488 488 PCODECEMU pCodecBackend; 489 489 #endif 490 PCODECNODE pNodes;490 PCODECNODE paNodes; 491 491 QEMUSoundCard card; 492 492 /** PCM in */ -
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r44636 r44639 437 437 typedef struct INTELHDLinkState 438 438 { 439 /** The PCI device structure. */ 440 PCIDevice PciDev; 439 441 /** Pointer to the device instance. */ 440 442 PPDMDEVINSR3 pDevIns; … … 469 471 uint64_t u64BaseTS; 470 472 } INTELHDLinkState, *PINTELHDLinkState; 473 /** ICH Intel HD Audio Controller state. */ 474 typedef INTELHDLinkState HDASTATE; 475 /** Pointer to the ICH Intel HD Audio Controller state. */ 476 typedef HDASTATE *PHDASTATE; 471 477 472 478 #define ICH6_HDASTATE_2_DEVINS(pINTELHD) ((pINTELHD)->pDevIns) 473 #define PCIDEV_2_ICH6_HDASTATE(pPciDev) ((P CIINTELHDLinkState *)(pPciDev))479 #define PCIDEV_2_ICH6_HDASTATE(pPciDev) ((PHDASTATE)(pPciDev)) 474 480 475 481 #define ISD0FMT_TO_AUDIO_SELECTOR(pState) (AUDIO_FORMAT_SELECTOR(&(pState)->Codec, In, \ … … 477 483 #define OSD0FMT_TO_AUDIO_SELECTOR(pState) (AUDIO_FORMAT_SELECTOR(&(pState)->Codec, Out, \ 478 484 SDFMT_BASE_RATE(pState, 4), SDFMT_MULT(pState, 4), SDFMT_DIV(pState, 4))) 479 480 481 typedef struct PCIINTELHDLinkState482 {483 PCIDevice dev;484 INTELHDLinkState hda;485 } PCIINTELHDLinkState;486 485 487 486 … … 1920 1919 PDMBOTHCBDECL(int) hdaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 1921 1920 { 1922 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);1923 uint32_t offReg = GCPhysAddr - pThis-> hda.addrMMReg;1924 int idxReg = hdaMMIORegLookup( &pThis->hda, offReg);1921 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 1922 uint32_t offReg = GCPhysAddr - pThis->addrMMReg; 1923 int idxReg = hdaMMIORegLookup(pThis, offReg); 1925 1924 int rc; 1926 1925 Assert(!(offReg & 3)); Assert(cb == 4); 1927 1926 1928 if (pThis-> hda.fInReset && idxReg != ICH6_HDA_REG_GCTL)1927 if (pThis->fInReset && idxReg != ICH6_HDA_REG_GCTL) 1929 1928 Log(("hda: access to registers except GCTL is blocked while reset\n")); 1930 1929 … … 1934 1933 if (idxReg != -1) 1935 1934 { 1936 rc = g_aIchIntelHDRegMap[idxReg].pfnRead( &pThis->hda, offReg, idxReg, (uint32_t *)pv);1935 rc = g_aIchIntelHDRegMap[idxReg].pfnRead(pThis, offReg, idxReg, (uint32_t *)pv); 1937 1936 Log(("hda: read %s[%x/%x]\n", g_aIchIntelHDRegMap[idxReg].abbrev, *(uint32_t *)pv)); 1938 1937 } … … 1951 1950 PDMBOTHCBDECL(int) hdaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1952 1951 { 1953 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);1954 uint32_t offReg = GCPhysAddr - pThis-> hda.addrMMReg;1955 int idxReg = hdaMMIORegLookup( &pThis->hda, offReg);1952 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 1953 uint32_t offReg = GCPhysAddr - pThis->addrMMReg; 1954 int idxReg = hdaMMIORegLookup(pThis, offReg); 1956 1955 int rc; 1957 1956 Assert(!(offReg & 3)); Assert(cb == 4); 1958 1957 1959 if (pThis-> hda.fInReset && idxReg != ICH6_HDA_REG_GCTL)1958 if (pThis->fInReset && idxReg != ICH6_HDA_REG_GCTL) 1960 1959 Log(("hda: access to registers except GCTL is blocked while reset\n")); 1961 1960 … … 1963 1962 { 1964 1963 #ifdef LOG_ENABLED 1965 uint32_t const u32CurValue = pThis-> hda.au32Regs[idxReg];1964 uint32_t const u32CurValue = pThis->au32Regs[idxReg]; 1966 1965 #endif 1967 rc = g_aIchIntelHDRegMap[idxReg].pfnWrite( &pThis->hda, offReg, idxReg, *(uint32_t const *)pv);1966 rc = g_aIchIntelHDRegMap[idxReg].pfnWrite(pThis, offReg, idxReg, *(uint32_t const *)pv); 1968 1967 Log(("hda: write %s:(%x) %x => %x\n", g_aIchIntelHDRegMap[idxReg].abbrev, *(uint32_t const *)pv, 1969 u32CurValue, pThis-> hda.au32Regs[idxReg]));1968 u32CurValue, pThis->au32Regs[idxReg])); 1970 1969 } 1971 1970 else … … 1985 1984 * @callback_method_impl{FNPCIIOREGIONMAP} 1986 1985 */ 1987 static DECLCALLBACK(int) hdaMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 1986 static DECLCALLBACK(int) hdaPciIoRegionMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, uint32_t cb, 1987 PCIADDRESSSPACE enmType) 1988 1988 { 1989 1989 int rc; 1990 1990 PPDMDEVINS pDevIns = pPciDev->pDevIns; 1991 1991 RTIOPORT Port = (RTIOPORT)GCPhysAddress; 1992 P CIINTELHDLinkState *pThis = PCIDEV_2_ICH6_HDASTATE(pPciDev);1992 PHDASTATE pThis = PCIDEV_2_ICH6_HDASTATE(pPciDev); 1993 1993 1994 1994 /* 18.2 of the ICH6 datasheet defines the valid access widths as byte, word, and double word */ … … 2001 2001 return rc; 2002 2002 2003 pThis-> hda.addrMMReg = GCPhysAddress;2003 pThis->addrMMReg = GCPhysAddress; 2004 2004 return VINF_SUCCESS; 2005 2005 } … … 2013 2013 static DECLCALLBACK(int) hdaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 2014 2014 { 2015 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);2015 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2016 2016 /* Save Codec nodes states */ 2017 codecSaveState(&pThis-> hda.Codec, pSSM);2017 codecSaveState(&pThis->Codec, pSSM); 2018 2018 2019 2019 /* Save MMIO registers */ 2020 AssertCompile(RT_ELEMENTS(pThis-> hda.au32Regs) == 112);2021 SSMR3PutU32(pSSM, RT_ELEMENTS(pThis-> hda.au32Regs));2022 SSMR3PutMem(pSSM, pThis-> hda.au32Regs, sizeof(pThis->hda.au32Regs));2020 AssertCompile(RT_ELEMENTS(pThis->au32Regs) == 112); 2021 SSMR3PutU32(pSSM, RT_ELEMENTS(pThis->au32Regs)); 2022 SSMR3PutMem(pSSM, pThis->au32Regs, sizeof(pThis->au32Regs)); 2023 2023 2024 2024 /* Save HDA dma counters */ 2025 SSMR3PutStructEx(pSSM, &pThis-> hda.stOutBdle, sizeof(pThis->hda.stOutBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);2026 SSMR3PutStructEx(pSSM, &pThis-> hda.stMicBdle, sizeof(pThis->hda.stMicBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);2027 SSMR3PutStructEx(pSSM, &pThis-> hda.stInBdle, sizeof(pThis->hda.stInBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL);2025 SSMR3PutStructEx(pSSM, &pThis->stOutBdle, sizeof(pThis->stOutBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL); 2026 SSMR3PutStructEx(pSSM, &pThis->stMicBdle, sizeof(pThis->stMicBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL); 2027 SSMR3PutStructEx(pSSM, &pThis->stInBdle, sizeof(pThis->stInBdle), 0 /*fFlags*/, g_aHdaBDLEDescFields, NULL); 2028 2028 return VINF_SUCCESS; 2029 2029 } … … 2035 2035 static DECLCALLBACK(int) hdaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 2036 2036 { 2037 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);2037 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2038 2038 2039 2039 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass); … … 2042 2042 * Load Codec nodes states. 2043 2043 */ 2044 int rc = codecLoadState(&pThis-> hda.Codec, pSSM, uVersion);2044 int rc = codecLoadState(&pThis->Codec, pSSM, uVersion); 2045 2045 if (RT_FAILURE(rc)) 2046 2046 return rc; … … 2070 2070 case HDA_SSM_VERSION_3: 2071 2071 cRegs = 112; 2072 AssertCompile(RT_ELEMENTS(pThis-> hda.au32Regs) == 112);2072 AssertCompile(RT_ELEMENTS(pThis->au32Regs) == 112); 2073 2073 break; 2074 2074 2075 2075 case HDA_SSM_VERSION: 2076 2076 rc = SSMR3GetU32(pSSM, &cRegs); AssertRCReturn(rc, rc); 2077 AssertLogRelMsgReturn(cRegs == RT_ELEMENTS(pThis-> hda.au32Regs),2078 ("cRegs is %d, expected %d\n", cRegs, RT_ELEMENTS(pThis-> hda.au32Regs)),2077 AssertLogRelMsgReturn(cRegs == RT_ELEMENTS(pThis->au32Regs), 2078 ("cRegs is %d, expected %d\n", cRegs, RT_ELEMENTS(pThis->au32Regs)), 2079 2079 VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 2080 2080 break; … … 2084 2084 } 2085 2085 2086 if (cRegs >= RT_ELEMENTS(pThis-> hda.au32Regs))2087 { 2088 SSMR3GetMem(pSSM, pThis-> hda.au32Regs, sizeof(pThis->hda.au32Regs));2089 SSMR3Skip(pSSM, sizeof(uint32_t) * (cRegs - RT_ELEMENTS(pThis-> hda.au32Regs)));2086 if (cRegs >= RT_ELEMENTS(pThis->au32Regs)) 2087 { 2088 SSMR3GetMem(pSSM, pThis->au32Regs, sizeof(pThis->au32Regs)); 2089 SSMR3Skip(pSSM, sizeof(uint32_t) * (cRegs - RT_ELEMENTS(pThis->au32Regs))); 2090 2090 } 2091 2091 else 2092 2092 { 2093 RT_ZERO(pThis-> hda.au32Regs);2094 SSMR3GetMem(pSSM, pThis-> hda.au32Regs, sizeof(uint32_t) * cRegs);2093 RT_ZERO(pThis->au32Regs); 2094 SSMR3GetMem(pSSM, pThis->au32Regs, sizeof(uint32_t) * cRegs); 2095 2095 } 2096 2096 … … 2100 2100 uint32_t fFlags = uVersion <= HDA_SSM_VERSION_2 ? SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED : 0; 2101 2101 PCSSMFIELD paFields = uVersion <= HDA_SSM_VERSION_2 ? g_aHdaBDLEDescFieldsOld : g_aHdaBDLEDescFields; 2102 SSMR3GetStructEx(pSSM, &pThis-> hda.stOutBdle, sizeof(pThis->hda.stOutBdle), fFlags, paFields, NULL);2103 SSMR3GetStructEx(pSSM, &pThis-> hda.stMicBdle, sizeof(pThis->hda.stMicBdle), fFlags, paFields, NULL);2104 rc = SSMR3GetStructEx(pSSM, &pThis-> hda.stInBdle, sizeof(pThis->hda.stInBdle), fFlags, paFields, NULL);2102 SSMR3GetStructEx(pSSM, &pThis->stOutBdle, sizeof(pThis->stOutBdle), fFlags, paFields, NULL); 2103 SSMR3GetStructEx(pSSM, &pThis->stMicBdle, sizeof(pThis->stMicBdle), fFlags, paFields, NULL); 2104 rc = SSMR3GetStructEx(pSSM, &pThis->stInBdle, sizeof(pThis->stInBdle), fFlags, paFields, NULL); 2105 2105 AssertRCReturn(rc, rc); 2106 2106 … … 2108 2108 * Update stuff after the state changes. 2109 2109 */ 2110 AUD_set_active_in(pThis-> hda.Codec.SwVoiceIn, SDCTL(&pThis->hda, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));2111 AUD_set_active_out(pThis-> hda.Codec.SwVoiceOut, SDCTL(&pThis->hda, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));2112 2113 pThis-> hda.u64CORBBase = RT_MAKE_U64(CORBLBASE(&pThis->hda), CORBUBASE(&pThis->hda));2114 pThis-> hda.u64RIRBBase = RT_MAKE_U64(RIRLBASE(&pThis->hda), RIRUBASE(&pThis->hda));2115 pThis-> hda.u64DPBase = RT_MAKE_U64(DPLBASE(&pThis->hda), DPUBASE(&pThis->hda));2110 AUD_set_active_in(pThis->Codec.SwVoiceIn, SDCTL(pThis, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); 2111 AUD_set_active_out(pThis->Codec.SwVoiceOut, SDCTL(pThis, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); 2112 2113 pThis->u64CORBBase = RT_MAKE_U64(CORBLBASE(pThis), CORBUBASE(pThis)); 2114 pThis->u64RIRBBase = RT_MAKE_U64(RIRLBASE(pThis), RIRUBASE(pThis)); 2115 pThis->u64DPBase = RT_MAKE_U64(DPLBASE(pThis), DPUBASE(pThis)); 2116 2116 return VINF_SUCCESS; 2117 2117 } … … 2234 2234 static DECLCALLBACK(void) hdaInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 2235 2235 { 2236 PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *); 2237 INTELHDLinkState *hda = &pThis->hda; 2238 int iHdaRegisterIndex = hdaLookUpRegisterByName(hda, pszArgs); 2236 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2237 int iHdaRegisterIndex = hdaLookUpRegisterByName(pThis, pszArgs); 2239 2238 if (iHdaRegisterIndex != -1) 2240 hdaDbgPrintRegister( hda, pHlp, iHdaRegisterIndex);2239 hdaDbgPrintRegister(pThis, pHlp, iHdaRegisterIndex); 2241 2240 else 2242 2241 for(iHdaRegisterIndex = 0; (unsigned int)iHdaRegisterIndex < HDA_NREGS; ++iHdaRegisterIndex) 2243 hdaDbgPrintRegister( hda, pHlp, iHdaRegisterIndex);2242 hdaDbgPrintRegister(pThis, pHlp, iHdaRegisterIndex); 2244 2243 } 2245 2244 … … 2270 2269 static DECLCALLBACK(void) hdaInfoStream(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 2271 2270 { 2272 PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *); 2273 INTELHDLinkState *hda = &pThis->hda; 2274 int iHdaStrmIndex = hdaLookUpStreamIndex(hda, pszArgs); 2271 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2272 int iHdaStrmIndex = hdaLookUpStreamIndex(pThis, pszArgs); 2275 2273 if (iHdaStrmIndex != -1) 2276 hdaDbgPrintStream( hda, pHlp, iHdaStrmIndex);2274 hdaDbgPrintStream(pThis, pHlp, iHdaStrmIndex); 2277 2275 else 2278 2276 for(iHdaStrmIndex = 0; iHdaStrmIndex < 7; ++iHdaStrmIndex) 2279 hdaDbgPrintStream( hda, pHlp, iHdaStrmIndex);2277 hdaDbgPrintStream(pThis, pHlp, iHdaStrmIndex); 2280 2278 } 2281 2279 … … 2285 2283 static DECLCALLBACK(void) hdaInfoCodecNodes(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 2286 2284 { 2287 PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *); 2288 INTELHDLinkState *hda = &pThis->hda; 2289 if (hda->Codec.pfnCodecDbgListNodes) 2290 hda->Codec.pfnCodecDbgListNodes(&hda->Codec, pHlp, pszArgs); 2285 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2286 if (pThis->Codec.pfnCodecDbgListNodes) 2287 pThis->Codec.pfnCodecDbgListNodes(&pThis->Codec, pHlp, pszArgs); 2291 2288 else 2292 2289 pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback.\n"); … … 2299 2296 static DECLCALLBACK(void) hdaInfoCodecSelector(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 2300 2297 { 2301 PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *); 2302 INTELHDLinkState *hda = &pThis->hda; 2303 if (hda->Codec.pfnCodecDbgSelector) 2304 hda->Codec.pfnCodecDbgSelector(&hda->Codec, pHlp, pszArgs); 2298 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2299 if (pThis->Codec.pfnCodecDbgSelector) 2300 pThis->Codec.pfnCodecDbgSelector(&pThis->Codec, pHlp, pszArgs); 2305 2301 else 2306 2302 pHlp->pfnPrintf(pHlp, "Codec implementation doesn't provide corresponding callback.\n"); … … 2315 2311 static DECLCALLBACK(void *) hdaQueryInterface(struct PDMIBASE *pInterface, const char *pszIID) 2316 2312 { 2317 P CIINTELHDLinkState *pThis = RT_FROM_MEMBER(pInterface, PCIINTELHDLinkState, hda.IBase);2318 Assert(&pThis-> hda.IBase == pInterface);2319 2320 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis-> hda.IBase);2313 PHDASTATE pThis = RT_FROM_MEMBER(pInterface, HDASTATE, IBase); 2314 Assert(&pThis->IBase == pInterface); 2315 2316 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase); 2321 2317 return NULL; 2322 2318 } … … 2336 2332 static DECLCALLBACK(void) hdaReset(PPDMDEVINS pDevIns) 2337 2333 { 2338 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);2339 GCAP( &pThis->hda) = HDA_MAKE_GCAP(4,4,0,0,1); /* see 6.2.1 */2340 VMIN( &pThis->hda) = 0x00; /* see 6.2.2 */2341 VMAJ( &pThis->hda) = 0x01; /* see 6.2.3 */2342 VMAJ( &pThis->hda) = 0x01; /* see 6.2.3 */2343 OUTPAY( &pThis->hda) = 0x003C; /* see 6.2.4 */2344 INPAY( &pThis->hda) = 0x001D; /* see 6.2.5 */2345 pThis-> hda.au32Regs[ICH6_HDA_REG_CORBSIZE] = 0x42; /* see 6.2.1 */2346 pThis-> hda.au32Regs[ICH6_HDA_REG_RIRBSIZE] = 0x42; /* see 6.2.1 */2347 CORBRP( &pThis->hda) = 0x0;2348 RIRBWP( &pThis->hda) = 0x0;2334 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2335 GCAP(pThis) = HDA_MAKE_GCAP(4,4,0,0,1); /* see 6.2.1 */ 2336 VMIN(pThis) = 0x00; /* see 6.2.2 */ 2337 VMAJ(pThis) = 0x01; /* see 6.2.3 */ 2338 VMAJ(pThis) = 0x01; /* see 6.2.3 */ 2339 OUTPAY(pThis) = 0x003C; /* see 6.2.4 */ 2340 INPAY(pThis) = 0x001D; /* see 6.2.5 */ 2341 pThis->au32Regs[ICH6_HDA_REG_CORBSIZE] = 0x42; /* see 6.2.1 */ 2342 pThis->au32Regs[ICH6_HDA_REG_RIRBSIZE] = 0x42; /* see 6.2.1 */ 2343 CORBRP(pThis) = 0x0; 2344 RIRBWP(pThis) = 0x0; 2349 2345 2350 2346 Log(("hda: inter HDA reset.\n")); 2351 pThis-> hda.cbCorbBuf = 256 * sizeof(uint32_t);2352 2353 if (pThis-> hda.pu32CorbBuf)2354 memset(pThis-> hda.pu32CorbBuf, 0, pThis->hda.cbCorbBuf);2347 pThis->cbCorbBuf = 256 * sizeof(uint32_t); 2348 2349 if (pThis->pu32CorbBuf) 2350 memset(pThis->pu32CorbBuf, 0, pThis->cbCorbBuf); 2355 2351 else 2356 pThis-> hda.pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->hda.cbCorbBuf);2357 2358 pThis-> hda.cbRirbBuf = 256 * sizeof(uint64_t);2359 if (pThis-> hda.pu64RirbBuf)2360 memset(pThis-> hda.pu64RirbBuf, 0, pThis->hda.cbRirbBuf);2352 pThis->pu32CorbBuf = (uint32_t *)RTMemAllocZ(pThis->cbCorbBuf); 2353 2354 pThis->cbRirbBuf = 256 * sizeof(uint64_t); 2355 if (pThis->pu64RirbBuf) 2356 memset(pThis->pu64RirbBuf, 0, pThis->cbRirbBuf); 2361 2357 else 2362 pThis-> hda.pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->hda.cbRirbBuf);2363 2364 pThis-> hda.u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns);2358 pThis->pu64RirbBuf = (uint64_t *)RTMemAllocZ(pThis->cbRirbBuf); 2359 2360 pThis->u64BaseTS = PDMDevHlpTMTimeVirtGetNano(pDevIns); 2365 2361 2366 2362 HDABDLEDESC stEmptyBdle; … … 2370 2366 PHDABDLEDESC pBdle = NULL; 2371 2367 if (u8Strm == 0) 2372 pBdle = &pThis-> hda.stInBdle;2368 pBdle = &pThis->stInBdle; 2373 2369 else if(u8Strm == 4) 2374 pBdle = &pThis-> hda.stOutBdle;2370 pBdle = &pThis->stOutBdle; 2375 2371 else 2376 2372 { … … 2378 2374 pBdle = &stEmptyBdle; 2379 2375 } 2380 hdaInitTransferDescriptor( &pThis->hda, pBdle, u8Strm, &StreamDesc);2376 hdaInitTransferDescriptor(pThis, pBdle, u8Strm, &StreamDesc); 2381 2377 /* hdaStreamReset prevents changing the SRST bit, so we force it to zero here. */ 2382 HDA_STREAM_REG2( &pThis->hda, CTL, u8Strm) = 0;2383 hdaStreamReset( &pThis->hda, pBdle, &StreamDesc, u8Strm);2378 HDA_STREAM_REG2(pThis, CTL, u8Strm) = 0; 2379 hdaStreamReset(pThis, pBdle, &StreamDesc, u8Strm); 2384 2380 } 2385 2381 2386 2382 /* emulation of codec "wake up" (HDA spec 5.5.1 and 6.5)*/ 2387 STATESTS( &pThis->hda) = 0x1;2383 STATESTS(pThis) = 0x1; 2388 2384 2389 2385 Log(("hda: reset finished\n")); … … 2396 2392 static DECLCALLBACK(int) hdaDestruct(PPDMDEVINS pDevIns) 2397 2393 { 2398 P CIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);2399 2400 int rc = codecDestruct(&pThis-> hda.Codec);2394 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2395 2396 int rc = codecDestruct(&pThis->Codec); 2401 2397 AssertRC(rc); 2402 if (pThis->hda.pu32CorbBuf) 2403 RTMemFree(pThis->hda.pu32CorbBuf); 2404 if (pThis->hda.pu64RirbBuf) 2405 RTMemFree(pThis->hda.pu64RirbBuf); 2398 2399 RTMemFree(pThis->pu32CorbBuf); 2400 pThis->pu32CorbBuf = NULL; 2401 2402 RTMemFree(pThis->pu64RirbBuf); 2403 pThis->pu64RirbBuf = NULL; 2404 2406 2405 return VINF_SUCCESS; 2407 2406 } … … 2412 2411 static DECLCALLBACK(int) hdaConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle) 2413 2412 { 2414 PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *); 2415 INTELHDLinkState *s = &pThis->hda; 2416 int rc; 2413 PHDASTATE pThis = PDMINS_2_DATA(pDevIns, PHDASTATE); 2414 int rc; 2417 2415 2418 2416 Assert(iInstance == 0); … … 2427 2425 2428 2426 // ** @todo r=michaln: This device may need R0/RC enabling, especially if guests 2429 // poll some register( s).2427 // poll some register(pThis). 2430 2428 2431 2429 /* 2432 2430 * Initialize data (most of it anyway). 2433 2431 */ 2434 s->pDevIns = pDevIns;2432 pThis->pDevIns = pDevIns; 2435 2433 /* IBase */ 2436 s->IBase.pfnQueryInterface = hdaQueryInterface;2434 pThis->IBase.pfnQueryInterface = hdaQueryInterface; 2437 2435 2438 2436 /* PCI Device */ 2439 PCIDevSetVendorId (&pThis-> dev, HDA_PCI_VENDOR_ID); /* nVidia */2440 PCIDevSetDeviceId (&pThis-> dev, HDA_PCI_DEICE_ID); /* HDA */2441 2442 PCIDevSetCommand (&pThis-> dev, 0x0000); /* 04 rw,ro - pcicmd. */2443 PCIDevSetStatus (&pThis-> dev, VBOX_PCI_STATUS_CAP_LIST); /* 06 rwc?,ro? - pcists. */2444 PCIDevSetRevisionId (&pThis-> dev, 0x01); /* 08 ro - rid. */2445 PCIDevSetClassProg (&pThis-> dev, 0x00); /* 09 ro - pi. */2446 PCIDevSetClassSub (&pThis-> dev, 0x03); /* 0a ro - scc; 03 == HDA. */2447 PCIDevSetClassBase (&pThis-> dev, 0x04); /* 0b ro - bcc; 04 == multimedia. */2448 PCIDevSetHeaderType (&pThis-> dev, 0x00); /* 0e ro - headtyp. */2449 PCIDevSetBaseAddress (&pThis-> dev, 0, /* 10 rw - MMIO */2437 PCIDevSetVendorId (&pThis->PciDev, HDA_PCI_VENDOR_ID); /* nVidia */ 2438 PCIDevSetDeviceId (&pThis->PciDev, HDA_PCI_DEICE_ID); /* HDA */ 2439 2440 PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ 2441 PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_CAP_LIST); /* 06 rwc?,ro? - pcists. */ 2442 PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ 2443 PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ 2444 PCIDevSetClassSub (&pThis->PciDev, 0x03); /* 0a ro - scc; 03 == HDA. */ 2445 PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ 2446 PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ 2447 PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - MMIO */ 2450 2448 false /* fIoSpace */, false /* fPrefetchable */, true /* f64Bit */, 0x00000000); 2451 PCIDevSetInterruptLine (&pThis-> dev, 0x00); /* 3c rw. */2452 PCIDevSetInterruptPin (&pThis-> dev, 0x01); /* 3d ro - INTA#. */2449 PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ 2450 PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ 2453 2451 2454 2452 #if defined(HDA_AS_PCI_EXPRESS) 2455 PCIDevSetCapabilityList (&pThis-> dev, 0x80);2453 PCIDevSetCapabilityList (&pThis->PciDev, 0x80); 2456 2454 #elif defined(VBOX_WITH_MSI_DEVICES) 2457 PCIDevSetCapabilityList (&pThis-> dev, 0x60);2455 PCIDevSetCapabilityList (&pThis->PciDev, 0x60); 2458 2456 #else 2459 PCIDevSetCapabilityList (&pThis-> dev, 0x50); /* ICH6 datasheet 18.1.16 */2457 PCIDevSetCapabilityList (&pThis->PciDev, 0x50); /* ICH6 datasheet 18.1.16 */ 2460 2458 #endif 2461 2459 … … 2463 2461 /// of these values needs to be properly documented! 2464 2462 /* HDCTL off 0x40 bit 0 selects signaling mode (1-HDA, 0 - Ac97) 18.1.19 */ 2465 PCIDevSetByte(&pThis-> dev, 0x40, 0x01);2463 PCIDevSetByte(&pThis->PciDev, 0x40, 0x01); 2466 2464 2467 2465 /* Power Management */ 2468 PCIDevSetByte(&pThis-> dev, 0x50 + 0, VBOX_PCI_CAP_ID_PM);2469 PCIDevSetByte(&pThis-> dev, 0x50 + 1, 0x0); /* next */2470 PCIDevSetWord(&pThis-> dev, 0x50 + 2, VBOX_PCI_PM_CAP_DSI | 0x02 /* version, PM1.1 */ );2466 PCIDevSetByte(&pThis->PciDev, 0x50 + 0, VBOX_PCI_CAP_ID_PM); 2467 PCIDevSetByte(&pThis->PciDev, 0x50 + 1, 0x0); /* next */ 2468 PCIDevSetWord(&pThis->PciDev, 0x50 + 2, VBOX_PCI_PM_CAP_DSI | 0x02 /* version, PM1.1 */ ); 2471 2469 2472 2470 #ifdef HDA_AS_PCI_EXPRESS 2473 2471 /* PCI Express */ 2474 PCIDevSetByte(&pThis-> dev, 0x80 + 0, VBOX_PCI_CAP_ID_EXP); /* PCI_Express */2475 PCIDevSetByte(&pThis-> dev, 0x80 + 1, 0x60); /* next */2472 PCIDevSetByte(&pThis->PciDev, 0x80 + 0, VBOX_PCI_CAP_ID_EXP); /* PCI_Express */ 2473 PCIDevSetByte(&pThis->PciDev, 0x80 + 1, 0x60); /* next */ 2476 2474 /* Device flags */ 2477 PCIDevSetWord(&pThis-> dev, 0x80 + 2,2475 PCIDevSetWord(&pThis->PciDev, 0x80 + 2, 2478 2476 /* version */ 0x1 | 2479 2477 /* Root Complex Integrated Endpoint */ (VBOX_PCI_EXP_TYPE_ROOT_INT_EP << 4) | 2480 2478 /* MSI */ (100) << 9 ); 2481 2479 /* Device capabilities */ 2482 PCIDevSetDWord(&pThis-> dev, 0x80 + 4, VBOX_PCI_EXP_DEVCAP_FLRESET);2480 PCIDevSetDWord(&pThis->PciDev, 0x80 + 4, VBOX_PCI_EXP_DEVCAP_FLRESET); 2483 2481 /* Device control */ 2484 PCIDevSetWord( &pThis-> dev, 0x80 + 8, 0);2482 PCIDevSetWord( &pThis->PciDev, 0x80 + 8, 0); 2485 2483 /* Device status */ 2486 PCIDevSetWord( &pThis-> dev, 0x80 + 10, 0);2484 PCIDevSetWord( &pThis->PciDev, 0x80 + 10, 0); 2487 2485 /* Link caps */ 2488 PCIDevSetDWord(&pThis-> dev, 0x80 + 12, 0);2486 PCIDevSetDWord(&pThis->PciDev, 0x80 + 12, 0); 2489 2487 /* Link control */ 2490 PCIDevSetWord( &pThis-> dev, 0x80 + 16, 0);2488 PCIDevSetWord( &pThis->PciDev, 0x80 + 16, 0); 2491 2489 /* Link status */ 2492 PCIDevSetWord( &pThis-> dev, 0x80 + 18, 0);2490 PCIDevSetWord( &pThis->PciDev, 0x80 + 18, 0); 2493 2491 /* Slot capabilities */ 2494 PCIDevSetDWord(&pThis-> dev, 0x80 + 20, 0);2492 PCIDevSetDWord(&pThis->PciDev, 0x80 + 20, 0); 2495 2493 /* Slot control */ 2496 PCIDevSetWord( &pThis-> dev, 0x80 + 24, 0);2494 PCIDevSetWord( &pThis->PciDev, 0x80 + 24, 0); 2497 2495 /* Slot status */ 2498 PCIDevSetWord( &pThis-> dev, 0x80 + 26, 0);2496 PCIDevSetWord( &pThis->PciDev, 0x80 + 26, 0); 2499 2497 /* Root control */ 2500 PCIDevSetWord( &pThis-> dev, 0x80 + 28, 0);2498 PCIDevSetWord( &pThis->PciDev, 0x80 + 28, 0); 2501 2499 /* Root capabilities */ 2502 PCIDevSetWord( &pThis-> dev, 0x80 + 30, 0);2500 PCIDevSetWord( &pThis->PciDev, 0x80 + 30, 0); 2503 2501 /* Root status */ 2504 PCIDevSetDWord(&pThis-> dev, 0x80 + 32, 0);2502 PCIDevSetDWord(&pThis->PciDev, 0x80 + 32, 0); 2505 2503 /* Device capabilities 2 */ 2506 PCIDevSetDWord(&pThis-> dev, 0x80 + 36, 0);2504 PCIDevSetDWord(&pThis->PciDev, 0x80 + 36, 0); 2507 2505 /* Device control 2 */ 2508 PCIDevSetQWord(&pThis-> dev, 0x80 + 40, 0);2506 PCIDevSetQWord(&pThis->PciDev, 0x80 + 40, 0); 2509 2507 /* Link control 2 */ 2510 PCIDevSetQWord(&pThis-> dev, 0x80 + 48, 0);2508 PCIDevSetQWord(&pThis->PciDev, 0x80 + 48, 0); 2511 2509 /* Slot control 2 */ 2512 PCIDevSetWord( &pThis-> dev, 0x80 + 56, 0);2510 PCIDevSetWord( &pThis->PciDev, 0x80 + 56, 0); 2513 2511 #endif 2514 2512 … … 2516 2514 * Register the PCI device. 2517 2515 */ 2518 rc = PDMDevHlpPCIRegister(pDevIns, &pThis-> dev);2516 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev); 2519 2517 if (RT_FAILURE(rc)) 2520 2518 return rc; 2521 2519 2522 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 0x4000, PCI_ADDRESS_SPACE_MEM, hda Map);2520 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 0x4000, PCI_ADDRESS_SPACE_MEM, hdaPciIoRegionMap); 2523 2521 if (RT_FAILURE(rc)) 2524 2522 return rc; … … 2534 2532 { 2535 2533 LogRel(("Chipset cannot do MSI: %Rrc\n", rc)); 2536 PCIDevSetCapabilityList(&pThis-> dev, 0x50);2534 PCIDevSetCapabilityList(&pThis->PciDev, 0x50); 2537 2535 } 2538 2536 #endif … … 2545 2543 * Attach driver. 2546 2544 */ 2547 rc = PDMDevHlpDriverAttach(pDevIns, 0, & s->IBase, &s->pDrvBase, "Audio Driver Port");2545 rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->IBase, &pThis->pDrvBase, "Audio Driver Port"); 2548 2546 if (rc == VERR_PDM_NO_ATTACHED_DRIVER) 2549 2547 Log(("hda: No attached driver!\n")); … … 2554 2552 } 2555 2553 2556 2557 2558 pThis->hda.Codec.pvHDAState = (void *)&pThis->hda; 2559 rc = codecConstruct(pDevIns, &pThis->hda.Codec, pCfgHandle); 2554 pThis->Codec.pvHDAState = pThis; 2555 rc = codecConstruct(pDevIns, &pThis->Codec, pCfgHandle); 2560 2556 if (RT_FAILURE(rc)) 2561 2557 AssertRCReturn(rc, rc); … … 2563 2559 /* ICH6 datasheet defines 0 values for SVID and SID (18.1.14-15), which together with values returned for 2564 2560 verb F20 should provide device/codec recognition. */ 2565 Assert(pThis-> hda.Codec.u16VendorId);2566 Assert(pThis-> hda.Codec.u16DeviceId);2567 PCIDevSetSubSystemVendorId (&pThis->dev, pThis->hda.Codec.u16VendorId); /* 2c ro - intel.) */2568 PCIDevSetSubSystemId (&pThis->dev, pThis->hda.Codec.u16DeviceId); /* 2e ro. */2561 Assert(pThis->Codec.u16VendorId); 2562 Assert(pThis->Codec.u16DeviceId); 2563 PCIDevSetSubSystemVendorId(&pThis->PciDev, pThis->Codec.u16VendorId); /* 2c ro - intel.) */ 2564 PCIDevSetSubSystemId( &pThis->PciDev, pThis->Codec.u16DeviceId); /* 2e ro. */ 2569 2565 2570 2566 hdaReset(pDevIns); 2571 pThis-> hda.Codec.id = 0;2572 pThis-> hda.Codec.pfnTransfer = hdaTransfer;2573 pThis-> hda.Codec.pfnReset = hdaCodecReset;2567 pThis->Codec.id = 0; 2568 pThis->Codec.pfnTransfer = hdaTransfer; 2569 pThis->Codec.pfnReset = hdaCodecReset; 2574 2570 2575 2571 /* … … 2577 2573 * hdaReset shouldn't affects these registers. 2578 2574 */ 2579 WAKEEN( &pThis->hda) = 0x0;2580 STATESTS( &pThis->hda) = 0x0;2575 WAKEEN(pThis) = 0x0; 2576 STATESTS(pThis) = 0x0; 2581 2577 2582 2578 /* … … 2626 2622 1, 2627 2623 /* cbInstance */ 2628 sizeof( PCIINTELHDLinkState),2624 sizeof(HDASTATE), 2629 2625 /* pfnConstruct */ 2630 2626 hdaConstruct,
Note:
See TracChangeset
for help on using the changeset viewer.