VirtualBox

Changeset 44897 in vbox for trunk/include/VBox/vmm


Ignore:
Timestamp:
Mar 1, 2013 9:44:24 PM (12 years ago)
Author:
vboxsync
Message:

Cleanups related to pci bus master memory access (#1871).

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/pdmdev.h

    r44896 r44897  
    28812881
    28822882    /**
    2883      * Reads data via bus mastering, if enabled. If no bus mastering is available,
    2884      * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
    2885      *
    2886      * @return  IPRT status code.
    2887      */
    2888     DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
    2889 
    2890     /**
    2891      * Writes data via bus mastering, if enabled. If no bus mastering is available,
    2892      * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
    2893      *
    2894      * @return  IPRT status code.
    2895      */
    2896     DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
    2897 
    2898     /**
    28992883     * Registers the device with the default PCI bus.
    29002884     *
    … …  
    29552939
    29562940    /**
     2941     * Bus master physical memory read.
     2942     *
     2943     * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     2944     *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     2945     * @param   pDevIns             The device instance.
     2946     * @param   GCPhys              Physical address start reading from.
     2947     * @param   pvBuf               Where to put the read bits.
     2948     * @param   cbRead              How many bytes to read.
     2949     * @thread  Any thread, but the call may involve the emulation thread.
     2950     */
     2951    DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     2952
     2953    /**
     2954     * Bus master physical memory write.
     2955     *
     2956     * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     2957     *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     2958     * @param   pDevIns             The device instance.
     2959     * @param   GCPhys              Physical address to write to.
     2960     * @param   pvBuf               What to write.
     2961     * @param   cbWrite             How many bytes to write.
     2962     * @thread  Any thread, but the call may involve the emulation thread.
     2963     */
     2964    DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     2965
     2966    /**
    29572967     * Set the IRQ for a PCI device.
    29582968     *
    … …  
    35813591
    35823592/** Current PDMDEVHLPR3 version number. */
    3583 #define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE(0xffe7, 10, 0)
     3593#define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE(0xffe7, 11, 0)
    35843594
    35853595
    … …  
    35933603
    35943604    /**
    3595      * Reads data via bus mastering, if enabled. If no bus mastering is available,
    3596      * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
    3597      *
    3598      * @return  IPRT status code.
    3599      */
    3600     DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
    3601 
    3602     /**
    3603      * Writes data via bus mastering, if enabled. If no bus mastering is available,
    3604      * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
    3605      *
    3606      * @return  IPRT status code.
    3607      */
    3608     DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     3605     * Bus master physical memory read.
     3606     *
     3607     * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     3608     *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     3609     * @param   pDevIns             The device instance.
     3610     * @param   GCPhys              Physical address start reading from.
     3611     * @param   pvBuf               Where to put the read bits.
     3612     * @param   cbRead              How many bytes to read.
     3613     * @thread  Any thread, but the call may involve the emulation thread.
     3614     */
     3615    DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     3616
     3617    /**
     3618     * Bus master physical memory write.
     3619     *
     3620     * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     3621     *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     3622     * @param   pDevIns             The device instance.
     3623     * @param   GCPhys              Physical address to write to.
     3624     * @param   pvBuf               What to write.
     3625     * @param   cbWrite             How many bytes to write.
     3626     * @thread  Any thread, but the call may involve the emulation thread.
     3627     */
     3628    DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
    36093629
    36103630    /**
    … …  
    37883808
    37893809/** Current PDMDEVHLP version number. */
    3790 #define PDM_DEVHLPRC_VERSION                    PDM_VERSION_MAKE(0xffe6, 3, 0)
     3810#define PDM_DEVHLPRC_VERSION                    PDM_VERSION_MAKE(0xffe6, 3, 1)
    37913811
    37923812
    … …  
    38003820
    38013821    /**
    3802      * Reads data via bus mastering, if enabled. If no bus mastering is available,
    3803      * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
    3804      *
    3805      * @return  IPRT status code.
     3822     * Bus master physical memory read.
     3823     *
     3824     * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
     3825     *          VERR_EM_MEMORY.
     3826     * @param   pDevIns             The device instance.
     3827     * @param   GCPhys              Physical address start reading from.
     3828     * @param   pvBuf               Where to put the read bits.
     3829     * @param   cbRead              How many bytes to read.
     3830     * @thread  Any thread, but the call may involve the emulation thread.
    38063831     */
    38073832    DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
    38083833
    38093834    /**
    3810      * Writes data via bus mastering, if enabled. If no bus mastering is available,
    3811      * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
    3812      *
    3813      * @return  IPRT status code.
     3835     * Bus master physical memory write.
     3836     *
     3837     * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
     3838     *          VERR_EM_MEMORY.
     3839     * @param   pDevIns             The device instance.
     3840     * @param   GCPhys              Physical address to write to.
     3841     * @param   pvBuf               What to write.
     3842     * @param   cbWrite             How many bytes to write.
     3843     * @thread  Any thread, but the call may involve the emulation thread.
    38143844     */
    38153845    DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
    … …  
    40034033
    40044034/** Current PDMDEVHLP version number. */
    4005 #define PDM_DEVHLPR0_VERSION                    PDM_VERSION_MAKE(0xffe5, 3, 0)
     4035#define PDM_DEVHLPR0_VERSION                    PDM_VERSION_MAKE(0xffe5, 3, 1)
    40064036
    40074037
    … …  
    47234753}
    47244754
    4725 /**
    4726  * Reads data via bus mastering, if enabled. If no bus mastering is available,
    4727  * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
    4728  *
    4729  * @return  IPRT status code.
    4730  */
    4731 DECLINLINE(int) PDMDevHlpPCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    4732 {
    4733     AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);
    4734     AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
    4735     AssertReturn(cbRead, VERR_INVALID_PARAMETER);
    4736 
    4737     if (!PCIDevIsBusmaster(pPciDev))
    4738     {
    4739 #ifdef DEBUG
    4740         Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__,
    4741               PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead));
    4742 #endif
    4743         return VINF_PDM_PCI_PHYS_READ_BM_DISABLED;
    4744     }
    4745 
    4746     return PDMDevHlpPhysRead(pPciDev->pDevIns, GCPhys, pvBuf, cbRead);
    4747 }
    4748 
    4749 /**
    4750  * Writes data via bus mastering, if enabled. If no bus mastering is available,
    4751  * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
    4752  *
    4753  * @return  IPRT status code.
    4754  */
    4755 DECLINLINE(int) PDMDevHlpPCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    4756 {
    4757     AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);
    4758     AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
    4759     AssertReturn(cbWrite, VERR_INVALID_PARAMETER);
    4760 
    4761     if (!PCIDevIsBusmaster(pPciDev))
    4762     {
    4763 #ifdef DEBUG
    4764         Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__,
    4765               PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite));
    4766 #endif
    4767         return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED;
    4768     }
    4769 
    4770     return PDMDevHlpPhysWrite(pPciDev->pDevIns, GCPhys, pvBuf, cbWrite);
    4771 }
    4772 
    47734755#endif /* IN_RING3 */
     4756
     4757/**
     4758 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
     4759 */
     4760DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     4761{
     4762    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
     4763}
     4764
     4765/**
     4766 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
     4767 */
     4768DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     4769{
     4770    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
     4771}
    47744772
    47754773/**
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