VirtualBox

Ignore:
Timestamp:
Apr 8, 2013 3:01:06 PM (12 years ago)
Author:
vboxsync
Message:

VMM/VMMR0: HM bits. Save preemption timer value on every VM-exit and reset it up when required.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r45408 r45409  
    169169    uint32_t        fVmcsFieldsRead;
    170170    /** Whether TSC-offsetting should be setup before VM-entry. */
    171     bool            fUpdateTscOffsetting;
     171    bool            fUpdateTscOffsettingAndPreemptTimer;
    172172    /** Whether the VM-exit was caused by a page-fault during delivery of a
    173173     *  contributary exception or a page-fault. */
     
    23532353         *        VMX_VMCS_CTRL_EXIT_CONTROLS_LOAD_HOST_PAT_MSR,
    23542354         *        VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_GUEST_EFER_MSR,
    2355          *        VMX_VMCS_CTRL_EXIT_CONTROLS_LOAD_HOST_EFER_MSR,
    2356          *        VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER. */
     2355         *        VMX_VMCS_CTRL_EXIT_CONTROLS_LOAD_HOST_EFER_MSR. */
     2356
     2357        if (pVM->hm.s.vmx.msr.vmx_exit.n.allowed1 & VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER)
     2358            val |= VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER;
    23572359
    23582360        if ((val & zap) != val)
     
    47954797
    47964798/**
    4797  * Gets the guest's interruptibility-state ("interrupt shadow" as AMD calls it)
     4799 * Saves the guest's interruptibility-state ("interrupt shadow" as AMD calls it)
    47984800 * from the guest-state area in the VMCS.
    47994801 *
     
    63486350
    63496351    /* Setup TSC-offsetting or intercept RDTSC(P)s and update the preemption timer. */
    6350     if (pVmxTransient->fUpdateTscOffsetting)
     6352    if (pVmxTransient->fUpdateTscOffsettingAndPreemptTimer)
    63516353    {
    63526354        hmR0VmxUpdateTscOffsettingAndPreemptTimer(pVM, pVCpu, pMixedCtx);
    6353         pVmxTransient->fUpdateTscOffsetting = false;
     6355        pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = false;
    63546356    }
    63556357
     
    64836485
    64846486    VMXTRANSIENT VmxTransient;
    6485     VmxTransient.fUpdateTscOffsetting = true;
     6487    VmxTransient.fUpdateTscOffsettingAndPreemptTimer = true;
    64866488    int          rc     = VERR_INTERNAL_ERROR_5;
    64876489    unsigned     cLoops = 0;
     
    68226824        /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
    68236825        if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TSC_OFFSETTING)
    6824             pVmxTransient->fUpdateTscOffsetting = true;
     6826            pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
    68256827    }
    68266828    else
     
    68576859        /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
    68586860        if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TSC_OFFSETTING)
    6859             pVmxTransient->fUpdateTscOffsetting = true;
     6861            pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
    68606862    }
    68616863    else
     
    71297131{
    71307132    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
     7133
     7134    /* If we're saving the preemption-timer value on every VM-exit & we've reached zero, reset it up on next VM-entry. */
     7135    if (pVCpu->hm.s.vmx.u32ExitCtls & VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER)
     7136        pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
     7137
    71317138    /* If there are any timer events pending, fall back to ring-3, otherwise resume guest execution. */
    71327139    bool fTimersPending = TMTimerPollBool(pVM, pVCpu);
    7133     int rc = fTimersPending ? VINF_EM_RAW_TIMER_PENDING : VINF_SUCCESS;
    71347140    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitPreemptTimer);
    7135     return rc;
     7141    return fTimersPending ? VINF_EM_RAW_TIMER_PENDING : VINF_SUCCESS;
    71367142}
    71377143
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