- Timestamp:
- Apr 29, 2013 3:40:54 AM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r45485 r45798 675 675 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CR0; 676 676 677 /* 678 * Let PGM know if the WP goes from 0 to 1 (netware WP0+RO+US hack) 679 */ 680 if (((cr0 ^ pVCpu->cpum.s.Guest.cr0) & X86_CR0_WP) && (cr0 & X86_CR0_WP)) 681 PGMCr0WpEnabled(pVCpu); 682 677 683 pVCpu->cpum.s.Guest.cr0 = cr0 | X86_CR0_ET; 678 684 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r45792 r45798 2207 2207 2208 2208 /** 2209 * Called by CPUM or REM when CR0.WP changes to 1. 2210 * 2211 * @param pVCpu The cross context virtual CPU structure of the caller. 2212 * @thread EMT 2213 */ 2214 VMM_INT_DECL(void) PGMCr0WpEnabled(PVMCPU pVCpu) 2215 { 2216 /* 2217 * Netware WP0+RO+US hack cleanup when WP0 -> WP1. 2218 * 2219 * Use the counter to judge whether there might be pool pages with active 2220 * hacks in them. If there are, we will be running the risk of messing up 2221 * the guest by allowing it to write to read-only pages. Thus, we have to 2222 * clear the page pool ASAP if there is the slightest chance. 2223 */ 2224 if (pVCpu->pgm.s.cNetwareWp0Hacks > 0) 2225 { 2226 Assert(pVCpu->CTX_SUFF(pVM)->cCpus == 1); 2227 2228 Log(("PGMCr0WpEnabled: %llu WP0 hacks active - clearing page pool\n", pVCpu->pgm.s.cNetwareWp0Hacks)); 2229 pVCpu->pgm.s.cNetwareWp0Hacks = 0; 2230 pVCpu->pgm.s.fSyncFlags |= PGM_SYNC_CLEAR_PGM_POOL; 2231 VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3); 2232 } 2233 } 2234 2235 2236 /** 2209 2237 * Gets the current guest paging mode. 2210 2238 * -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r45797 r45798 987 987 { 988 988 Assert((uErr & (X86_TRAP_PF_RW | X86_TRAP_PF_P)) == (X86_TRAP_PF_RW | X86_TRAP_PF_P)); 989 # ifdef PGM_WITH_NETWARE_WP0_HACK 989 990 /* 991 * The Netware WP0+RO+US hack. 992 * 993 * Netware sometimes(/always?) runs with WP0. It has been observed doing 994 * accessive write accesses to pages which are mapped with US=1 and RW=0 995 * while WP=0. This causes a lot of exits and extremely slow execution. 996 * To avoid trapping and emulating every write here, we change the shadow 997 * page table entry to map it as US=0 and RW=1 until user mode tries to 998 * access it again (see further below). We count these shadow page table 999 * changes so we can avoid having to clear the page pool every time the WP 1000 * bit changes to 1 (see PGMCr0WpEnabled()). 1001 */ 990 1002 if ( GstWalk.Core.fEffectiveUS 991 && !GstWalk.Core.fBigPage) 1003 && !GstWalk.Core.fBigPage 1004 && pVM->cCpus == 1 /* Sorry, no go on SMP. Add CFGM option? */) 992 1005 { 993 1006 /* Temorarily change the page to a RW super visor page. We'll trap … … 996 1009 Log(("PGM #PF: Netware WP0+RO+US hack: pvFault=%RGp uErr=%#x\n", pvFault, uErr)); 997 1010 rc = pgmShwMakePageSupervisorAndWritable(pVCpu, pvFault, PGM_MK_PG_IS_WRITE_FAULT); 998 PGM_INVL_PG(pVCpu, pvFault);999 1011 if (rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3) 1000 1012 { 1001 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2WPEmulation; }); /**< @todo New stat. */ 1013 PGM_INVL_PG(pVCpu, pvFault); 1014 pVCpu->pgm.s.cNetwareWp0Hacks++; 1015 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2Wp0RoUsHack; }); 1002 1016 return rc; 1003 1017 } 1018 AssertMsg(RT_FAILURE_NP(rc), ("%Rrc\n", rc)); 1004 1019 Log(("pgmShwMakePageSupervisorAndWritable(%RGv) failed with rc=%Rrc - ignored\n", pvFault, rc)); 1005 1020 } 1006 # endif 1021 1022 /* Interpret the access. */ 1007 1023 rc = VBOXSTRICTRC_TODO(PGMInterpretInstruction(pVM, pVCpu, pRegFrame, pvFault)); 1024 Log(("PGM #PF: WP0 emulation (pvFault=%RGp uErr=%#x)\n", pvFault, uErr)); 1008 1025 if (RT_SUCCESS(rc)) 1009 1026 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eWPEmulInRZ); … … 1060 1077 } 1061 1078 } 1062 # if defined(PGM_WITH_NETWARE_WP0_HACK) &&PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)1079 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 1063 1080 /* 1064 1081 * Check for Netware WP0+RO+US hack from above and undo it when user … … 1068 1085 && GstWalk.Core.fEffectiveUS 1069 1086 && GstWalk.Core.fBigPage 1087 && pVCpu->pgm.s.cNetwareWp0Hacks > 0 1070 1088 && (CPUMGetGuestCR0(pVCpu) & (X86_CR0_WP | X86_CR0_PG)) == X86_CR0_PG 1071 1089 && CPUMGetGuestCPL(pVCpu) == 3 1090 && pVM->cCpus == 1 1072 1091 ) 1073 1092 { … … 1077 1096 { 1078 1097 PGM_INVL_PG(pVCpu, pvFault); 1079 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2WPEmulation; }); /**< @todo New stat. */ 1098 pVCpu->pgm.s.cNetwareWp0Hacks--; 1099 STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2Wp0RoUsUnhack; }); 1080 1100 return VINF_SUCCESS; 1081 1101 } 1082 1102 } 1083 # endif 1103 # endif /* PGM_WITH_PAGING */ 1084 1104 1085 1105 /** @todo else: why are we here? */ -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r45103 r45798 461 461 if (RT_SUCCESS(rc)) 462 462 { 463 Assert( fGstPte & X86_PTE_RW);463 Assert((fGstPte & X86_PTE_RW) || !(CPUMGetGuestCR0(pVCpu) & X86_CR0_WP /* allow netware hack */)); 464 464 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 465 465 Assert(pPage); -
trunk/src/VBox/VMM/VMMR3/PGM.cpp
r45745 r45798 1892 1892 PGM_REG_PROFILE(&pCpuStats->StatRZTrap0eTime2SyncPT, "/PGM/CPU%u/RZ/Trap0e/Time2/SyncPT", "Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT."); 1893 1893 PGM_REG_PROFILE(&pCpuStats->StatRZTrap0eTime2WPEmulation, "/PGM/CPU%u/RZ/Trap0e/Time2/WPEmulation", "Profiling of the Trap0eHandler body when the cause is CR0.WP emulation."); 1894 PGM_REG_PROFILE(&pCpuStats->StatRZTrap0eTime2Wp0RoUsHack, "/PGM/CPU%u/RZ/Trap0e/Time2/WP0R0USHack", "Profiling of the Trap0eHandler body when the cause is CR0.WP and netware hack to be enabled."); 1895 PGM_REG_PROFILE(&pCpuStats->StatRZTrap0eTime2Wp0RoUsUnhack, "/PGM/CPU%u/RZ/Trap0e/Time2/WP0R0USUnhack", "Profiling of the Trap0eHandler body when the cause is CR0.WP and netware hack to be disabled."); 1894 1896 PGM_REG_COUNTER(&pCpuStats->StatRZTrap0eConflicts, "/PGM/CPU%u/RZ/Trap0e/Conflicts", "The number of times #PF was caused by an undetected conflict."); 1895 1897 PGM_REG_COUNTER(&pCpuStats->StatRZTrap0eHandlersMapping, "/PGM/CPU%u/RZ/Trap0e/Handlers/Mapping", "Number of traps due to access handlers in mappings."); -
trunk/src/VBox/VMM/include/PGMInternal.h
r45792 r45798 3433 3433 STAMPROFILE StatRZTrap0eTime2SyncPT; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. */ 3434 3434 STAMPROFILE StatRZTrap0eTime2WPEmulation; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is CR0.WP emulation. */ 3435 STAMPROFILE StatRZTrap0eTime2Wp0RoUsHack; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is CR0.WP and netware hack to be enabled. */ 3436 STAMPROFILE StatRZTrap0eTime2Wp0RoUsUnhack; /**< RC/R0: Profiling of the Trap0eHandler body when the cause is CR0.WP and netware hack to be disabled. */ 3435 3437 STAMCOUNTER StatRZTrap0eConflicts; /**< RC/R0: The number of times \#PF was caused by an undetected conflict. */ 3436 3438 STAMCOUNTER StatRZTrap0eHandlersMapping; /**< RC/R0: Number of traps due to access handlers in mappings. */ … … 3641 3643 * This is used to queue operations for PGMSyncCR3, PGMInvalidatePage, 3642 3644 * PGMFlushTLB, and PGMR3Load. */ 3643 RTUINTfSyncFlags;3645 uint32_t fSyncFlags; 3644 3646 3645 3647 /** The shadow paging mode. */ … … 3835 3837 * on the stack. */ 3836 3838 DISCPUSTATE DisState; 3839 3840 /** Counts the number of times the netware WP0+RO+US hack has been applied. */ 3841 uint64_t cNetwareWp0Hacks; 3837 3842 3838 3843 /** Count the number of pgm pool access handler calls. */
Note:
See TracChangeset
for help on using the changeset viewer.