Changeset 46893 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 1, 2013 8:38:16 PM (11 years ago)
- Location:
- trunk/src/VBox/VMM/testcase/Instructions
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/testcase/Instructions/InstructionTestGen.py
r46875 r46893 332 332 return 8; 333 333 334 def randGRegNoSp(self ):334 def randGRegNoSp(self, cbEffBytes = 4): 335 335 """ Returns a random general register number, excluding the SP register. """ 336 iReg = randU16(); 337 return iReg % (16 if self.is64Bit() else 8); 336 iReg = randU16() % self.getGRegCount(cbEffBytes); 337 while iReg == X86_GREG_xSP: 338 iReg = randU16() % self.getGRegCount(cbEffBytes); 339 return iReg; 340 341 def randGRegNoSpList(self, cItems, cbEffBytes = 4): 342 """ List of randGRegNoSp values. """ 343 aiRegs = []; 344 for i in range(cItems): 345 aiRegs.append(self.randGRegNoSp(cbEffBytes)); 346 return aiRegs; 338 347 339 348 def getAddrModes(self): … … 713 722 return True; 714 723 715 def generateStdTestGregMemSib(self, oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, auInputs ):724 def generateStdTestGregMemSib(self, oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, auInputs, oBaseRegRange, oIndexRegRange): 716 725 """ Generate all SIB variations for the given iOp1 (reg) value. """ 717 726 assert cAddrBits in [32, 64]; 718 for iBaseReg in range(oGen.oTarget.getGRegCount(cAddrBits / 8)):719 for iIndexReg in range(oGen.oTarget.getGRegCount(cAddrBits / 8)):720 if iBaseReg == 4 or iIndexReg == 4: # no RSP testing atm.727 for iBaseReg in oBaseRegRange: 728 for iIndexReg in oIndexRegRange: 729 if iBaseReg == X86_GREG_xSP: # no RSP testing atm. 721 730 continue; 731 722 732 for iMod in [0, 1, 2]: 723 733 if iBaseReg == iOp1 and ((iBaseReg != 5 and iBaseReg != 13) or iMod != 0) and cAddrBits != cbMaxOp: … … 725 735 if iIndexReg == iOp1 and iIndexReg != 4 and cAddrBits != cbMaxOp: 726 736 continue; # Don't know the high bit of the address ending up the result - skip it for now. 737 727 738 for iScale in (1, 2, 4, 8): 728 739 for uInput in auInputs: … … 745 756 iLongOp1 = oGen.oTarget.randGRegNoSp(); 746 757 iLongOp2 = oGen.oTarget.randGRegNoSp(); 747 oOp1MemRange = range(oGen.oTarget.getGRegCount());748 758 oOp2Range = None; 749 759 if oGen.oOptions.sTestSize == InstructionTestGen.ksTestSize_Tiny: 750 760 oOp2Range = [iLongOp2,]; 751 oOp1MemRange = [iLongOp1,];752 761 753 762 # Register tests … … 784 793 # Memory test. 785 794 if True: 786 for cbEffOp in self.acbOpVars: 787 if cbEffOp > cbMaxOp: 788 continue; 789 for iOp1 in oOp1MemRange: 790 if iOp1 == X86_GREG_xSP: 791 continue; # Cannot test xSP atm. 792 for cAddrBits in oGen.oTarget.getAddrModes(): 795 for cAddrBits in oGen.oTarget.getAddrModes(): 796 for cbEffOp in self.acbOpVars: 797 if cbEffOp > cbMaxOp: 798 continue; 799 800 oOp1MemRange = range(oGen.oTarget.getGRegCount()); 801 oOp2MemRange = range(oGen.oTarget.getGRegCount(cAddrBits / 8)) 802 oBaseRegRange = range(oGen.oTarget.getGRegCount(cAddrBits / 8)); 803 oIndexRegRange = range(oGen.oTarget.getGRegCount(cAddrBits / 8)); 804 if oGen.oOptions.sTestSize == InstructionTestGen.ksTestSize_Tiny: 805 oOp1MemRange = [iLongOp1,]; 806 oOp2MemRange = [iLongOp2,]; 807 oBaseRegRange = oGen.oTarget.randGRegNoSpList(2, cAddrBits / 8); 808 oIndexRegRange = oGen.oTarget.randGRegNoSpList(2, cAddrBits / 8); 809 elif oGen.oOptions.sTestSize == InstructionTestGen.ksTestSize_Medium: 810 oOp1MemRange = oGen.oTarget.randGRegNoSpList(3 if oGen.oTarget.is64Bit() else 1, cbEffOp); 811 oOp2MemRange = oGen.oTarget.randGRegNoSpList(3 + (cAddrBits == 64) * 2, cAddrBits / 8); 812 oBaseRegRange = oGen.oTarget.randGRegNoSpList(4 + (cAddrBits == 64) * 3, cAddrBits / 8); 813 oIndexRegRange = oGen.oTarget.randGRegNoSpList(4 + (cAddrBits == 64) * 3, cAddrBits / 8); 814 if iLongOp2 not in oOp1MemRange: 815 oOp1MemRange.append(iLongOp2); 816 if cAddrBits != 16 and 4 not in oOp2MemRange: 817 oOp2MemRange.append(4) 818 819 for iOp1 in oOp1MemRange: 820 if iOp1 == X86_GREG_xSP: 821 continue; # Cannot test xSP atm. 822 if iOp1 > 15: 823 continue; ## TODO AH,CH,DH,BH 793 824 auInputs = auLongInputs if iOp1 == iLongOp1 and False else auShortInputs; 794 for iOp2 in range(oGen.oTarget.getGRegCount(cAddrBits / 8)): 825 826 for iOp2 in oOp2MemRange: 795 827 if iOp2 != 4 or cAddrBits == 16: 796 828 for uInput in auInputs: … … 798 830 if iOp1 == iOp2 and iOp2 != 5 and iOp2 != 13 and cbEffOp != cbMaxOp: 799 831 continue; # Don't know the high bit of the address ending up the result - skip it for now. 800 uResult = self.fnCalcResult(cbEffOp, uInput, oGen.auRegValues[iOp1 ], oGen);832 uResult = self.fnCalcResult(cbEffOp, uInput, oGen.auRegValues[iOp1 & 15], oGen); 801 833 self.generateOneStdTestGregMemNoSib(oGen, cAddrBits, cbEffOp, cbMaxOp, 802 834 iOp1, iOp2, uInput, uResult); 803 835 else: 804 836 # SIB. 805 self.generateStdTestGregMemSib(oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, auInputs); 837 self.generateStdTestGregMemSib(oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, auInputs, 838 oBaseRegRange, oIndexRegRange); 806 839 break; 807 840 break; … … 1356 1389 ' push %s ; expected\n' 1357 1390 ' call VBINSTST_NAME(Common_BadValue)\n' 1358 ' pop %s\n'1359 ' pop %s\n'1360 ' pop %s\n'1361 1391 '.equal%u:\n' 1362 % ( sReg, i, i, sPushSize, iReg, sReg, sReg, sReg, sReg, sReg, sReg,i, ) );1392 % ( sReg, i, i, sPushSize, iReg, sReg, sReg, sReg, i, ) ); 1363 1393 1364 1394 -
trunk/src/VBox/VMM/testcase/Instructions/env-common.mac
r46875 r46893 108 108 ; the correct calling convention for the environment. 109 109 ; 110 ; This function will clean up the stack upon return (to save space in the caller). 111 ; 110 112 ; @param uExpected 111 113 ; @param uActual … … 151 153 mov xSP, [xSP + 38h] 152 154 MY_POP_ALL 153 ret 155 ret 3*sCB 154 156 %if ARCH_BITS == 64 155 157 .szFmt: db 'Bad register %#llx value %#018llx, expected %#018llx (line %llu)', 0
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