VirtualBox

Changeset 47999 in vbox


Ignore:
Timestamp:
Aug 22, 2013 4:03:03 PM (11 years ago)
Author:
vboxsync
Message:

VMM/HM: Better error reporting for unsupported VT-x feature combos.

Location:
trunk
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/hm_vmx.h

    r47760 r47999  
    9494AssertCompileSize(VMXRESTOREHOST, 56);
    9595
     96/** @name VMX HM-error codes for VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO.
     97 *  UFC = Unsupported Feature Combination.
     98 * @{
     99 */
     100/** Unsupported pin-based VM-execution controls combo. */
     101#define VMX_UFC_CTRL_PIN_EXEC                                   0
     102/** Unsupported processor-based VM-execution controls combo. */
     103#define VMX_UFC_CTRL_PROC_EXEC                                  1
     104/** Unsupported pin-based VM-execution controls combo. */
     105#define VMX_UFC_CTRL_PROC_MOV_DRX_EXIT                          2
     106/** Unsupported VM-entry controls combo. */
     107#define VMX_UFC_CTRL_ENTRY                                      3
     108/** Unsupported VM-exit controls combo. */
     109#define VMX_UFC_CTRL_EXIT                                       4
     110/** MSR storage capacity of the VMCS autoload/store area is not sufficient
     111 *  for storing host MSRs. */
     112#define VMX_UFC_INSUFFICIENT_HOST_MSR_STORAGE                   5
     113/** MSR storage capacity of the VMCS autoload/store area is not sufficient
     114 *  for storing guest MSRs. */
     115#define VMX_UFC_INSUFFICIENT_GUEST_MSR_STORAGE                  6
     116/** @} */
     117
    96118/** @name VMX HM-error codes for VERR_VMX_INVALID_GUEST_STATE.
     119 *  IGS = Invalid Guest State.
    97120 * @{
    98121 */

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r47997 r47999  
    17231723        LogRel(("hmR0VmxSetupPinCtls: invalid pin-based VM-execution controls combo! cpu=%#RX64 val=%#RX64 zap=%#RX64\n",
    17241724                pVM->hm.s.vmx.msr.vmx_pin_ctls.n.disallowed0, val, zap));
     1725        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PIN_EXEC;
    17251726        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    17261727    }
    … …  
    17641765    {
    17651766        LogRel(("hmR0VmxSetupProcCtls: unsupported VMX_VMCS_CTRL_PROC_EXEC_MOV_DR_EXIT combo!"));
     1767        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_MOV_DRX_EXIT;
    17661768        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    17671769    }
    … …  
    18291831        LogRel(("hmR0VmxSetupProcCtls: invalid processor-based VM-execution controls combo! cpu=%#RX64 val=%#RX64 zap=%#RX64\n",
    18301832                pVM->hm.s.vmx.msr.vmx_proc_ctls.n.disallowed0, val, zap));
     1833        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_EXEC;
    18311834        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    18321835    }
    … …  
    25522555    {
    25532556        LogRel(("cHostMsrs=%u Cpu=%u\n", cHostMsrs, (unsigned)MSR_IA32_VMX_MISC_MAX_MSR(pVM->hm.s.vmx.msr.vmx_misc)));
     2557        pVCpu->hm.s.u32HMError = VMX_UFC_INSUFFICIENT_HOST_MSR_STORAGE;
    25542558        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    25552559    }
    … …  
    26382642            LogRel(("hmR0VmxLoadGuestEntryCtls: invalid VM-entry controls combo! cpu=%RX64 val=%RX64 zap=%RX64\n",
    26392643                    pVM->hm.s.vmx.msr.vmx_entry.n.disallowed0, val, zap));
     2644            pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_ENTRY;
    26402645            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    26412646        }
    … …  
    27082713            LogRel(("hmR0VmxSetupProcCtls: invalid VM-exit controls combo! cpu=%RX64 val=%RX64 zap=%RX64\n",
    27092714                    pVM->hm.s.vmx.msr.vmx_exit.n.disallowed0, val, zap));
     2715            pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_EXIT;
    27102716            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    27112717        }
    … …  
    39543960        {
    39553961            LogRel(("CPU autoload/store MSR count in VMCS exceeded cGuestMsrs=%u.\n", cGuestMsrs));
     3962            pVCpu->hm.s.u32HMError = VMX_UFC_INSUFFICIENT_GUEST_MSR_STORAGE;
    39563963            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    39573964        }

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r47958 r47999  
    12311231        LogRel(("HM: VMX setup failed with rc=%Rrc!\n", rc));
    12321232        for (VMCPUID i = 0; i < pVM->cCpus; i++)
    1233             LogRel(("HM: CPU[%RU32] Last instruction error %#x\n", i, pVM->aCpus[i].hm.s.vmx.LastError.u32InstrError));
     1233        {
     1234            PVMCPU pVCpu = &pVM->aCpus[i];
     1235            LogRel(("HM: CPU[%u] Last instruction error %#x\n", i, pVCpu->hm.s.vmx.LastError.u32InstrError));
     1236            LogRel(("HM: CPU[%u] HM error               %#x (%u)\n", i, pVCpu->hm.s.u32HMError, pVCpu->hm.s.u32HMError));
     1237        }
    12341238        return VMSetError(pVM, rc, RT_SRC_POS, "VT-x setup failed: %Rrc", rc);
    12351239    }
    … …  
    28772881    for (VMCPUID i = 0; i < pVM->cCpus; i++)
    28782882    {
     2883        PVMCPU pVCpu = &pVM->aCpus[i];
    28792884        switch (iStatusCode)
    28802885        {
    … …  
    28842889            case VERR_VMX_INVALID_VMCS_PTR:
    28852890                LogRel(("HM: VERR_VMX_INVALID_VMCS_PTR:\n"));
    2886                 LogRel(("HM: CPU[%u] Current pointer      %#RGp vs %#RGp\n", i, pVM->aCpus[i].hm.s.vmx.LastError.u64VMCSPhys,
    2887                                                                                 pVM->aCpus[i].hm.s.vmx.HCPhysVmcs));
    2888                 LogRel(("HM: CPU[%u] Current VMCS version %#x\n", i, pVM->aCpus[i].hm.s.vmx.LastError.u32VMCSRevision));
    2889                 LogRel(("HM: CPU[%u] Entered Cpu          %u\n",  i, pVM->aCpus[i].hm.s.vmx.LastError.idEnteredCpu));
    2890                 LogRel(("HM: CPU[%u] Current Cpu          %u\n",  i, pVM->aCpus[i].hm.s.vmx.LastError.idCurrentCpu));
     2891                LogRel(("HM: CPU[%u] Current pointer      %#RGp vs %#RGp\n", i, pVCpu->hm.s.vmx.LastError.u64VMCSPhys,
     2892                                                                                pVCpu->hm.s.vmx.HCPhysVmcs));
     2893                LogRel(("HM: CPU[%u] Current VMCS version %#x\n", i, pVCpu->hm.s.vmx.LastError.u32VMCSRevision));
     2894                LogRel(("HM: CPU[%u] Entered Cpu          %u\n",  i, pVCpu->hm.s.vmx.LastError.idEnteredCpu));
     2895                LogRel(("HM: CPU[%u] Current Cpu          %u\n",  i, pVCpu->hm.s.vmx.LastError.idCurrentCpu));
    28912896                break;
    28922897
    28932898            case VERR_VMX_UNABLE_TO_START_VM:
    28942899                LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM:\n"));
    2895                 LogRel(("HM: CPU[%u] Instruction error    %#x\n", i, pVM->aCpus[i].hm.s.vmx.LastError.u32InstrError));
    2896                 LogRel(("HM: CPU[%u] Exit reason          %#x\n", i, pVM->aCpus[i].hm.s.vmx.LastError.u32ExitReason));
     2900                LogRel(("HM: CPU[%u] Instruction error    %#x\n", i, pVCpu->hm.s.vmx.LastError.u32InstrError));
     2901                LogRel(("HM: CPU[%u] Exit reason          %#x\n", i, pVCpu->hm.s.vmx.LastError.u32ExitReason));
    28972902
    28982903                if (   pVM->aCpus[i].hm.s.vmx.LastError.u32InstrError == VMX_ERROR_VMLAUCH_NON_CLEAR_VMCS
    28992904                    || pVM->aCpus[i].hm.s.vmx.LastError.u32InstrError == VMX_ERROR_VMRESUME_NON_LAUNCHED_VMCS)
    29002905                {
    2901                     LogRel(("HM: CPU[%u] Entered Cpu          %u\n",  i, pVM->aCpus[i].hm.s.vmx.LastError.idEnteredCpu));
    2902                     LogRel(("HM: CPU[%u] Current Cpu          %u\n",  i, pVM->aCpus[i].hm.s.vmx.LastError.idCurrentCpu));
     2906                    LogRel(("HM: CPU[%u] Entered Cpu          %u\n",  i, pVCpu->hm.s.vmx.LastError.idEnteredCpu));
     2907                    LogRel(("HM: CPU[%u] Current Cpu          %u\n",  i, pVCpu->hm.s.vmx.LastError.idCurrentCpu));
    29032908                }
    29042909                else if (pVM->aCpus[i].hm.s.vmx.LastError.u32InstrError == VMX_ERROR_VMENTRY_INVALID_CONTROL_FIELDS)
    29052910                {
    2906                     LogRel(("HM: CPU[%u] PinCtls          %#RX32\n", i, pVM->aCpus[i].hm.s.vmx.u32PinCtls));
    2907                     LogRel(("HM: CPU[%u] ProcCtls         %#RX32\n", i, pVM->aCpus[i].hm.s.vmx.u32ProcCtls));
    2908                     LogRel(("HM: CPU[%u] ProcCtls2        %#RX32\n", i, pVM->aCpus[i].hm.s.vmx.u32ProcCtls2));
    2909                     LogRel(("HM: CPU[%u] EntryCtls        %#RX32\n", i, pVM->aCpus[i].hm.s.vmx.u32EntryCtls));
    2910                     LogRel(("HM: CPU[%u] ExitCtls         %#RX32\n", i, pVM->aCpus[i].hm.s.vmx.u32ExitCtls));
    2911                     LogRel(("HM: CPU[%u] MSRBitmapPhys    %#RHp\n",  i, pVM->aCpus[i].hm.s.vmx.HCPhysMsrBitmap));
     2911                    LogRel(("HM: CPU[%u] PinCtls          %#RX32\n", i, pVCpu->hm.s.vmx.u32PinCtls));
     2912                    LogRel(("HM: CPU[%u] ProcCtls         %#RX32\n", i, pVCpu->hm.s.vmx.u32ProcCtls));
     2913                    LogRel(("HM: CPU[%u] ProcCtls2        %#RX32\n", i, pVCpu->hm.s.vmx.u32ProcCtls2));
     2914                    LogRel(("HM: CPU[%u] EntryCtls        %#RX32\n", i, pVCpu->hm.s.vmx.u32EntryCtls));
     2915                    LogRel(("HM: CPU[%u] ExitCtls         %#RX32\n", i, pVCpu->hm.s.vmx.u32ExitCtls));
     2916                    LogRel(("HM: CPU[%u] MSRBitmapPhys    %#RHp\n",  i, pVCpu->hm.s.vmx.HCPhysMsrBitmap));
    29122917#ifdef VBOX_WITH_AUTO_MSR_LOAD_RESTORE
    2913                     LogRel(("HM: CPU[%u] GuestMSRPhys     %#RHp\n",  i, pVM->aCpus[i].hm.s.vmx.HCPhysGuestMsr));
    2914                     LogRel(("HM: CPU[%u] HostMsrPhys      %#RHp\n",  i, pVM->aCpus[i].hm.s.vmx.HCPhysHostMsr));
    2915                     LogRel(("HM: CPU[%u] cGuestMSRs       %u\n",     i, pVM->aCpus[i].hm.s.vmx.cGuestMsrs));
     2918                    LogRel(("HM: CPU[%u] GuestMSRPhys     %#RHp\n",  i, pVCpu->hm.s.vmx.HCPhysGuestMsr));
     2919                    LogRel(("HM: CPU[%u] HostMsrPhys      %#RHp\n",  i, pVCpu->hm.s.vmx.HCPhysHostMsr));
     2920                    LogRel(("HM: CPU[%u] cGuestMSRs       %u\n",     i, pVCpu->hm.s.vmx.cGuestMsrs));
    29162921#endif
    29172922                }
    … …  
    29242929                break;
    29252930
     2931            case VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO:
    29262932            case VERR_VMX_INVALID_GUEST_STATE:
    29272933            case VERR_VMX_UNEXPECTED_EXIT_CODE:
    … …  
    29312937            case VERR_SVM_UNEXPECTED_XCPT_EXIT:
    29322938            {
    2933                 LogRel(("HM: CPU[%u] HM error         %#x (%u)\n", i, pVM->aCpus[i].hm.s.u32HMError, pVM->aCpus[i].hm.s.u32HMError));
     2939                LogRel(("HM: CPU[%u] HM error         %#x (%u)\n", i, pVCpu->hm.s.u32HMError, pVCpu->hm.s.u32HMError));
    29342940                break;
    29352941            }
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