Changeset 49972 in vbox for trunk/src/VBox/VMM/tools

Timestamp:

Dec 18, 2013 1:10:58 PM (11 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

91398

Message:

CPUM: More msr hacking.

File:

• trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (modified) (15 diffs)

trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp

@@ -2775 +2775 @@
 
 
+/**
+ * Generic report for an MSR implemented by functions, extended version.
+ *
+ * @returns VBox status code.
+ * @param   uMsr            The MSR.
+ * @param   pszRdWrFnName   The read/write function name, optional.
+ * @param   uValue          The MSR range value.
+ * @param   fSkipMask       Mask of bits to skip.
+ * @param   fNoGpMask       Mask of bits to remove from the GP mask after
+ *                          probing
+ * @param   pszAnnotate     Annotation.
+ */
 static int reportMsr_GenFunctionEx(uint32_t uMsr, const char *pszRdWrFnName, uint32_t uValue,
-                                   uint64_t fSkipMask, const char *pszAnnotate)
+                                   uint64_t fSkipMask, uint64_t fNoGpMask, const char *pszAnnotate)
 {
     /* Resolve default function name. */
@@ -2792 +2804 @@
     if (RT_SUCCESS(rc))
     {
+        fGpMask &= ~fNoGpMask;
+
         if (fGpMask == UINT64_MAX && uValue == 0 && !msrProberModifyZero(uMsr))
             rc = printMsrFunctionReadOnly(uMsr, pszRdWrFnName, pszAnnotate);
@@ -2822 +2836 @@
     if (vbCpuRepSupportsX2Apic())
         fSkipMask |= RT_BIT_64(10);
-    return reportMsr_GenFunctionEx(uMsr, "Ia32ApicBase", uValue, fSkipMask, NULL);
+    return reportMsr_GenFunctionEx(uMsr, "Ia32ApicBase", uValue, fSkipMask, 0, NULL);
 }
 
@@ -3144 +3158 @@
     }
 
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, NULL);
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, MSR_K6_EFER_LMA, NULL);
 }
 
@@ -3322 +3336 @@
                   |  RT_BIT(0)   /* SysAckLimit */;
 
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3354 +3368 @@
     fSkipMask |= RT_BIT(0);      /* SMMLOCK */
 
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3370 +3384 @@
     uint64_t fSkipMask = RT_BIT(4) | RT_BIT(3);
     fSkipMask |= (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & X86_PAGE_4K_BASE_MASK;
-    return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010016) / 2, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010016) / 2, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3386 +3400 @@
     uint64_t fSkipMask = RT_BIT(11);
     fSkipMask |= (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & X86_PAGE_4K_BASE_MASK;
-    return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010017) / 2, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, (uMsr - 0xc0010017) / 2, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3401 +3415 @@
     /* Skip know bits here, as harm seems to come from messing with them. */
     uint64_t fSkipMask = (RT_BIT_64(vbCpuRepGetPhysAddrWidth()) - 1) & ~(RT_BIT_64(23) - 1);
-    return reportMsr_GenFunctionEx(uMsr, NULL, uMsr == 0xc001001d, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uMsr == 0xc001001d, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3486 +3500 @@
     fSkipMask |= UINT32_C(0x0000003f);              /* CpuFid */
 
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3556 +3570 @@
         fSkipMask |= RT_BIT_64(28); /* Unknown killer bit, possibly applicable to other microarchs. */
     }
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3577 +3591 @@
                        | RT_BIT_64(10) /* DcacheAggressivePriority */;
     fSkipMask |= RT_BIT_64(46) | RT_BIT_64(45); /* Killer field. Seen bit 46 set, 45 clear. Messing with either means reboot/BSOD. */
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3593 +3607 @@
     uint64_t fSkipMask = RT_BIT_64(54) /* LateSbzResync  */;
     fSkipMask |= RT_BIT_64(35); /* Undocumented killer bit. */
-    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, annotateValue(uValue));
+    return reportMsr_GenFunctionEx(uMsr, NULL, uValue, fSkipMask, 0, annotateValue(uValue));
 }
 
@@ -3683 +3697 @@
             rc = reportMsr_GenX2Apic(&paMsrs[i], cMsrs - i, &i);
         else if (uMsr == 0x00002000 && g_enmVendor == CPUMCPUVENDOR_INTEL)
-            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 0, X86_CR0_PE | X86_CR0_PG,
+            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 0, X86_CR0_PE | X86_CR0_PG, 0,
                                          annotateIfMissingBits(uValue, X86_CR0_PE | X86_CR0_PE | X86_CR0_ET));
         else if (uMsr == 0x00002002 && g_enmVendor == CPUMCPUVENDOR_INTEL)
-            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 2, 0, annotateValue(uValue));
+            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 2, 0, 0, annotateValue(uValue));
         else if (uMsr == 0x00002003 && g_enmVendor == CPUMCPUVENDOR_INTEL)
         {
@@ -3692 +3706 @@
             if (!vbCpuRepSupportsPae())
                 fCr3Mask &= X86_CR3_PAGE_MASK | X86_CR3_AMD64_PAGE_MASK;
-            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 3, fCr3Mask, annotateValue(uValue));
+            rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 3, fCr3Mask, 0, annotateValue(uValue));
         }
         else if (uMsr == 0x00002004 && g_enmVendor == CPUMCPUVENDOR_INTEL)
             rc = reportMsr_GenFunctionEx(uMsr, "IntelP6CrN", 4,
-                                         X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE | X86_CR4_SMXE,
+                                         X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE | X86_CR4_SMXE, 0,
                                          annotateValue(uValue));
         else if (uMsr == 0xc0000080)
             rc = reportMsr_Amd64Efer(uMsr, uValue);
         else if (uMsr == 0xc0000082 || uMsr == 0xc0000083 || uMsr == 0xc0000100 || uMsr == 0xc0000101 || uMsr == 0xc0000102)
-            rc = reportMsr_GenFunctionEx(uMsr, NULL, 0, UINT64_C(0xffff800000000000), annotateValue(uValue)); /* Canoncial address hack. */
+            rc = reportMsr_GenFunctionEx(uMsr, NULL, 0, UINT64_C(0xffff800000000000), 0, annotateValue(uValue)); /* Canoncial address hack. */
         else if (uMsr >= 0xc0000408 && uMsr <= 0xc000040f)
             rc = reportMsr_AmdFam10hMc4MiscN(&paMsrs[i], cMsrs - i, &i);