Changeset 50270 in vbox for trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

Timestamp:

Jan 29, 2014 2:20:00 PM (11 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Fix single-stepping with IRET on real-on-v86 mode while not breaking single-stepping of emulated instructions.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -7078 +7078 @@
     }
 
-    /* Delivery pending debug exception if the guest is single-stepping. Evaluate and set the BS bit. */
-    if (   !pVCpu->hm.s.fSingleInstruction
-        && !DBGFIsStepping(pVCpu))
-    {
-        int rc2 = hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
-        AssertRCReturn(rc2, rc2);
-        if (pMixedCtx->eflags.Bits.u1TF)    /* We don't have any IA32_DEBUGCTL MSR for guests. Treat as all bits 0. */
+    /* Deliver pending debug exception if the guest is single-stepping. Evaluate and set the BS bit. */
+    if (   fBlockSti
+        || fBlockMovSS)
+    {
+        if (   !pVCpu->hm.s.fSingleInstruction
+            && !DBGFIsStepping(pVCpu))
+        {
+            int rc2 = hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
+            AssertRCReturn(rc2, rc2);
+            if (pMixedCtx->eflags.Bits.u1TF)    /* We don't have any IA32_DEBUGCTL MSR for guests. Treat as all bits 0. */
+            {
+                /*
+                 * The pending-debug exceptions field is cleared on all VM-exits except VMX_EXIT_TPR_BELOW_THRESHOLD,
+                 * VMX_EXIT_MTF, VMX_EXIT_APIC_WRITE and VMX_EXIT_VIRTUALIZED_EOI.
+                 * See Intel spec. 27.3.4 "Saving Non-Register State".
+                 */
+                rc2 = VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
+                AssertRCReturn(rc2, rc2);
+            }
+        }
+        else if (pMixedCtx->eflags.Bits.u1TF)
         {
             /*
-             * The pending-debug exceptions field is cleared on all VM-exits except VMX_EXIT_TPR_BELOW_THRESHOLD,
-             * VMX_EXIT_MTF, VMX_EXIT_APIC_WRITE and VMX_EXIT_VIRTUALIZED_EOI.
-             * See Intel spec. 27.3.4 "Saving Non-Register State".
+             * We are single-stepping in the hypervisor debugger using EFLAGS.TF. Clear interrupt inhibition as setting the
+             * BS bit would mean delivering a #DB to the guest upon VM-entry when it shouldn't be.
              */
-            rc2 = VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
-            AssertRCReturn(rc2, rc2);
-        }
-    }
-    else
-    {
-        /* We are single-stepping in the hypervisor debugger, clear interrupt inhibition as setting the BS bit would mean
-           delivering a #DB to the guest upon VM-entry when it shouldn't be. */
-        uIntrState = 0;
+            Assert(!(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.Msrs.VmxProcCtls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_MONITOR_TRAP_FLAG));
+            uIntrState = 0;
+        }
     }
 
@@ -8600 +8607 @@
     int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     rc    |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx);
+    rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     AssertRCReturn(rc, rc);
 
     pMixedCtx->rip += pVmxTransient->cbInstr;
     HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_RIP);
+
+    /* Deliver pending debug exception if the guest is single-stepping. */
+    if (pMixedCtx->eflags.Bits.u1TF)
+    {
+        rc = VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
+        AssertRCReturn(rc, rc);
+    }
+
     return rc;
 }