Changeset 50617 in vbox for trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp

Timestamp:

Feb 26, 2014 7:34:46 PM (11 years ago)

Author:

vboxsync

Message:

Implemented MSR 0x00000035 on i7, it reports threads and core counts on intel.

File:

• trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp

@@ -1516 +1516 @@
 {
     /** @todo Write EBL_CR_POWERON: Remember written bits. */
+    return VINF_SUCCESS;
+}
+
+
+/** @callback_method_impl{FNCPUMRDMSR} */
+static DECLCALLBACK(int) cpumMsrRd_IntelI7CoreThreadCount(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
+{
+    /* Note! According to cpuid_set_info in XNU (10.7.0), Westmere CPU only
+             have a 4-bit core count. */
+    uint16_t cCores   = pVCpu->CTX_SUFF(pVM)->cCpus;
+    uint16_t cThreads = cCores; /** @todo hyper-threading. */
+    *puValue = RT_MAKE_U32(cThreads, cCores);
     return VINF_SUCCESS;
 }
@@ -4457 +4469 @@
 
     cpumMsrRd_IntelEblCrPowerOn,
+    cpumMsrRd_IntelI7CoreThreadCount,
     cpumMsrRd_IntelP4EbcHardPowerOn,
     cpumMsrRd_IntelP4EbcSoftPowerOn,
@@ -5146 +5159 @@
 
     CPUM_ASSERT_RD_MSR_FN(IntelEblCrPowerOn);
+    CPUM_ASSERT_RD_MSR_FN(IntelI7CoreThreadCount);
     CPUM_ASSERT_RD_MSR_FN(IntelP4EbcHardPowerOn);
     CPUM_ASSERT_RD_MSR_FN(IntelP4EbcSoftPowerOn);