- Timestamp:
- Oct 9, 2014 9:13:24 AM (10 years ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore.cpp
r49480 r53007 813 813 subtype = (pDis->uAddrMode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d; 814 814 else 815 if (subtype == OP_PARM_v || subtype == OP_PARM_NONE )815 if (subtype == OP_PARM_v || subtype == OP_PARM_NONE || subtype == OP_PARM_y) 816 816 { 817 817 switch (pDis->uOpMode) … … 824 824 break; 825 825 case DISCPUMODE_16BIT: 826 subtype = OP_PARM_w; 826 if (subtype != OP_PARM_y) 827 subtype = OP_PARM_w; 827 828 break; 828 829 default: … … 1915 1916 /* Cancel prefix changes. */ 1916 1917 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 1917 pDis->uOpMode = pDis->uCpuMode; 1918 1919 if (pDis->uCpuMode == DISCPUMODE_64BIT) 1920 { 1921 pDis->uOpMode = (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_W ? DISCPUMODE_64BIT : DISCPUMODE_32BIT); 1922 } 1923 else 1924 pDis->uOpMode = pDis->uCpuMode; 1918 1925 } 1919 1926 break; … … 1981 1988 /* Cancel prefix changes. */ 1982 1989 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 1983 pDis->uOpMode = pDis->uCpuMode; 1990 if (pDis->uCpuMode == DISCPUMODE_64BIT) 1991 { 1992 pDis->uOpMode = (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_W ? DISCPUMODE_64BIT : DISCPUMODE_32BIT); 1993 } 1994 else 1995 pDis->uOpMode = pDis->uCpuMode; 1996 1984 1997 } 1985 1998 } … … 2001 2014 } 2002 2015 break; 2016 2017 case OP_REPE: /* 0xF3 */ 2018 if (g_apThreeByteMapX86_F30F38[pDis->bOpCode >> 4]) 2019 { 2020 pOpcode = g_apThreeByteMapX86_F30F38[pDis->bOpCode >> 4]; 2021 pOpcode = &pOpcode[pDis->bOpCode & 0xf]; 2022 2023 if (pOpcode->uOpcode != OP_INVALID) 2024 { 2025 /* Table entry is valid, so use the extension table. */ 2026 2027 /* Cancel prefix changes. */ 2028 pDis->fPrefix &= ~DISPREFIX_REP; 2029 } 2030 } 2003 2031 } 2004 2032 … … 2031 2059 /* Cancel prefix changes. */ 2032 2060 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 2033 pDis->uOpMode = pDis->uCpuMode; 2061 if (pDis->uCpuMode == DISCPUMODE_64BIT) 2062 { 2063 pDis->uOpMode = (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_W ? DISCPUMODE_64BIT : DISCPUMODE_32BIT); 2064 } 2065 else 2066 pDis->uOpMode = pDis->uCpuMode; 2067 2034 2068 } 2035 2069 } -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r48948 r53007 603 603 { \ 604 604 case OP_PARM_v: \ 605 case OP_PARM_y: \ 605 606 switch (pDis->uOpMode) \ 606 607 { \ … … 617 618 case OP_PARM_dq: \ 618 619 if (OP_PARM_VTYPE(pParam->fParam) != OP_PARM_W) /* these are 128 bit, pray they are all unambiguous.. */ \ 619 PUT_SZ(" qword "); \620 PUT_SZ("dqword "); \ 620 621 break; \ 621 622 case OP_PARM_p: break; /* see PUT_FAR */ \ -
trunk/src/VBox/Disassembler/DisasmInternal.h
r41796 r53007 30 30 /** @name Index into g_apfnCalcSize and g_apfnFullDisasm. 31 31 * @{ */ 32 #define IDX_ParseNop 0 33 #define IDX_ParseModRM 1 34 #define IDX_UseModRM 2 35 #define IDX_ParseImmByte 3 36 #define IDX_ParseImmBRel 4 37 #define IDX_ParseImmUshort 5 38 #define IDX_ParseImmV 6 39 #define IDX_ParseImmVRel 7 40 #define IDX_ParseImmAddr 8 41 #define IDX_ParseFixedReg 9 42 #define IDX_ParseImmUlong 10 43 #define IDX_ParseImmQword 11 44 #define IDX_ParseTwoByteEsc 12 45 #define IDX_ParseImmGrpl 13 46 #define IDX_ParseShiftGrp2 14 47 #define IDX_ParseGrp3 15 48 #define IDX_ParseGrp4 16 49 #define IDX_ParseGrp5 17 50 #define IDX_Parse3DNow 18 51 #define IDX_ParseGrp6 19 52 #define IDX_ParseGrp7 20 53 #define IDX_ParseGrp8 21 54 #define IDX_ParseGrp9 22 55 #define IDX_ParseGrp10 23 56 #define IDX_ParseGrp12 24 57 #define IDX_ParseGrp13 25 58 #define IDX_ParseGrp14 26 59 #define IDX_ParseGrp15 27 60 #define IDX_ParseGrp16 28 61 #define IDX_ParseModFence 29 62 #define IDX_ParseYv 30 63 #define IDX_ParseYb 31 64 #define IDX_ParseXv 32 65 #define IDX_ParseXb 33 66 #define IDX_ParseEscFP 34 67 #define IDX_ParseNopPause 35 68 #define IDX_ParseImmByteSX 36 69 #define IDX_ParseImmZ 37 70 #define IDX_ParseThreeByteEsc4 38 71 #define IDX_ParseThreeByteEsc5 39 72 #define IDX_ParseImmAddrF 40 73 #define IDX_ParseInvOpModRM 41 74 #define IDX_ParseMax (IDX_ParseInvOpModRM+1) 32 enum IDX_Parse 33 { 34 IDX_ParseNop = 0, 35 IDX_ParseModRM, 36 IDX_UseModRM, 37 IDX_ParseImmByte, 38 IDX_ParseImmBRel, 39 IDX_ParseImmUshort, 40 IDX_ParseImmV, 41 IDX_ParseImmVRel, 42 IDX_ParseImmAddr, 43 IDX_ParseFixedReg, 44 IDX_ParseImmUlong, 45 IDX_ParseImmQword, 46 IDX_ParseTwoByteEsc, 47 IDX_ParseImmGrpl, 48 IDX_ParseShiftGrp2, 49 IDX_ParseGrp3, 50 IDX_ParseGrp4, 51 IDX_ParseGrp5, 52 IDX_Parse3DNow, 53 IDX_ParseGrp6, 54 IDX_ParseGrp7, 55 IDX_ParseGrp8, 56 IDX_ParseGrp9, 57 IDX_ParseGrp10, 58 IDX_ParseGrp12, 59 IDX_ParseGrp13, 60 IDX_ParseGrp14, 61 IDX_ParseGrp15, 62 IDX_ParseGrp16, 63 IDX_ParseModFence, 64 IDX_ParseYv, 65 IDX_ParseYb, 66 IDX_ParseXv, 67 IDX_ParseXb, 68 IDX_ParseEscFP, 69 IDX_ParseNopPause, 70 IDX_ParseImmByteSX, 71 IDX_ParseImmZ, 72 IDX_ParseThreeByteEsc4, 73 IDX_ParseThreeByteEsc5, 74 IDX_ParseImmAddrF, 75 IDX_ParseInvOpModRM, 76 IDX_ParseMax 77 }; 75 78 /** @} */ 76 79 … … 101 104 /** Three byte opcode map with prefix 0xF2 (0xF 0x38) */ 102 105 extern PCDISOPCODE const g_apThreeByteMapX86_F20F38[16]; 106 107 /** Three byte opcode map with prefix 0xF3 (0xF 0x38) */ 108 extern PCDISOPCODE const g_apThreeByteMapX86_F30F38[16]; 103 109 104 110 /** Three byte opcode map with prefix 0x66 (0xF 0x3A) */ -
trunk/src/VBox/Disassembler/DisasmTables.cpp
r47453 r53007 529 529 OP("pcmpeqd %Pq,%Qq", IDX_ParseModRM, IDX_UseModRM, 0, OP_PCMPEQD, OP_PARM_Pq, OP_PARM_Qq, OP_PARM_NONE, DISOPTYPE_HARMLESS), 530 530 OP("emms", 0, 0, 0, OP_EMMS, OP_PARM_NONE, OP_PARM_NONE, OP_PARM_NONE, DISOPTYPE_HARMLESS), 531 OP(" MMX UD 0x78", 0, 0, 0, OP_MMX_UD78,OP_PARM_NONE, OP_PARM_NONE, OP_PARM_NONE, DISOPTYPE_HARMLESS), /** @todo 0x0f 0x78 VMREAD */532 OP(" MMX UD 0x79", 0, 0, 0, OP_MMX_UD79,OP_PARM_NONE, OP_PARM_NONE, OP_PARM_NONE, DISOPTYPE_HARMLESS), /** @todo 0x0f 0x79 VMWRITE */531 OP("vmread %Ey,%Gy", IDX_ParseModRM, IDX_UseModRM, 0, OP_VMREAD, OP_PARM_Ey, OP_PARM_Gy, OP_PARM_NONE, DISOPTYPE_HARMLESS|DISOPTYPE_FORCED_64_OP_SIZE), 532 OP("vmwrite %Gy,%Ey", IDX_ParseModRM, IDX_UseModRM, 0, OP_VMWRITE, OP_PARM_Gy, OP_PARM_Ey, OP_PARM_NONE, DISOPTYPE_HARMLESS|DISOPTYPE_FORCED_64_OP_SIZE), 533 533 OP("MMX UD 0x7A", 0, 0, 0, OP_MMX_UD7A,OP_PARM_NONE, OP_PARM_NONE, OP_PARM_NONE, DISOPTYPE_HARMLESS), 534 534 OP("MMX UD 0x7B", 0, 0, 0, OP_MMX_UD7B,OP_PARM_NONE, OP_PARM_NONE, OP_PARM_NONE, DISOPTYPE_HARMLESS), … … 792 792 OP("pcmpeqd %Vdq,%Wdq", IDX_ParseModRM, IDX_UseModRM, 0, OP_PCMPEQD, OP_PARM_Vdq, OP_PARM_Vdq, OP_PARM_NONE, DISOPTYPE_HARMLESS), 793 793 INVALID_OPCODE, 794 OP("vmread %Ed,%Gd", IDX_ParseModRM, IDX_UseModRM, 0, OP_VMREAD, OP_PARM_Ed, OP_PARM_Gd, OP_PARM_NONE, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED),795 OP("vmwrite %Gd,%Ed", IDX_ParseModRM, IDX_UseModRM, 0, OP_VMWRITE, OP_PARM_Gd, OP_PARM_Ed, OP_PARM_NONE, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED),794 INVALID_OPCODE, 795 INVALID_OPCODE, 796 796 INVALID_OPCODE, 797 797 INVALID_OPCODE, … … 1172 1172 1173 1173 /* b */ 1174 INVALID_OPCODE_BLOCK 1174 INVALID_OPCODE, 1175 INVALID_OPCODE, 1176 INVALID_OPCODE, 1177 INVALID_OPCODE, 1178 INVALID_OPCODE, 1179 INVALID_OPCODE, 1180 INVALID_OPCODE, 1181 INVALID_OPCODE, 1182 OP("popcnt %Gv,%Ev", IDX_ParseModRM, IDX_UseModRM, 0, OP_POPCNT, OP_PARM_Gv, OP_PARM_Ev, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1183 INVALID_OPCODE, 1184 INVALID_OPCODE, 1185 INVALID_OPCODE, 1186 OP("tzcnt %Gv,%Ev", IDX_ParseModRM, IDX_UseModRM, 0, OP_TZCNT, OP_PARM_Gv, OP_PARM_Ev, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1187 OP("lzcnt %Gv,%Ev", IDX_ParseModRM, IDX_UseModRM, 0, OP_LZCNT, OP_PARM_Gv, OP_PARM_Ev, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1188 INVALID_OPCODE, 1189 INVALID_OPCODE, 1175 1190 1176 1191 /* c */ … … 1276 1291 }; 1277 1292 1293 /** Three byte opcode map (0x0F 0x38 0xFx) */ 1294 const DISOPCODE g_aThreeByteMapX86_0F38_F[16] = 1295 { 1296 /* F */ 1297 OP("movbe %Gy,%My", IDX_ParseModRM, IDX_UseModRM, 0, OP_MOVBEGM, OP_PARM_Gy, OP_PARM_My, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1298 OP("movbe %My,%Gy", IDX_ParseModRM, IDX_UseModRM, 0, OP_MOVBEMG, OP_PARM_My, OP_PARM_Gy, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1299 INVALID_OPCODE, 1300 INVALID_OPCODE, 1301 INVALID_OPCODE, 1302 INVALID_OPCODE, 1303 INVALID_OPCODE, 1304 INVALID_OPCODE, 1305 INVALID_OPCODE, 1306 INVALID_OPCODE, 1307 INVALID_OPCODE, 1308 INVALID_OPCODE, 1309 INVALID_OPCODE, 1310 INVALID_OPCODE, 1311 INVALID_OPCODE, 1312 INVALID_OPCODE, 1313 }; 1314 1278 1315 /** These tables are mostly sparse, so use another level of indirection to save space. */ 1279 1316 PCDISOPCODE const g_apThreeByteMapX86_0F38[16] = … … 1310 1347 NULL, 1311 1348 /* f */ 1312 NULL,1349 &g_aThreeByteMapX86_0F38_F[0], 1313 1350 }; 1314 1351 … … 1381 1418 }; 1382 1419 1420 const DISOPCODE g_aThreeByteMapX86_660F38_F[16] = 1421 { 1422 /* 8 */ 1423 OP("movbe %Gw,%Mw", IDX_ParseModRM, IDX_UseModRM, 0, OP_MOVBEGM, OP_PARM_Gw, OP_PARM_Mw, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1424 OP("movbe %Mw,%Gw", IDX_ParseModRM, IDX_UseModRM, 0, OP_MOVBEMG, OP_PARM_Mw, OP_PARM_Gw, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1425 INVALID_OPCODE, 1426 INVALID_OPCODE, 1427 INVALID_OPCODE, 1428 INVALID_OPCODE, 1429 OP("adcx %Gy,%Ey", IDX_ParseModRM, IDX_UseModRM, 0, OP_ADCX, OP_PARM_Gy, OP_PARM_Ey, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1430 INVALID_OPCODE, 1431 INVALID_OPCODE, 1432 INVALID_OPCODE, 1433 INVALID_OPCODE, 1434 INVALID_OPCODE, 1435 INVALID_OPCODE, 1436 INVALID_OPCODE, 1437 INVALID_OPCODE, 1438 INVALID_OPCODE, 1439 }; 1440 1383 1441 /** Three byte opcode map with prefix 0x66 (0xF 0x38) */ 1384 1442 PCDISOPCODE const g_apThreeByteMapX86_660F38[16] = … … 1415 1473 NULL, 1416 1474 /* f */ 1417 NULL, 1475 &g_aThreeByteMapX86_660F38_F[0], 1476 }; 1477 1478 const DISOPCODE g_aThreeByteMapX86_F20F38_F[16] = 1479 { 1480 /* According to Intel opcodes map in Intel® 64 and IA-32 Architectures Software Developer’s Manual dated September 2014 1481 it should be %Gd (always dword regardless of operand-size attribute), but from the description of the command 1482 it is clear that REX.W prefix can change this size to 64 bit, therefore it is set to %Gy. Seems to be a mistake. */ 1483 OP("crc32 %Gy,%Eb", IDX_ParseModRM, IDX_UseModRM, 0, OP_CRC32GDEB, OP_PARM_Gy, OP_PARM_Eb, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1484 OP("crc32 %Gy,%Ey", IDX_ParseModRM, IDX_UseModRM, 0, OP_CRC32GDEY, OP_PARM_Gy, OP_PARM_Ey, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1485 INVALID_OPCODE, 1486 INVALID_OPCODE, 1487 INVALID_OPCODE, 1488 INVALID_OPCODE, 1489 INVALID_OPCODE, 1490 INVALID_OPCODE, 1491 INVALID_OPCODE, 1492 INVALID_OPCODE, 1493 INVALID_OPCODE, 1494 INVALID_OPCODE, 1495 INVALID_OPCODE, 1496 INVALID_OPCODE, 1497 INVALID_OPCODE, 1498 INVALID_OPCODE, 1499 }; 1500 1501 const DISOPCODE g_aThreeByteMapX86_66F20F38_F[16] = 1502 { 1503 /* According to Intel opcodes map in Intel® 64 and IA-32 Architectures Software Developer’s Manual dated September 2014 1504 it should be %Gd (always dword regardless of operand-size attribute), but from the description of the command 1505 it is clear that REX.W prefix can change this size to 64 bit, therefore it is set to %Gy. Seems to be a mistake. */ 1506 OP("crc32 %Gy,%Eb", IDX_ParseModRM, IDX_UseModRM, 0, OP_CRC32GDEB, OP_PARM_Gy, OP_PARM_Eb, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1507 OP("crc32 %Gy,%Ew", IDX_ParseModRM, IDX_UseModRM, 0, OP_CRC32GDEY, OP_PARM_Gy, OP_PARM_Ew, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1508 INVALID_OPCODE, 1509 INVALID_OPCODE, 1510 INVALID_OPCODE, 1511 INVALID_OPCODE, 1512 INVALID_OPCODE, 1513 INVALID_OPCODE, 1514 INVALID_OPCODE, 1515 INVALID_OPCODE, 1516 INVALID_OPCODE, 1517 INVALID_OPCODE, 1518 INVALID_OPCODE, 1519 INVALID_OPCODE, 1520 INVALID_OPCODE, 1521 INVALID_OPCODE, 1418 1522 }; 1419 1523 … … 1453 1557 NULL, 1454 1558 /* f */ 1455 NULL, 1559 &g_aThreeByteMapX86_F20F38_F[0], 1560 }; 1561 1562 const DISOPCODE g_aThreeByteMapX86_F30F38_F[16] = 1563 { 1564 INVALID_OPCODE, 1565 INVALID_OPCODE, 1566 INVALID_OPCODE, 1567 INVALID_OPCODE, 1568 INVALID_OPCODE, 1569 INVALID_OPCODE, 1570 OP("adox %Gy,%Ey", IDX_ParseModRM, IDX_UseModRM, 0, OP_ADOX, OP_PARM_Gy, OP_PARM_Ey, OP_PARM_NONE, DISOPTYPE_HARMLESS), 1571 INVALID_OPCODE, 1572 INVALID_OPCODE, 1573 INVALID_OPCODE, 1574 INVALID_OPCODE, 1575 INVALID_OPCODE, 1576 INVALID_OPCODE, 1577 INVALID_OPCODE, 1578 INVALID_OPCODE, 1579 INVALID_OPCODE, 1580 }; 1581 1582 /** Three byte opcode map with prefix 0xF3 (0xF 0x38) */ 1583 PCDISOPCODE const g_apThreeByteMapX86_F30F38[16] = 1584 { 1585 /* 0 */ 1586 NULL, 1587 /* 1 */ 1588 NULL, 1589 /* 2 */ 1590 NULL, 1591 /* 3 */ 1592 NULL, 1593 /* 4 */ 1594 NULL, 1595 /* 5 */ 1596 NULL, 1597 /* 6 */ 1598 NULL, 1599 /* 7 */ 1600 NULL, 1601 /* 8 */ 1602 NULL, 1603 /* 9 */ 1604 NULL, 1605 /* a */ 1606 NULL, 1607 /* b */ 1608 NULL, 1609 /* c */ 1610 NULL, 1611 /* d */ 1612 NULL, 1613 /* e */ 1614 NULL, 1615 /* f */ 1616 &g_aThreeByteMapX86_F30F38_F[0], 1456 1617 }; 1457 1618 -
trunk/src/VBox/Disassembler/testcase/tstDisasm-1A.asm
r49346 r53007 51 51 DB 0xF0, 0x0F, 0x20, 0xC0 52 52 smsw word [edx+16] 53 ; invept eax, qword [ecx]53 ; invept eax, dqword [ecx] 54 54 DB 0x66, 0x0F, 0x38, 0x80, 0x1 55 ; invept eax, qword [ecx]55 ; invept eax, dqword [ecx] 56 56 DB 0x66, 0x0F, 0x38, 0x81, 0x1 57 57 mov eax, dword [ecx] … … 148 148 paddd mm1, mm3 149 149 paddd xmm1, xmm3 150 151 %if __YASM_VERSION_ID__ >= 001030000h ; Old yasm doesn't support the instructions below 152 adcx eax, ebx 153 adcx eax, [edi] 154 155 adox eax, ebx 156 adox eax, [edi] 157 adox eax, [edi + 1000h] 158 159 tzcnt ax, bx 160 tzcnt eax, ebx 161 tzcnt ax, [edi] 162 tzcnt eax, [edi] 163 tzcnt eax, [edi + 1000h] 164 %endif 165 166 movbe eax, [edi] 167 movbe ebx, [edi + 1000h] 168 movbe ax, [edi] 169 movbe [edi], eax 170 171 crc32 eax, bl 172 ;crc32 eax, bx 173 crc32 eax, ebx 174 crc32 eax, byte [edi] 175 ;crc32 eax, word [edi] 176 crc32 eax, dword [edi] 177 178 popcnt ax, bx 179 popcnt eax, ebx 180 popcnt ax, [edi] 181 popcnt eax, [edi] 182 popcnt eax, [edi + 1000h] 183 184 lzcnt ax, bx 185 lzcnt eax, ebx 186 lzcnt ax, [edi] 187 lzcnt eax, [edi] 188 lzcnt eax, [edi + 1000h] 189 190 vmread eax, ebx 191 vmwrite eax, ebx 192 150 193 ENDPROC TestProc32 151 194 … … 164 207 mov rbx, [0xfffe0080] 165 208 divsd xmm1, xmm0 166 ; invept rdi, qword [rsi]209 ; invept rdi, dqword [rsi] 167 210 DB 0x66, 0x0F, 0x38, 0x80, 0x3E 168 ; invept rcx, qword [rdx]211 ; invept rcx, dqword [rdx] 169 212 DB 0x66, 0x0F, 0x38, 0x80, 0xA 170 ;invvpid rdi, qword [rsi]213 ;invvpid rdi, dqword [rsi] 171 214 DB 0x66, 0x0F, 0x38, 0x81, 0x3E 172 ; invvpid rcx, qword [rdx]215 ; invvpid rcx, dqword [rdx] 173 216 DB 0x66, 0x0F, 0x38, 0x81, 0xA 174 217 mov rdi, [rsi] … … 234 277 movsd xmm6, xmm1 235 278 279 movbe eax, [rdi] 280 movbe ax, [rdi] 281 movbe rax, [rdi] 282 283 crc32 eax, bl 284 ;crc32 eax, bx 285 crc32 eax, ebx 286 crc32 eax, byte [edi] 287 ;crc32 eax, word [edi] 288 crc32 eax, dword [edi] 289 290 crc32 rax, bl 291 crc32 rax, byte [rdi] 292 crc32 rax, qword [rdi] 293 294 %if __YASM_VERSION_ID__ >= 001030000h ; Old yasm doesn't support the instructions below 295 296 adcx eax, ebx 297 adcx rax, rbx 298 adcx r8, r11 299 adcx r8d, edx 300 301 adox eax, ebx 302 adox eax, [edi] 303 adox eax, [edi + 1000h] 304 305 adox rax, rbx 306 adox rax, [rdi] 307 adox rax, [rdi + 1000h] 308 adox rax, [edi + 1000h] 309 310 tzcnt ax, bx 311 tzcnt eax, ebx 312 tzcnt rax, rbx 313 tzcnt ax, [edi] 314 tzcnt eax, [edi] 315 tzcnt eax, [edi + 1000h] 316 %endif 317 318 popcnt ax, bx 319 popcnt eax, ebx 320 popcnt rax, rbx 321 popcnt ax, [edi] 322 popcnt eax, [edi] 323 popcnt eax, [edi + 1000h] 324 popcnt rax, [rdi + 1000h] 325 326 lzcnt ax, bx 327 lzcnt eax, ebx 328 lzcnt rax, rbx 329 lzcnt ax, [edi] 330 lzcnt eax, [edi] 331 lzcnt eax, [edi + 1000h] 332 lzcnt eax, [rdi] 333 lzcnt ax, [rdi] 334 lzcnt rax, [rdi] 335 lzcnt r8d, [rdi] 336 337 vmread rax, rbx 338 vmwrite rax, rbx 339 236 340 ret 237 341 ENDPROC TestProc64
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