VirtualBox

Ignore:
Timestamp:
Nov 4, 2014 10:40:22 AM (10 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
96736
Message:

VMM/HMVMXR0: nits.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r53178 r53190  
    225225    /** The VM-exit interruption error code. */
    226226    uint32_t        uExitIntErrorCode;
    227     /** The VM-exit exit qualification. */
     227    /** The VM-exit exit code qualification. */
    228228    uint64_t        uExitQualification;
    229229
    … …  
    503503    /*  5 */ "VMRESUME with non-launched VMCS.",
    504504    /*  6 */ "VMRESUME after VMXOFF",
    505     /*  7 */ "VM entry with invalid control fields.",
    506     /*  8 */ "VM entry with invalid host state fields.",
     505    /*  7 */ "VM-entry with invalid control fields.",
     506    /*  8 */ "VM-entry with invalid host state fields.",
    507507    /*  9 */ "VMPTRLD with invalid physical address.",
    508508    /* 10 */ "VMPTRLD with VMXON pointer.",
    … …  
    512512    /* 14 */ "(Not Used)",
    513513    /* 15 */ "VMXON executed in VMX root operation.",
    514     /* 16 */ "VM entry with invalid executive-VMCS pointer.",
    515     /* 17 */ "VM entry with non-launched executing VMCS.",
    516     /* 18 */ "VM entry with executive-VMCS pointer not VMXON pointer.",
     514    /* 16 */ "VM-entry with invalid executive-VMCS pointer.",
     515    /* 17 */ "VM-entry with non-launched executing VMCS.",
     516    /* 18 */ "VM-entry with executive-VMCS pointer not VMXON pointer.",
    517517    /* 19 */ "VMCALL with non-clear VMCS.",
    518518    /* 20 */ "VMCALL with invalid VM-exit control fields.",
    … …  
    521521    /* 23 */ "VMXOFF under dual monitor treatment of SMIs and SMM.",
    522522    /* 24 */ "VMCALL with invalid SMM-monitor features.",
    523     /* 25 */ "VM entry with invalid VM-execution control fields in executive VMCS.",
    524     /* 26 */ "VM entry with events blocked by MOV SS.",
     523    /* 25 */ "VM-entry with invalid VM-execution control fields in executive VMCS.",
     524    /* 26 */ "VM-entry with events blocked by MOV SS.",
    525525    /* 27 */ "(Not Used)",
    526526    /* 28 */ "Invalid operand to INVEPT/INVVPID."
    … …  
    683683
    684684/**
    685  * Reads the exit qualification from the VMCS into the VMX transient structure.
     685 * Reads the exit code qualification from the VMCS into the VMX transient
     686 * structure.
    686687 *
    687688 * @returns VBox status code.
    … …  
    46864687 * Loads certain guest MSRs into the VM-entry MSR-load and VM-exit MSR-store
    46874688 * areas. These MSRs will automatically be loaded to the host CPU on every
    4688  * successful VM entry and stored from the host CPU on every successful VM-exit.
     4689 * successful VM-entry and stored from the host CPU on every successful VM-exit.
    46894690 *
    46904691 * This also creates/updates MSR slots for the host MSRs. The actual host
    … …  
    75047505 *                          out-of-sync. Make sure to update the required fields
    75057506 *                          before using them.
    7506  * @param   fStepping       Running in hmR0VmxRunGuestCodeStep and we should
    7507  *                          return VINF_EM_DBG_STEPPED an event was dispatched
    7508  *                          directly.
     7507 * @param   fStepping       Running in hmR0VmxRunGuestCodeStep() and we should
     7508 *                          return VINF_EM_DBG_STEPPED if the event was
     7509 *                          dispatched directly.
    75097510 */
    75107511static int hmR0VmxInjectPendingEvent(PVMCPU pVCpu, PCPUMCTX pMixedCtx, bool fStepping)
    … …  
    76027603
    76037604    /*
    7604      * There's no need to clear the VM entry-interruption information field here if we're not injecting anything.
     7605     * There's no need to clear the VM-entry interruption-information field here if we're not injecting anything.
    76057606     * VT-x clears the valid bit on every VM-exit. See Intel spec. 24.8.3 "VM-Entry Controls for Event Injection".
    76067607     */
    … …  
    76387639 *                          out-of-sync. Make sure to update the required fields
    76397640 *                          before using them.
    7640  * @param   fStepping       Whether we're running in hmR0VmxRunGuestCodeStep and
    7641  *                          should return VINF_EM_DBG_STEPPED if the event is
    7642  *                          injected directly (registerd modified by us, not by
    7643  *                          hardware on VM entry).
     7641 * @param   fStepping       Whether we're running in hmR0VmxRunGuestCodeStep()
     7642 *                          and should return VINF_EM_DBG_STEPPED if the event
     7643 *                          is injected directly (register modified by us, not
     7644 *                          by hardware on VM-entry).
    76447645 * @param   puIntrState     Pointer to the current guest interruptibility-state.
    76457646 *                          This interruptibility-state will be updated if
    … …  
    77037704 *                              mode, i.e. in real-mode it's not valid).
    77047705 * @param   u32ErrorCode        The error code associated with the #GP.
    7705  * @param   fStepping           Whether we're running in hmR0VmxRunGuestCodeStep
    7706  *                              and should return VINF_EM_DBG_STEPPED if the
    7707  *                              event is injected directly (registerd modified
    7708  *                              by us, not by hardware on VM entry).
     7706 * @param   fStepping           Whether we're running in
     7707 *                              hmR0VmxRunGuestCodeStep() and should return
     7708 *                              VINF_EM_DBG_STEPPED if the event is injected
     7709 *                              directly (registerd modified by us, not by
     7710 *                              hardware on VM-entry).
    77097711 * @param   puIntrState         Pointer to the current guest interruptibility-state.
    77107712 *                              This interruptibility-state will be updated if
    … …  
    78147816 *                              This interruptibility-state will be updated if
    78157817 *                              necessary. This cannot not be NULL.
    7816  * @param   fStepping           Whether we're running in hmR0VmxRunGuestCodeStep
    7817  *                              and should return VINF_EM_DBG_STEPPED if the
    7818  *                              event is injected directly (registerd modified
    7819  *                              by us, not by hardware on VM entry).
     7818 * @param   fStepping           Whether we're running in
     7819 *                              hmR0VmxRunGuestCodeStep() and should return
     7820 *                              VINF_EM_DBG_STEPPED if the event is injected
     7821 *                              directly (register modified by us, not by
     7822 *                              hardware on VM-entry).
    78207823 *
    78217824 * @remarks Requires CR0!
    … …  
    79547957                    *puIntrState &= ~VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI;
    79557958                }
    7956                 Log4(("Injecting real-mode: u32IntInfo=%#x u32ErrCode=%#x instrlen=%#x efl=%#x cs:eip=%04x:%04x\n",
     7959                Log4(("Injecting real-mode: u32IntInfo=%#x u32ErrCode=%#x cbInstr=%#x Eflags=%#x CS:EIP=%04x:%04x\n",
    79577960                      u32IntInfo, u32ErrCode, cbInstr, pMixedCtx->eflags.u, pMixedCtx->cs.Sel, pMixedCtx->eip));
    79587961
    … …  
    84168419 *
    84178420 * This may cause longjmps to ring-3 and may even result in rescheduling to the
    8418  * recompiler. We must be cautious what we do here regarding committing
     8421 * recompiler/IEM. We must be cautious what we do here regarding committing
    84198422 * guest-state information into the VMCS assuming we assuredly execute the
    8420  * guest in VT-x mode. If we fall back to the recompiler after updating the VMCS
    8421  * and clearing the common-state (TRPM/forceflags), we must undo those changes
    8422  * so that the recompiler can (and should) use them when it resumes guest
    8423  * execution. Otherwise such operations must be done when we can no longer
    8424  * exit to ring-3.
     8423 * guest in VT-x mode.
     8424 *
     8425 * If we fall back to the recompiler/IEM after updating the VMCS and clearing
     8426 * the common-state (TRPM/forceflags), we must undo those changes so that the
     8427 * recompiler/IEM can (and should) use them when it resumes guest execution.
     8428 * Otherwise such operations must be done when we can no longer exit to ring-3.
    84258429 *
    84268430 * @returns Strict VBox status code.
    … …  
    84398443 *                          before using them.
    84408444 * @param   pVmxTransient   Pointer to the VMX transient structure.
    8441  * @param   fStepping       Set if called from hmR0VmxRunGuestCodeStep.  Makes
     8445 * @param   fStepping       Set if called from hmR0VmxRunGuestCodeStep().  Makes
    84428446 *                          us ignore some of the reasons for returning to
    84438447 *                          ring-3, and return VINF_EM_DBG_STEPPED if event
    … …  
    88328836           to ring-3.  This bugger disables interrupts on VINF_SUCCESS! */
    88338837        STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatEntry, x);
    8834         rc = hmR0VmxPreRunGuest(pVM, pVCpu, pCtx, &VmxTransient, false /*fStepping*/);
     8838        rc = hmR0VmxPreRunGuest(pVM, pVCpu, pCtx, &VmxTransient, false /* fStepping */);
    88358839        if (rc != VINF_SUCCESS)
    88368840            break;
    … …  
    89068910           to ring-3.  This bugger disables interrupts on VINF_SUCCESS! */
    89078911        STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatEntry, x);
    8908         rcStrict = hmR0VmxPreRunGuest(pVM, pVCpu, pCtx, &VmxTransient, true /*fStepping*/);
     8912        rcStrict = hmR0VmxPreRunGuest(pVM, pVCpu, pCtx, &VmxTransient, true /* fStepping */);
    89098913        if (rcStrict != VINF_SUCCESS)
    89108914            break;
    … …  
    89268930        }
    89278931
    8928         /* Handle the VM-exit - we quit earlier on certain exits, see hmR0VmxHandleExitStep. */
     8932        /* Handle the VM-exit - we quit earlier on certain VM-exits, see hmR0VmxHandleExitStep(). */
    89298933        AssertMsg(VmxTransient.uExitReason <= VMX_EXIT_MAX, ("%#x\n", VmxTransient.uExitReason));
    89308934        STAM_COUNTER_INC(&pVCpu->hm.s.StatExitAll);
    … …  
    90959099
    90969100/**
    9097  * Single stepping exit filtering.
     9101 * Single-stepping VM-exit filtering.
    90989102 *
    90999103 * This is preprocessing the exits and deciding whether we've gotten far enough
    9100  * to return VINF_EM_DBG_STEPPED already.  If not, normal exit handling is
     9104 * to return VINF_EM_DBG_STEPPED already.  If not, normal VM-exit handling is
    91019105 * performed.
    91029106 *
    … …  
    91079111 *                          fields before using them.
    91089112 * @param   pVmxTransient   Pointer to the VMX-transient structure.
    9109  * @param   uExitReason     The exit reason.
     9113 * @param   uExitReason     The VM-exit reason.
    91109114 */
    91119115DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExitStep(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient,
    … …  
    91169120        case VMX_EXIT_XCPT_OR_NMI:
    91179121        {
    9118             /* Check for NMI. */
     9122            /* Check for host NMI. */
    91199123            int rc2 = hmR0VmxReadExitIntInfoVmcs(pVmxTransient);
    91209124            AssertRCReturn(rc2, rc2);
    … …  
    1037510379    /*
    1037610380     * This can only happen if we support dual-monitor treatment of SMI, which can be activated by executing VMCALL in VMX
    10377      * root operation. Only an STM (SMM transfer monitor) would get this exit when we (the executive monitor) execute a VMCALL
     10381     * root operation. Only an STM (SMM transfer monitor) would get this VM-exit when we (the executive monitor) execute a VMCALL
    1037810382     * in VMX root mode or receive an SMI. If we get here, something funny is going on.
    1037910383     * See Intel spec. "33.15.6 Activating the Dual-Monitor Treatment" and Intel spec. 25.3 "Other Causes of VM-Exits"
    … …  
    1097410978        default:
    1097510979        {
    10976             AssertMsgFailed(("Invalid access-type in Mov CRx exit qualification %#x\n", uAccessType));
     10980            AssertMsgFailed(("Invalid access-type in Mov CRx VM-exit qualification %#x\n", uAccessType));
    1097710981            rc = VERR_VMX_UNEXPECTED_EXCEPTION;
    1097810982        }
    … …  
    1117311177            HM_DISABLE_PREEMPT_IF_NEEDED();
    1117411178
    11175             bool fIsGuestDbgActive = CPUMR0DebugStateMaybeSaveGuest(pVCpu, true /*fDr6*/);
     11179            bool fIsGuestDbgActive = CPUMR0DebugStateMaybeSaveGuest(pVCpu, true /* fDr6 */);
    1117611180
    1117711181            VBOXSTRICTRC rcStrict2 = DBGFBpCheckIo(pVM, pVCpu, pMixedCtx, uIOPort, cbValue);
    … …  
    1155611560    TRPMAssertXcptPF(pVCpu, GCPhys, uErrorCode);
    1155711561
    11558     Log4(("EPT violation %#x at %#RX64 ErrorCode %#x CS:EIP=%04x:%08RX64\n", pVmxTransient->uExitQualification, GCPhys,
     11562    Log4(("EPT violation %#x at %#RX64 ErrorCode %#x CS:RIP=%04x:%08RX64\n", pVmxTransient->uExitQualification, GCPhys,
    1155911563          uErrorCode, pMixedCtx->cs.Sel, pMixedCtx->rip));
    1156011564
    … …  
    1166211666
    1166311667    /*
    11664      * Get the DR6-like values from the exit qualification and pass it to DBGF
     11668     * Get the DR6-like values from the VM-exit qualification and pass it to DBGF
    1166511669     * for processing.
    1166611670     */
    … …  
    1188211886            case OP_POPF:
    1188311887            {
    11884                 Log4(("POPF CS:RIP %04x:%04RX64\n", pMixedCtx->cs.Sel, pMixedCtx->rip));
     11888                Log4(("POPF CS:EIP %04x:%04RX64\n", pMixedCtx->cs.Sel, pMixedCtx->rip));
    1188511889                uint32_t cbParm;
    1188611890                uint32_t uMask;
    … …  
    1216812172        return rc;
    1216912173    }
     12174
    1217012175    if (rc == VINF_EM_RAW_GUEST_TRAP)
    1217112176    {
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