Changeset 53608 in vbox for trunk/src/VBox
- Timestamp:
- Dec 30, 2014 5:06:09 PM (10 years ago)
- Location:
- trunk/src/VBox/ValidationKit/utils/cpu
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/utils/cpu/Makefile.kmk
r53578 r53608 54 54 cidet-instr-1.cpp 55 55 cidet-app_DEFS = IN_DIS 56 cidet-app_DEFS.linux = CIDET_REDUCED_CTX 56 57 cidet-app_LIBS = $(PATH_STAGE_LIB)/DisasmR3Static$(VBOX_SUFF_LIB) 57 58 -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-app.cpp
r53607 r53608 473 473 pThis->Core.ActualCtx.uErr = pCtx->uc_mcontext.gregs[REG_ERR]; 474 474 475 /* Fudge the FS register as it seems REG_CSGSFS isn't working right. */ 476 if ( pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] == 0 477 && pThis->Core.ExpectedCtx.aSRegs[X86_SREG_FS] != 0) 475 /* Fudge the FS and GS registers as setup_sigcontext returns 0. */ 476 if (pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] == 0) 478 477 pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] = pThis->Core.ExpectedCtx.aSRegs[X86_SREG_FS]; 478 if (pThis->Core.ActualCtx.aSRegs[X86_SREG_GS] == 0) 479 pThis->Core.ActualCtx.aSRegs[X86_SREG_GS] = pThis->Core.ExpectedCtx.aSRegs[X86_SREG_GS]; 479 480 480 481 # elif defined(RT_ARCH_X86) … … 519 520 } 520 521 522 # if 0 521 523 /* Fudge the resume flag (it's probably always set here). */ 522 524 if ( (pThis->Core.ActualCtx.rfl & X86_EFL_RF) 523 525 && !(pThis->Core.ExpectedCtx.rfl & X86_EFL_RF)) 524 526 pThis->Core.ActualCtx.rfl &= ~X86_EFL_RF; 527 # endif 525 528 526 529 # else … … 539 542 pThis->Core.ActualCtx.uXcpt = UINT32_MAX; 540 543 Assert(pThis->Core.ActualCtx.uErr == UINT64_MAX); 544 pThis->Core.ActualCtx.rfl &= ~X86_EFL_RF; 541 545 } 542 546 -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-appA.asm
r53607 r53608 111 111 mov [xCX + CIDETCPUCTX.aGRegs + X86_GREG_x15 * 8], r15 112 112 xor eax, eax 113 mov [xCX + CIDETCPUCTX.cr2], rax 114 %ifndef CIDET_REDUCED_CTX 113 115 mov [xCX + CIDETCPUCTX.cr0], rax 114 mov [xCX + CIDETCPUCTX.cr2], rax115 116 mov [xCX + CIDETCPUCTX.cr3], rax 116 117 mov [xCX + CIDETCPUCTX.cr4], rax … … 122 123 mov [xCX + CIDETCPUCTX.dr6], rax 123 124 mov [xCX + CIDETCPUCTX.dr7], rax 125 mov [xCX + CIDETCPUCTX.tr], ax 126 mov [xCX + CIDETCPUCTX.ldtr], ax 127 %endif 124 128 %else 125 129 xor eax, eax … … 150 154 mov [xCX + CIDETCPUCTX.aGRegs + X86_GREG_x15 * 8 ], eax 151 155 mov [xCX + CIDETCPUCTX.aGRegs + X86_GREG_x15 * 8 + 4], eax 156 mov [xCX + CIDETCPUCTX.cr2 ], eax 157 mov [xCX + CIDETCPUCTX.cr2 + 4], eax 158 %ifndef CIDET_REDUCED_CTX 152 159 mov [xCX + CIDETCPUCTX.cr0 ], eax 153 160 mov [xCX + CIDETCPUCTX.cr0 + 4], eax 154 mov [xCX + CIDETCPUCTX.cr2 ], eax155 mov [xCX + CIDETCPUCTX.cr2 + 4], eax156 161 mov [xCX + CIDETCPUCTX.cr3 ], eax 157 162 mov [xCX + CIDETCPUCTX.cr3 + 4], eax … … 172 177 mov [xCX + CIDETCPUCTX.dr7 ], eax 173 178 mov [xCX + CIDETCPUCTX.dr7 + 4], eax 174 %endif175 179 mov [xCX + CIDETCPUCTX.tr], ax 176 180 mov [xCX + CIDETCPUCTX.ldtr], ax 181 %endif 182 %endif 177 183 dec xAX 178 184 mov [xCX + CIDETCPUCTX.uErr], xAX -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-core.cpp
r53607 r53608 264 264 while (i-- > 0) 265 265 pThis->InTemplateCtx.aSRegs[i] = 0; /* Front end sets these afterwards. */ 266 pThis->InTemplateCtx.cr2 = 0; 267 #ifndef CIDET_REDUCED_CTX 266 268 pThis->InTemplateCtx.tr = 0; 267 269 pThis->InTemplateCtx.ldtr = 0; 268 270 pThis->InTemplateCtx.cr0 = 0; 269 pThis->InTemplateCtx.cr2 = 0;270 271 pThis->InTemplateCtx.cr3 = 0; 271 272 pThis->InTemplateCtx.cr4 = 0; 272 273 pThis->InTemplateCtx.cr8 = 0; 274 #endif 273 275 pThis->InTemplateCtx.fIgnoredRFlags = 0; 274 276 pThis->InTemplateCtx.uXcpt = UINT32_MAX; … … 426 428 /* The AMD64 low variants: spl, bpl, sil and dil. */ 427 429 pThis->fRex = true; 430 pThis->fHasStackRegInMrmReg = iReg == X86_GREG_xSP; 428 431 429 432 /* Check for collisions. */ … … 456 459 pThis->fNoRexPrefix = true; 457 460 pThis->fHasHighByteRegInMrmReg = true; 461 pThis->fHasStackRegInMrmReg = false; 458 462 pThis->aOperands[pThis->idxMrmRegOp].fIsHighByteRegister = true; 459 463 Assert(!pThis->fRexW); Assert(!pThis->fRexX); Assert(!pThis->fRexB); … … 494 498 pThis->bModRm |= (iReg & X86_MODRM_REG_SMASK) << X86_MODRM_REG_SHIFT; 495 499 pThis->fRexR = iReg >= 8; 500 pThis->fHasStackRegInMrmReg = iReg == X86_GREG_xSP && CIDET_OF_K_IS_GPR(pThis->fMrmRegOp); 496 501 497 502 /* … … 673 678 pThis->bModRm &= ~X86_MODRM_RM_MASK; 674 679 pThis->bModRm |= iRm; 675 if (CIDET_OF_K_IS_GPR(pThis->fMrmR mOp))680 if (CIDET_OF_K_IS_GPR(pThis->fMrmRegOp)) 676 681 { 677 682 iReg -= pThis->fHasHighByteRegInMrmReg * 4; … … 929 934 pThis->fRexB = iRm >= 8; 930 935 pThis->fRexX = false; 931 if (CIDET_OF_K_IS_GPR(pThis->fMrmRmOp)) 932 { 933 if (pThis->fHasHighByteRegInMrmReg) 934 iReg -= 4; 936 if (CIDET_OF_K_IS_GPR(pThis->fMrmRegOp)) 937 { 938 iReg -= pThis->fHasHighByteRegInMrmReg * 4; 935 939 pThis->fHasRegCollisionMemBase = iReg == pThis->aOperands[pThis->idxMrmRmOp].iMemBaseReg; 936 940 pThis->fHasRegCollisionMemIndex = iReg == pThis->aOperands[pThis->idxMrmRmOp].iMemIndexReg; … … 1179 1183 case 1: 1180 1184 pThis->fOpSizePrf = false; 1181 if ( !pThis->fNoRexPrefix)1185 if (pThis->fNoRexPrefix) 1182 1186 break; 1183 1187 pThis->fRexW = true; … … 2219 2223 IF_FIELD_DIFFERS_SET_ERROR(aSRegs[X86_SREG_FS], "%#06x"); 2220 2224 IF_FIELD_DIFFERS_SET_ERROR(aSRegs[X86_SREG_GS], "%#06x"); 2225 IF_FIELD_DIFFERS_SET_ERROR(uXcpt, "%#04x"); 2226 IF_FIELD_DIFFERS_SET_ERROR(uErr, "%#04llx"); 2227 IF_FIELD_DIFFERS_SET_ERROR(cr2, "%#010llx"); 2228 #ifndef CIDET_REDUCED_CTX 2221 2229 IF_FIELD_DIFFERS_SET_ERROR(tr, "%#06x"); 2222 2230 IF_FIELD_DIFFERS_SET_ERROR(ldtr, "%#06x"); 2223 2231 IF_FIELD_DIFFERS_SET_ERROR(cr0, "%#010llx"); 2224 IF_FIELD_DIFFERS_SET_ERROR(cr2, "%#010llx");2225 2232 IF_FIELD_DIFFERS_SET_ERROR(cr3, "%#010llx"); 2226 2233 IF_FIELD_DIFFERS_SET_ERROR(cr4, "%#010llx"); … … 2232 2239 IF_FIELD_DIFFERS_SET_ERROR(dr6, "%#010llx"); 2233 2240 IF_FIELD_DIFFERS_SET_ERROR(dr7, "%#010llx"); 2234 IF_FIELD_DIFFERS_SET_ERROR(uXcpt, "%#04x"); 2235 IF_FIELD_DIFFERS_SET_ERROR(uErr, "%#04llx"); 2236 2237 AssertBreakpoint(); 2241 #endif 2242 2243 AssertMsgFailed(("cDiffs=%d\n", cDiffs)); 2238 2244 Assert(cDiffs > 0); 2239 2245 return cDiffs == 0; -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-instr-1.cpp
r53579 r53608 191 191 *pThis->aOperands[0].Expected.pu32 = pEntry->uOut; 192 192 if (!pThis->aOperands[0].fIsMem) 193 pThis->aOperands[0].Expected.pu32[ 0] = 0;193 pThis->aOperands[0].Expected.pu32[1] = 0; 194 194 *pThis->aOperands[1].Expected.pu32 = pEntry->uIn2; 195 195 pThis->ExpectedCtx.rfl |= pEntry->fEFlagsOut; … … 253 253 const CIDETINSTR g_aCidetInstructions1[] = 254 254 { 255 #if 1 255 256 { 256 257 "add Eb,Gb", cidetInOutAdd, 1, {0x00, 0, 0}, 0, 2, … … 259 260 0, 0 }, CIDET_IF_MODRM 260 261 }, 261 #if 0 262 { 263 "add Ev,Gv", cidetInOutAdd, 1, {0x00, 0, 0}, 0, 2, 264 { CIDET_OF_K_GPR | CIDET_OF_Z_VAR_WDQ | CIDET_OF_M_RM, 265 CIDET_OF_K_GPR | CIDET_OF_Z_VAR_WDQ | CIDET_OF_M_REG, 262 #endif 263 #if 1 264 { 265 "add Ev,Gv", cidetInOutAdd, 1, {0x01, 0, 0}, 0, 2, 266 { CIDET_OF_K_GPR | CIDET_OF_Z_VAR_WDQ | CIDET_OF_M_RM | CIDET_OF_A_RW, 267 CIDET_OF_K_GPR | CIDET_OF_Z_VAR_WDQ | CIDET_OF_M_REG | CIDET_OF_A_R, 266 268 0, 0 }, CIDET_IF_MODRM 267 269 }, -
trunk/src/VBox/ValidationKit/utils/cpu/cidet.h
r53579 r53608 160 160 uint16_t aSRegs[6]; 161 161 162 #ifndef CIDET_REDUCED_CTX 162 163 uint16_t tr; 163 164 uint16_t ldtr; 164 165 uint64_t cr0; 166 #else 167 uint16_t au16Padding[2]; 168 #endif 165 169 uint64_t cr2; 170 #ifndef CIDET_REDUCED_CTX 166 171 uint64_t cr3; 167 172 uint64_t cr4; … … 173 178 uint64_t dr6; 174 179 uint64_t dr7; 180 #endif 175 181 176 182 uint64_t uErr; /**< Exception error code. UINT64_MAX if not applicable. (Not for input context.) */ -
trunk/src/VBox/ValidationKit/utils/cpu/cidet.mac
r53579 r53608 35 35 .aSRegs resw 6 36 36 37 %ifndef CIDET_REDUCED_CTX 37 38 .tr resw 1 38 39 .ldtr resw 1 39 40 .cr0 resq 1 41 %else 42 .au16Padding resw 2 43 %endif 40 44 .cr2 resq 1 45 %ifndef CIDET_REDUCED_CTX 41 46 .cr3 resq 1 42 47 .cr4 resq 1 … … 48 53 .dr6 resq 1 49 54 .dr7 resq 1 55 %endif 50 56 51 57 .uErr resq 1
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