Changeset 55001 in vbox

Timestamp:

Mar 29, 2015 4:59:20 PM (10 years ago)

Author:

vboxsync

Message:

CPUMCTXCORE elimination.

Location:

trunk

Files:

• include/VBox/vmm/csam.h (modified) (1 diff)
• include/VBox/vmm/patm.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/PATMAll.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMAll/TRPMAll.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (5 diffs)
• src/VBox/VMM/VMMR3/CSAM.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMR3/EM.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/EMRaw.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp (modified) (1 diff)

trunk/include/VBox/vmm/csam.h

@@ -87 +87 @@
 VMMR3_INT_DECL(int)     CSAMR3RemovePage(PVM pVM, RTRCPTR addr);
 VMMR3_INT_DECL(int)     CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC);
-VMMR3_INT_DECL(int)     CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC);
+VMMR3_INT_DECL(int)     CSAMR3CheckCodeEx(PVM pVM, PCPUMCTX pCtx, RTRCPTR pInstrGC);
 VMMR3_INT_DECL(int)     CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned);
 VMMR3_INT_DECL(int)     CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu);

trunk/include/VBox/vmm/patm.h

@@ -155 +155 @@
 VMM_INT_DECL(bool)      PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
 VMM_INT_DECL(bool)      PATMAreInterruptsEnabled(PVM pVM);
-VMM_INT_DECL(bool)      PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore);
+VMM_INT_DECL(bool)      PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx);
 #ifdef PATM_EMULATE_SYSENTER
 VMM_INT_DECL(int)       PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu);

trunk/src/VBox/VMM/VMMAll/PATMAll.cpp

@@ -398 +398 @@
     PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(VMMGetCpu(pVM));
 
-    return PATMAreInterruptsEnabledByCtxCore(pVM, CPUMCTX2CORE(pCtx));
+    return PATMAreInterruptsEnabledByCtx(pVM, pCtx);
 }
 
@@ -408 +408 @@
  *
  * @param   pVM         Pointer to the VM.
- * @param   pCtxCore    CPU context
+ * @param   pCtx        The guest CPU context.
  * @todo CPUM should wrap this, EM.cpp shouldn't call us.
  */
-VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtxCore(PVM pVM, PCPUMCTXCORE pCtxCore)
+VMM_INT_DECL(bool) PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx)
 {
     if (PATMIsEnabled(pVM))
     {
         Assert(!HMIsEnabled(pVM));
-        if (PATMIsPatchGCAddr(pVM, pCtxCore->eip))
+        if (PATMIsPatchGCAddr(pVM, pCtx->eip))
             return false;
     }
-    return !!(pCtxCore->eflags.u32 & X86_EFL_IF);
+    return !!(pCtx->eflags.u32 & X86_EFL_IF);
 }
 

trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

@@ -516 +516 @@
         int         rc;
 
-        Assert(PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame));
+        Assert(PATMAreInterruptsEnabledByCtx(pVM, CPUMCTX_FROM_CORE(pRegFrame)));
         Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS));
 
@@ -841 +841 @@
     STAM_PROFILE_ADV_STOP(&pVM->trpm.s.CTX_SUFF_Z(StatForwardProf), a);
 
-    Log(("TRAP%02X: forwarding to REM (ss rpl=%d eflags=%08X VMIF=%d handler=%08X\n", iGate, pRegFrame->ss.Sel & X86_SEL_RPL, pRegFrame->eflags.u32, PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame), pVM->trpm.s.aGuestTrapHandler[iGate]));
+    Log(("TRAP%02X: forwarding to REM (ss rpl=%d eflags=%08X VMIF=%d handler=%08X\n", iGate, pRegFrame->ss.Sel & X86_SEL_RPL, pRegFrame->eflags.u32, PATMAreInterruptsEnabledByCtx(pVM, CPUMCTX_FROM_CORE(pRegFrame)), pVM->trpm.s.aGuestTrapHandler[iGate]));
 #endif
     return VINF_EM_RAW_GUEST_TRAP;

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -3704 +3704 @@
  * @param   pVCpu           Pointer to the VMCPU.
  * @param   pCpu            Pointer to the disassembler state.
- * @param   pRegFrame       Pointer to the register frame.
- */
-static int hmR0SvmInterpretInvlPgEx(PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame)
+ * @param   pCtx            The guest CPU context.
+ */
+static int hmR0SvmInterpretInvlPgEx(PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTX pCtx)
 {
     DISQPVPARAMVAL Param1;
     RTGCPTR        GCPtrPage;
 
-    int rc = DISQueryParamVal(pRegFrame, pCpu, &pCpu->Param1, &Param1, DISQPVWHICH_SRC);
+    int rc = DISQueryParamVal(CPUMCTX2CORE(pCtx), pCpu, &pCpu->Param1, &Param1, DISQPVWHICH_SRC);
     if (RT_FAILURE(rc))
         return VERR_EM_INTERPRETER;
@@ -3722 +3722 @@
 
         GCPtrPage = Param1.val.val64;
-        VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu, pRegFrame, GCPtrPage);
+        VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx), GCPtrPage);
         rc = VBOXSTRICTRC_VAL(rc2);
     }
@@ -3744 +3744 @@
  *
  * @param   pVM         Pointer to the VM.
- * @param   pRegFrame   Pointer to the register frame.
+ * @param   pCtx        The guest CPU context.
  *
  * @remarks Updates the RIP if the instruction was executed successfully.
  */
-static int hmR0SvmInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
+static int hmR0SvmInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
 {
     /* Only allow 32 & 64 bit code. */
@@ -3758 +3758 @@
             && pDis->pCurInstr->uOpcode == OP_INVLPG)
         {
-            rc = hmR0SvmInterpretInvlPgEx(pVCpu, pDis, pRegFrame);
+            rc = hmR0SvmInterpretInvlPgEx(pVCpu, pDis, pCtx);
             if (RT_SUCCESS(rc))
-                pRegFrame->rip += pDis->cbInstr;
+                pCtx->rip += pDis->cbInstr;
             return rc;
         }
@@ -4326 +4326 @@
 
     /** @todo Decode Assist. */
-    int rc = hmR0SvmInterpretInvlpg(pVM, pVCpu, CPUMCTX2CORE(pCtx));    /* Updates RIP if successful. */
+    int rc = hmR0SvmInterpretInvlpg(pVM, pVCpu, pCtx);    /* Updates RIP if successful. */
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInvlpg);
     Assert(rc == VINF_SUCCESS || rc == VERR_EM_INTERPRETER);

trunk/src/VBox/VMM/VMMR3/CSAM.cpp

@@ -2328 +2328 @@
  * @returns VBox status code.
  * @param   pVM         Pointer to the VM.
- * @param   pCtxCore    CPU context
- * @param   pInstrGC    Instruction pointer
- */
-VMMR3_INT_DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
+ * @param   pCtx        Guest CPU context.
+ * @param   pInstrGC    Instruction pointer.
+ */
+VMMR3_INT_DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTX pCtx, RTRCPTR pInstrGC)
 {
     Assert(!HMIsEnabled(pVM));
@@ -2345 +2345 @@
         Assert(CPUMGetGuestCodeBits(VMMGetCpu0(pVM)) == 32);
 
-        pInstrGC = SELMToFlat(pVM, DISSELREG_CS, pCtxCore, pInstrGC);
+        pInstrGC = SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pInstrGC);
         return CSAMR3CheckCode(pVM, pInstrGC);
     }

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -1716 +1716 @@
             Log(("Forced action VMCPU_FF_CSAM_SCAN_PAGE\n"));
 
-            CSAMR3CheckCodeEx(pVM, CPUMCTX2CORE(pCtx), pCtx->eip);
+            CSAMR3CheckCodeEx(pVM, pCtx, pCtx->eip);
             VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE);
         }

trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

@@ -618 +618 @@
     {
         Assert(!PATMIsPatchGCAddr(pVM, pCtx->eip));
-        CSAMR3CheckCodeEx(pVM, CPUMCTX2CORE(pCtx), pCtx->eip);
+        CSAMR3CheckCodeEx(pVM, pCtx, pCtx->eip);
     }
 
@@ -1444 +1444 @@
         {
             STAM_PROFILE_ADV_SUSPEND(&pVCpu->em.s.StatRAWEntry, b);
-            CSAMR3CheckCodeEx(pVM, CPUMCTX2CORE(pCtx), pCtx->eip);
+            CSAMR3CheckCodeEx(pVM, pCtx, pCtx->eip);
             STAM_PROFILE_ADV_RESUME(&pVCpu->em.s.StatRAWEntry, b);
             if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)

trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

@@ -246 +246 @@
         else if (    VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC)
                  && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
-                 &&  PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame)
+                 &&  PATMAreInterruptsEnabledByCtx(pVM, CPUMCTX_FROM_CORE(pRegFrame))
            )
         {