Changeset 55001 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Mar 29, 2015 4:59:20 PM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 99270
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r54908 r55001 3704 3704 * @param pVCpu Pointer to the VMCPU. 3705 3705 * @param pCpu Pointer to the disassembler state. 3706 * @param p RegFrame Pointer to the register frame.3707 */ 3708 static int hmR0SvmInterpretInvlPgEx(PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTX CORE pRegFrame)3706 * @param pCtx The guest CPU context. 3707 */ 3708 static int hmR0SvmInterpretInvlPgEx(PVMCPU pVCpu, PDISCPUSTATE pCpu, PCPUMCTX pCtx) 3709 3709 { 3710 3710 DISQPVPARAMVAL Param1; 3711 3711 RTGCPTR GCPtrPage; 3712 3712 3713 int rc = DISQueryParamVal( pRegFrame, pCpu, &pCpu->Param1, &Param1, DISQPVWHICH_SRC);3713 int rc = DISQueryParamVal(CPUMCTX2CORE(pCtx), pCpu, &pCpu->Param1, &Param1, DISQPVWHICH_SRC); 3714 3714 if (RT_FAILURE(rc)) 3715 3715 return VERR_EM_INTERPRETER; … … 3722 3722 3723 3723 GCPtrPage = Param1.val.val64; 3724 VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu, pRegFrame, GCPtrPage);3724 VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx), GCPtrPage); 3725 3725 rc = VBOXSTRICTRC_VAL(rc2); 3726 3726 } … … 3744 3744 * 3745 3745 * @param pVM Pointer to the VM. 3746 * @param p RegFrame Pointer to the register frame.3746 * @param pCtx The guest CPU context. 3747 3747 * 3748 3748 * @remarks Updates the RIP if the instruction was executed successfully. 3749 3749 */ 3750 static int hmR0SvmInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTX CORE pRegFrame)3750 static int hmR0SvmInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 3751 3751 { 3752 3752 /* Only allow 32 & 64 bit code. */ … … 3758 3758 && pDis->pCurInstr->uOpcode == OP_INVLPG) 3759 3759 { 3760 rc = hmR0SvmInterpretInvlPgEx(pVCpu, pDis, p RegFrame);3760 rc = hmR0SvmInterpretInvlPgEx(pVCpu, pDis, pCtx); 3761 3761 if (RT_SUCCESS(rc)) 3762 p RegFrame->rip += pDis->cbInstr;3762 pCtx->rip += pDis->cbInstr; 3763 3763 return rc; 3764 3764 } … … 4326 4326 4327 4327 /** @todo Decode Assist. */ 4328 int rc = hmR0SvmInterpretInvlpg(pVM, pVCpu, CPUMCTX2CORE(pCtx)); /* Updates RIP if successful. */4328 int rc = hmR0SvmInterpretInvlpg(pVM, pVCpu, pCtx); /* Updates RIP if successful. */ 4329 4329 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInvlpg); 4330 4330 Assert(rc == VINF_SUCCESS || rc == VERR_EM_INTERPRETER);
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