Changeset 55054 in vbox for trunk/src/VBox/VMM

Timestamp:

Mar 31, 2015 7:29:50 PM (10 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

99343

Message:

Removed support for host CPUs without FXSAVE/FXRSTOR support.

Location:

trunk/src/VBox/VMM

Files:

• VMMR3/CPUM.cpp (modified) (4 diffs)
• VMMR3/CPUMR3CpuId.cpp (modified) (2 diffs)
• VMMR3/VMMSwitcher.cpp (modified) (2 diffs)
• VMMRC/CPUMRCA.asm (modified) (2 diffs)
• VMMSwitcher/AMD64andLegacy.mac (modified) (1 diff)
• VMMSwitcher/PAEand32Bit.mac (modified) (2 diffs)
• include/CPUMInternal.h (modified) (2 diffs)
• include/VMMSwitcher.h (modified) (2 diffs)
• include/VMMSwitcher.mac (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -612 +612 @@
 
     /*
-     * Check that the CPU supports the minimum features we require.
+     * Gather info about the host CPU.
      */
     if (!ASMHasCpuId())
@@ -619 +619 @@
         return VERR_UNSUPPORTED_CPU;
     }
-    ASMCpuId_ECX_EDX(1, &pVM->cpum.s.CPUFeatures.ecx, &pVM->cpum.s.CPUFeatures.edx);
-    ASMCpuId_ECX_EDX(0x80000001, &pVM->cpum.s.CPUFeaturesExt.ecx, &pVM->cpum.s.CPUFeaturesExt.edx);
-
-    /* Setup the CR4 AND and OR masks used in the switcher */
-    /* Depends on the presence of FXSAVE(SSE) support on the host CPU */
-    if (!pVM->cpum.s.CPUFeatures.edx.u1FXSR)
-    {
-        Log(("The CPU doesn't support FXSAVE/FXRSTOR!\n"));
-        /* No FXSAVE implies no SSE */
-        pVM->cpum.s.CR4.AndMask = X86_CR4_PVI | X86_CR4_VME;
-        pVM->cpum.s.CR4.OrMask  = 0;
-    }
-    else
-    {
-        pVM->cpum.s.CR4.AndMask = X86_CR4_OSXMMEEXCPT | X86_CR4_PVI | X86_CR4_VME;
-        pVM->cpum.s.CR4.OrMask  = X86_CR4_OSFXSR;
-    }
-
-    if (!pVM->cpum.s.CPUFeatures.edx.u1MMX)
-    {
-        Log(("The CPU doesn't support MMX!\n"));
-        return VERR_UNSUPPORTED_CPU;
-    }
-    if (!pVM->cpum.s.CPUFeatures.edx.u1TSC)
-    {
-        Log(("The CPU doesn't support TSC!\n"));
-        return VERR_UNSUPPORTED_CPU;
-    }
-    /* Bogus on AMD? */
-    if (!pVM->cpum.s.CPUFeatures.edx.u1SEP)
-        Log(("The CPU doesn't support SYSENTER/SYSEXIT!\n"));
-
-    /*
-     * Gather info about the host CPU.
-     */
+
     PCPUMCPUIDLEAF  paLeaves;
     uint32_t        cLeaves;
@@ -663 +629 @@
     AssertLogRelRCReturn(rc, rc);
     pVM->cpum.s.GuestFeatures.enmCpuVendor = pVM->cpum.s.HostFeatures.enmCpuVendor;
+
+    /*
+     * Check that the CPU supports the minimum features we require.
+     */
+    if (!pVM->cpum.s.HostFeatures.fFxSaveRstor)
+        return VMSetError(pVM, VERR_UNSUPPORTED_CPU, RT_SRC_POS, "Host CPU does not support the FXSAVE/FXRSTOR instruction.");
+    if (!pVM->cpum.s.HostFeatures.fMmx)
+        return VMSetError(pVM, VERR_UNSUPPORTED_CPU, RT_SRC_POS, "Host CPU does not support MMX.");
+    if (!pVM->cpum.s.HostFeatures.fTsc)
+        return VMSetError(pVM, VERR_UNSUPPORTED_CPU, RT_SRC_POS, "Host CPU does not support RDTSC.");
+
+    /* Bogus on AMD? */
+    if (!pVM->cpum.s.CPUFeatures.edx.u1SEP)
+        Log(("The CPU doesn't support SYSENTER/SYSEXIT!\n"));
+
+    /*
+     * Setup the CR4 AND and OR masks used in the switcher
+     */
+    pVM->cpum.s.CR4.AndMask = X86_CR4_OSXMMEEXCPT | X86_CR4_PVI | X86_CR4_VME;
+    pVM->cpum.s.CR4.OrMask  = X86_CR4_OSFXSR;
 
     /*
@@ -684 +670 @@
 
         pVCpu->cpum.s.Host.pXStateR3  = (PX86XSAVEAREA)pbXStates;
-        pVCpu->cpum.s.Host.pXStateR0 = MMHyperR3ToR0(pVM, pbXStates);
-        pVCpu->cpum.s.Host.pXStateRC = MMHyperR3ToR0(pVM, pbXStates);
+        pVCpu->cpum.s.Host.pXStateR0  = MMHyperR3ToR0(pVM, pbXStates);
+        pVCpu->cpum.s.Host.pXStateRC  = MMHyperR3ToR0(pVM, pbXStates);
         pbXStates += cbMaxXState;
 

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

@@ -1538 +1538 @@
         pFeatures->fPat                 = RT_BOOL(paLeaves[1].uEdx & X86_CPUID_FEATURE_EDX_PAT);
         pFeatures->fFxSaveRstor         = RT_BOOL(paLeaves[1].uEdx & X86_CPUID_FEATURE_EDX_FXSR);
+        pFeatures->fMmx                 = RT_BOOL(paLeaves[1].uEdx & X86_CPUID_FEATURE_EDX_MMX);
+        pFeatures->fTsc                 = RT_BOOL(paLeaves[1].uEcx & X86_CPUID_FEATURE_EDX_TSC);
         pFeatures->fSysEnter            = RT_BOOL(paLeaves[1].uEdx & X86_CPUID_FEATURE_EDX_SEP);
         pFeatures->fHypervisorPresent   = RT_BOOL(paLeaves[1].uEcx & X86_CPUID_FEATURE_ECX_HVP);
@@ -1572 +1574 @@
             pFeatures->fPat            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PAT);
             pFeatures->fFxSaveRstor    |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_FXSR);
+            pFeatures->fMmx            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_MMX);
+            pFeatures->fTsc            |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_TSC);
         }
 

trunk/src/VBox/VMM/VMMR3/VMMSwitcher.cpp

@@ -690 +690 @@
             }
 
+#if 0 /* Reusable for XSAVE. */
             /*
              * Insert relative jump to specified target it FXSAVE/FXRSTOR isn't supported by the cpu.
@@ -709 +710 @@
                 break;
             }
+#endif
 
             /*

trunk/src/VBox/VMM/VMMRC/CPUMRCA.asm

@@ -144 +144 @@
 
         mov     pXState, [pCpumCpu + CPUMCPU.Host.pXStateRC]
-        mov     eax, pCpumCpu           ; Calculate the PCPUM pointer
-        sub     eax, [pCpumCpu + CPUMCPU.offCPUM]
-        test    dword [eax + CPUM.CPUFeatures.edx], X86_CPUID_FEATURE_EDX_FXSR
-        jz short hlfpua_no_fxsave
-
         fxsave  [pXState]
         mov     pXState, [pCpumCpu + CPUMCPU.Guest.pXStateRC]
@@ -164 +159 @@
         xor     eax, eax
         ret
-
-        ;
-        ; Legacy CPU support.
-        ;
-hlfpua_no_fxsave:
-        fnsave  [pXState]
-        mov     pXState, [pCpumCpu + CPUMCPU.Guest.pXStateRC]
-        mov     eax, [pXState]          ; control word
-        not     eax                     ; 1 means exception ignored (6 LS bits)
-        and     eax, byte 03Fh          ; 6 LS bits only
-        test    eax, [pXState + 4]      ; status word
-        jz short hlfpua_no_exceptions_pending
-        ; Technically incorrect, but we certainly don't want any exceptions now!!
-        and     dword [pXState + 4], ~03Fh
-hlfpua_no_exceptions_pending:
-        frstor  [pXState]
-        jmp near hlfpua_finished_switch
 
         ;

trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac

@@ -565 +565 @@
     ;
     ; CR4.AndMask and CR4.OrMask are set in CPUMR3Init based on the presence of
-    ; FXSAVE support on the host CPU
+    ; FXSAVE and XSAVE support on the host CPU
     ;
     and     ecx, [rdx + CPUM.CR4.AndMask]

trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac

@@ -420 +420 @@
     ;
     ; CR4.AndMask and CR4.OrMask are set in CPUMR3Init based on the presence of
-    ; FXSAVE support on the host CPU
+    ; FXSAVE and XSAVE support on the host CPU
     ;
     CPUM_FROM_CPUMCPU(edx)
@@ -992 +992 @@
     mov     eax, [edx + CPUMCPU.Guest.pXStateR0]
     mov     ecx, [edx + CPUMCPU.Host.pXStateR0]
-    FIXUP FIX_NO_FXSAVE_JMP, 0, gth_no_fxsave - NAME(Start) ; this will insert a jmp gth_no_fxsave if fxsave isn't supported.
     fxsave  [eax]
     fxrstor [ecx]
-    jmp near gth_fpu_no
-
-gth_no_fxsave:
-    fnsave  [eax]
-    mov     eax, [ecx]                  ; control word
-    not     eax                         ; 1 means exception ignored (6 LS bits)
-    and     eax, byte 03Fh              ; 6 LS bits only
-    test    eax, [ecx + 4]              ; status word
-    jz      gth_no_exceptions_pending
-
-    ; technically incorrect, but we certainly don't want any exceptions now!!
-    and     dword [ecx + 4], ~03Fh
-
-gth_no_exceptions_pending:
-    frstor  [ecx]
-    jmp short gth_fpu_no
-
-ALIGNCODE(16)
-gth_fpu_no:
 
     ; Control registers.

trunk/src/VBox/VMM/include/CPUMInternal.h

@@ -187 +187 @@
     /** Supports the FXSAVE and FXRSTOR instructions. */
     uint32_t        fFxSaveRstor : 1;
+    /** Supports MMX. */
+    uint32_t        fMmx : 1;
+    /** Supports RDTSC. */
+    uint32_t        fTsc : 1;
     /** Intel SYSENTER/SYSEXIT support */
     uint32_t        fSysEnter : 1;
@@ -217 +221 @@
 
     /** Alignment padding. */
-    uint32_t        fPadding : 8;
+    uint32_t        fPadding : 12;
 
     uint64_t        auPadding[2];

trunk/src/VBox/VMM/include/VMMSwitcher.h

@@ -5 +5 @@
 
 /*
- * Copyright (C) 2006-2012 Oracle Corporation
+ * Copyright (C) 2006-2015 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
@@ -43 +43 @@
 #define FIX_HYPER_TSS           20
 #define FIX_GC_TSS_GDTE_DW2     21
-#define FIX_NO_FXSAVE_JMP       24
+/*#define FIX_NO_FXSAVE_JMP       24 - reusable */
 #define FIX_NO_SYSENTER_JMP     25
 #define FIX_NO_SYSCALL_JMP      26

trunk/src/VBox/VMM/include/VMMSwitcher.mac

@@ -5 +5 @@
 
 ;
-; Copyright (C) 2006-2013 Oracle Corporation
+; Copyright (C) 2006-2015 Oracle Corporation
 ;
 ; This file is part of VirtualBox Open Source Edition (OSE), as
@@ -85 +85 @@
 %define FIX_HYPER_TSS           20
 %define FIX_GC_TSS_GDTE_DW2     21
-%define FIX_NO_FXSAVE_JMP       24
+;%define FIX_NO_FXSAVE_JMP       24 - reusable
 %define FIX_NO_SYSENTER_JMP     25
 %define FIX_NO_SYSCALL_JMP      26