Changeset 55106 in vbox for trunk/src/VBox/VMM/include
- Timestamp:
- Apr 6, 2015 7:58:37 PM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 99401
- Location:
- trunk/src/VBox/VMM/include
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/include/CPUMInternal.h
r55062 r55106 410 410 411 411 /* padding to get 64byte aligned size */ 412 uint8_t auPadding[ 16+20];412 uint8_t auPadding[20]; 413 413 414 414 #elif HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 456 456 /* padding to get 32byte aligned size */ 457 457 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL 458 uint8_t auPadding[52]; 459 # else 458 460 uint8_t auPadding[4]; 459 # else460 uint8_t auPadding[8+12];461 461 # endif 462 462 … … 471 471 /** Pointer to the FPU/SSE/AVX/XXXX state ring-3 mapping. */ 472 472 R3PTRTYPE(PX86XSAVEAREA) pXStateR3; 473 /** The XCR0 register. */ 474 uint64_t xcr0; 475 /** The mask to pass to XSAVE/XRSTOR in EDX:EAX. If zero we use 476 * FXSAVE/FXRSTOR (since bit 0 will always be set, we only need to test it). */ 477 uint64_t fXStateMask; 473 478 } CPUMHOSTCTX; 474 479 AssertCompileSizeAlignment(CPUMHOSTCTX, 64); -
trunk/src/VBox/VMM/include/CPUMInternal.mac
r55062 r55106 217 217 .Guest.msrKERNELGSBASE resb 8 218 218 .Guest.msrApicBase resb 8 219 .Guest.pXStateR0 RTR0PTR_RES 1 220 .Guest.pXStateR3 RTR3PTR_RES 1 221 .Guest.pXStateRC RTRCPTR_RES 1 219 .Guest.xcr0 resq 1 220 .Guest.fXStateMask resq 1 221 .Guest.pXStateR0 RTR0PTR_RES 1 222 .Guest.pXStateR3 RTR3PTR_RES 1 223 .Guest.pXStateRC RTRCPTR_RES 1 224 .Guest.aoffXState resw 64 222 225 223 226 alignb 64 … … 324 327 .Host.SysEnter.esp resq 1 325 328 .Host.efer resq 1 326 .Host.auPadding resb ( 16+20)329 .Host.auPadding resb (20) 327 330 328 331 %else ; 64-bit … … 357 360 .Host.efer resq 1 358 361 %if fVBOX_WITH_HYBRID_32BIT_KERNEL 362 .Host.auPadding resb 54 363 %else 359 364 .Host.auPadding resb 4 360 %else361 .Host.auPadding resb (8+12)362 365 %endif 363 366 %endif ; 64-bit … … 366 369 .Host.pXStateR0 RTR0PTR_RES 1 367 370 .Host.pXStateR3 RTR3PTR_RES 1 371 alignb 8 372 .Host.xcr0 resq 1 373 .Host.fXStateMask resq 1 368 374 369 375 ; … … 470 476 .Hyper.msrKERNELGSBASE resb 8 471 477 .Hyper.msrApicBase resb 8 472 .Hyper.pXStateR0 RTR0PTR_RES 1 473 .Hyper.pXStateR3 RTR3PTR_RES 1 474 .Hyper.pXStateRC RTRCPTR_RES 1 478 .Hyper.xcr0 resq 1 479 .Hyper.fXStateMask resq 1 480 .Hyper.pXStateR0 RTR0PTR_RES 1 481 .Hyper.pXStateR3 RTR3PTR_RES 1 482 .Hyper.pXStateRC RTRCPTR_RES 1 483 .Hyper.aoffXState resw 64 475 484 alignb 64 476 485
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