Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c

Timestamp:

Oct 28, 2015 8:17:18 PM (9 years ago)

Author:

vboxsync

Message:

EFI/Firmware: 'svn merge ^{/vendor/edk2/UDK2010.SR1} /vendor/edk2/current .', reverting and removing files+dirs listed in ReadMe.vbox, resolving conflicts with help from ../UDK2014.SP1/. This is a raw untested merge.

Location:

trunk/src/VBox/Devices/EFI/Firmware

Files:

• . (modified) (1 prop)
• MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c (modified) (13 diffs)

trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c

@@ -2 +2 @@
   Internal library implementation for PCI Bus module.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -183 +183 @@
   if ((BridgeResource != NULL) && (BridgeResource->Length != 0)) {
     DEBUG ((
-      EFI_D_INFO, "Type = %s; Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x\n",
+      EFI_D_INFO, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
       mBarTypeStr[MIN (BridgeResource->ResType, PciBarTypeMaxType)],
       BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress,
@@ -196 +196 @@
         Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar;
         DEBUG ((
-          EFI_D_INFO, " Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x;\tOwner = %s ",
+          EFI_D_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s ",
           Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment,
           IS_PCI_BRIDGE (&Resource->PciDev->Pci)     ? L"PPB" :
@@ -226 +226 @@
         }
       } else {
-        DEBUG ((EFI_D_INFO, " Padding:Length = 0x%x;\tAlignment = 0x%x\n", Resource->Length, Resource->Alignment));
+        DEBUG ((EFI_D_INFO, " Padding:Length = 0x%lx;\tAlignment = 0x%lx\n", Resource->Length, Resource->Alignment));
       }
     }
@@ -291 +291 @@
   PCI_RESOURCE_NODE                *ChildMem64Node;
   PCI_RESOURCE_NODE                *ChildPMem64Node;
-  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *ToText;
   CHAR16                           *Str;
 
@@ -310 +309 @@
       ));
   } else {
-    Status = gBS->LocateProtocol (
-                    &gEfiDevicePathToTextProtocolGuid,
-                    NULL,
-                    (VOID **) &ToText
-                    );
-    Str = NULL;
-    if (!EFI_ERROR (Status)) {
-      Str = ToText->ConvertDevicePathToText (
-                      DevicePathFromHandle (Bridge->Handle),
-                      FALSE,
-                      FALSE
-                      );
-    }
+    Str = ConvertDevicePathToText (
+            DevicePathFromHandle (Bridge->Handle),
+            FALSE,
+            FALSE
+            );
     DEBUG ((EFI_D_INFO, "Root Bridge %s\n", Str != NULL ? Str : L""));
     if (Str != NULL) {
@@ -569 +560 @@
                                 AcpiConfig
                                 );
+        //
+        // If SubmitResources returns error, PciBus isn't able to start.
+        // It's a fatal error so assertion is added.
+        //
+        DEBUG ((EFI_D_INFO, "PciBus: HostBridge->SubmitResources() - %r\n", Status));
+        ASSERT_EFI_ERROR (Status);
       }
 
@@ -599 +596 @@
     //
     Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeAllocateResources);
+    DEBUG ((EFI_D_INFO, "PciBus: HostBridge->NotifyPhase(AllocateResources) - %r\n", Status));
     if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport)) {
       //
@@ -753 +751 @@
   // Notify pci bus driver starts to program the resource
   //
-  NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);
+  Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);
+
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
 
   RootBridgeDev     = NULL;
@@ -892 +894 @@
   // Notify the resource allocation phase is to end
   //
-  NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);
-
-  return EFI_SUCCESS;
+  Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);
+
+  return Status;
 }
 
@@ -1437 +1439 @@
   // Notify the bus allocation phase is about to start
   //
-  NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+  Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
 
   DEBUG((EFI_D_INFO, "PCI Bus First Scanning\n"));
@@ -1525 +1531 @@
     // Notify the bus allocation phase is about to start for the 2nd time
     //
-    NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+    Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);
+
+    if (EFI_ERROR (Status)) {
+      return Status;
+    }
 
     DEBUG((EFI_D_INFO, "PCI Bus Second Scanning\n"));
@@ -1563 +1573 @@
   // Notify the resource allocation phase is to start
   //
-  NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);
+  Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);
+
+  if (EFI_ERROR (Status)) {
+    return Status;
+  }
 
   RootBridgeHandle = NULL;