Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c

Timestamp:

Oct 28, 2015 8:17:18 PM (9 years ago)

Author:

vboxsync

Message:

EFI/Firmware: 'svn merge ^{/vendor/edk2/UDK2010.SR1} /vendor/edk2/current .', reverting and removing files+dirs listed in ReadMe.vbox, resolving conflicts with help from ../UDK2014.SP1/. This is a raw untested merge.

Location:

trunk/src/VBox/Devices/EFI/Firmware

Files:

• . (modified) (1 prop)
• MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c (modified) (40 diffs)

trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c

@@ -2 +2 @@
   The XHCI controller driver.
 
-Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -33 +33 @@
 };
 
+USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
+  {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
+  {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
+  {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
+  {XHC_PORTSC_PRC, EfiUsbPortResetChange}
+};
+
 USB_PORT_STATE_MAP  mUsbHubPortStateMap[] = {
   {XHC_HUB_PORTSC_CCS,   USB_PORT_STAT_CONNECTION},
@@ -45 +52 @@
   {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
   {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
+};
+
+USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
+  {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
+  {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
+  {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
+  {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
+  {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
 };
 
@@ -144 +159 @@
   EFI_TPL            OldTpl;
 
+  Xhc = XHC_FROM_THIS (This);
+  
+  if (Xhc->DevicePath != NULL) {
+    //
+    // Report Status Code to indicate reset happens
+    //
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (
+      EFI_PROGRESS_CODE,
+      (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
+      Xhc->DevicePath
+      );
+  }  
+
   OldTpl = gBS->RaiseTPL (XHC_TPL);
-
-  Xhc    = XHC_FROM_THIS (This);
 
   switch (Attributes) {
@@ -154 +180 @@
   //
   case EFI_USB_HC_RESET_HOST_CONTROLLER:
+    if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
+        ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
+      Status = EFI_SUCCESS;
+      goto ON_EXIT;
+    }
     //
     // Host Controller must be Halt when Reset it
@@ -417 +448 @@
   }
 
+  MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
+
+  for (Index = 0; Index < MapSize; Index++) {
+    if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
+      XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
+    }
+  }
+
   //
   // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
@@ -454 +493 @@
   UINT32                  State;
   UINT32                  TotalPort;
-  UINT8                   SlotId;
-  USB_DEV_ROUTE           RouteChart;
   EFI_STATUS              Status;
   EFI_TPL                 OldTpl;
@@ -511 +548 @@
     }
 
-    RouteChart.Route.RouteString = 0;
-    RouteChart.Route.RootPortNum = PortNumber + 1;
-    RouteChart.Route.TierNum     = 1;
-    //
-    // If the port reset operation happens after the usb super speed device is enabled,
-    // The subsequent configuration, such as getting device descriptor, will fail.
-    // So here a workaround is introduced to skip the reset operation if the device is enabled.
-    //
-    SlotId = XhcRouteStringToSlotId (Xhc, RouteChart);
-    if (SlotId == 0) {
-      //
-      // 4.3.1 Resetting a Root Hub Port
-      // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
-      //
-      State |= XHC_PORTSC_RESET;
-      XhcWriteOpReg (Xhc, Offset, State);
-      XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
-    }
+    //
+    // 4.3.1 Resetting a Root Hub Port
+    // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
+    //
+    State |= XHC_PORTSC_RESET;
+    XhcWriteOpReg (Xhc, Offset, State);
+    XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
     break;
 
@@ -748 +774 @@
   EFI_USB_PORT_STATUS     PortStatus;
   UINT32                  State;
+  EFI_USB_DEVICE_REQUEST  ClearPortRequest;
+  UINTN                   Len;
 
   //
@@ -793 +821 @@
   Status          = EFI_DEVICE_ERROR;
   *TransferResult = EFI_USB_ERR_SYSTEM;
+  Len             = 0;
 
   if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
@@ -824 +853 @@
       }
     }
+
+    if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
+      Status = EFI_DEVICE_ERROR;
+      goto ON_EXIT;
+    }
     //
     // The actual device address has been assigned by XHCI during initializing the device slot.
@@ -833 +867 @@
     Status = EFI_SUCCESS;
     goto ON_EXIT;
-  }
-  
-  //
-  // If the port reset operation happens after the usb super speed device is enabled,
-  // The subsequent configuration, such as getting device descriptor, will fail.
-  // So here a workaround is introduced to skip the reset operation if the device is enabled.
-  //
-  if ((Request->Request     == USB_REQ_SET_FEATURE) &&
-      (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)) &&
-      (Request->Value       == EfiUsbPortReset)) {
-    if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
-      Status = EFI_SUCCESS;
-      goto ON_EXIT;
-    }
   }
 
@@ -890 +910 @@
   } else if (*TransferResult == EFI_USB_ERR_STALL) {
     RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
-    ASSERT_EFI_ERROR (RecoveryStatus);
+    if (EFI_ERROR (RecoveryStatus)) {
+      DEBUG ((EFI_D_ERROR, "XhcControlTransfer: XhcRecoverHaltedEndpoint failed\n"));
+    }
     Status = EFI_DEVICE_ERROR;
     goto FREE_URB;
@@ -897 +919 @@
   }
 
+  Xhc->PciIo->Flush (Xhc->PciIo);
+  
+  if (Urb->DataMap != NULL) {
+    Status = Xhc->PciIo->Unmap (Xhc->PciIo, Urb->DataMap);
+    ASSERT_EFI_ERROR (Status);
+    if (EFI_ERROR (Status)) {
+      Status = EFI_DEVICE_ERROR;
+      goto FREE_URB;
+    }  
+  }
+
   //
   // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
@@ -906 +939 @@
       ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
     DescriptorType = (UINT8)(Request->Value >> 8);
-    if ((DescriptorType == USB_DESC_TYPE_DEVICE) && (*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR))) {
+    if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
         ASSERT (Data != NULL);
         //
@@ -926 +959 @@
           Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
         }
-        ASSERT_EFI_ERROR (Status);
     } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
       ASSERT (Data != NULL);
@@ -937 +969 @@
         Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
         CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
+        //
+        // Default to use AlternateSetting 0 for all interfaces.
+        //
+        Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
       }
     } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
@@ -962 +998 @@
         Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
       }
-      ASSERT_EFI_ERROR (Status);
     }
   } else if ((Request->Request     == USB_REQ_SET_CONFIG) &&
@@ -976 +1011 @@
           Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
         }
-        ASSERT_EFI_ERROR (Status);
         break;
+      }
+    }
+  } else if ((Request->Request     == USB_REQ_SET_INTERFACE) &&
+             (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
+    //
+    // Hook Set_Interface request from UsbBus as we need configure interface setting.
+    // Request->Value indicates AlterlateSetting to set
+    // Request->Index indicates Interface to set
+    //
+    if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
+      if (Xhc->HcCParams.Data.Csz == 0) {
+        Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
+      } else {
+        Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
       }
     }
@@ -997 +1045 @@
         PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
       }
-    } else if (DeviceSpeed == EFI_USB_SPEED_HIGH) {
+    } else {
       //
-      // For high speed hub, its bit9~10 presents the attached device speed.
+      // For high or full/low speed hub, its bit9~10 presents the attached device speed.
       //
       if (XHC_BIT_IS_SET (State, BIT9)) {
@@ -1006 +1054 @@
         PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
       }
-    } else {
-      ASSERT (0);
     }
 
@@ -1024 +1070 @@
       if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
         PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
+      }
+    }
+
+    MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
+
+    for (Index = 0; Index < MapSize; Index++) {
+      if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
+        ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
+        ClearPortRequest.RequestType  = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
+        ClearPortRequest.Request      = (UINT8) USB_REQ_CLEAR_FEATURE;
+        ClearPortRequest.Value        = mUsbHubClearPortChangeMap[Index].Selector;
+        ClearPortRequest.Index        = Request->Index;
+        ClearPortRequest.Length       = 0;
+
+        XhcControlTransfer (
+          This, 
+          DeviceAddress,
+          DeviceSpeed,
+          MaximumPacketLength,
+          &ClearPortRequest,
+          EfiUsbNoData,
+          NULL,
+          &Len,
+          Timeout,
+          Translator,
+          TransferResult
+          );
       }
     }
@@ -1173 +1246 @@
   } else if (*TransferResult == EFI_USB_ERR_STALL) {
     RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
-    ASSERT_EFI_ERROR (RecoveryStatus);
+    if (EFI_ERROR (RecoveryStatus)) {
+      DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: XhcRecoverHaltedEndpoint failed\n"));
+    }
     Status = EFI_DEVICE_ERROR;
   }
 
-  FreePool (Urb);
+  Xhc->PciIo->Flush (Xhc->PciIo);
+  XhcFreeUrb (Xhc, Urb);
 
 ON_EXIT:
@@ -1343 +1419 @@
 
 ON_EXIT:
+  Xhc->PciIo->Flush (Xhc->PciIo);
   gBS->RestoreTPL (OldTpl);
 
@@ -1470 +1547 @@
   } else if (*TransferResult == EFI_USB_ERR_STALL) {
     RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
-    ASSERT_EFI_ERROR (RecoveryStatus);
+    if (EFI_ERROR (RecoveryStatus)) {
+      DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcRecoverHaltedEndpoint failed\n"));
+    }
     Status = EFI_DEVICE_ERROR;
   }
 
-  FreePool (Urb);
+  Xhc->PciIo->Flush (Xhc->PciIo);
+  XhcFreeUrb (Xhc, Urb);
 
 ON_EXIT:
@@ -1674 +1754 @@
 
   @param  PciIo                  The PciIo on this device.
+  @param  DevicePath             The device path of host controller.
   @param  OriginalPciAttributes  Original PCI attributes.
 
@@ -1682 +1763 @@
 USB_XHCI_INSTANCE*
 XhcCreateUsbHc (
-  IN EFI_PCI_IO_PROTOCOL  *PciIo,
-  IN UINT64               OriginalPciAttributes
+  IN EFI_PCI_IO_PROTOCOL       *PciIo,
+  IN EFI_DEVICE_PATH_PROTOCOL  *DevicePath,
+  IN UINT64                    OriginalPciAttributes
   )
 {
@@ -1702 +1784 @@
   Xhc->Signature             = XHCI_INSTANCE_SIG;
   Xhc->PciIo                 = PciIo;
+  Xhc->DevicePath            = DevicePath;
   Xhc->OriginalPciAttributes = OriginalPciAttributes;
   CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
@@ -1727 +1810 @@
   ExtCapReg            = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
   Xhc->ExtCapRegBase   = ExtCapReg << 2;
-  Xhc->UsbLegSupOffset = XhcGetLegSupCapAddr (Xhc);
+  Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
+  Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
 
   DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
@@ -1736 +1820 @@
   DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
   DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
+  DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
 
   //
@@ -1763 +1848 @@
 
   @param  Event                   Pointer to this event
-  @param  Context                 Event hanlder private data
+  @param  Context                 Event handler private data
 
 **/
@@ -1791 +1876 @@
   }
 
+  XhcClearBiosOwnership (Xhc);
+
   //
   // Restore original PCI attributes
@@ -1800 +1887 @@
                   NULL
                   );
-
-  XhcClearBiosOwnership (Xhc);
 }
 
@@ -1831 +1916 @@
   BOOLEAN                 PciAttributesSaved;
   USB_XHCI_INSTANCE       *Xhc;
+  EFI_DEVICE_PATH_PROTOCOL  *HcDevicePath;
 
   //
@@ -1848 +1934 @@
   }
 
+  //
+  // Open Device Path Protocol for on USB host controller
+  //
+  HcDevicePath = NULL;
+  Status = gBS->OpenProtocol (
+                  Controller,
+                  &gEfiDevicePathProtocolGuid,
+                  (VOID **) &HcDevicePath,
+                  This->DriverBindingHandle,
+                  Controller,
+                  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+                  );
+
   PciAttributesSaved = FALSE;
   //
@@ -1871 +1970 @@
                     );
   if (!EFI_ERROR (Status)) {
-    Supports &= EFI_PCI_DEVICE_ENABLE;
+    Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
     Status = PciIo->Attributes (
                       PciIo,
@@ -1888 +1987 @@
   // Create then install USB2_HC_PROTOCOL
   //
-  Xhc = XhcCreateUsbHc (PciIo, OriginalPciAttributes);
+  Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
 
   if (Xhc == NULL) {
@@ -2049 +2148 @@
   }
 
-  Xhc   = XHC_FROM_THIS (Usb2Hc);
-  PciIo = Xhc->PciIo;
-
-  //
-  // Stop AsyncRequest Polling timer then stop the XHCI driver
-  // and uninstall the XHCI protocl.
-  //
-  gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
-
-  //
-  // Disable the device slots occupied by these devices on its downstream ports.
-  // Entry 0 is reserved.
-  //
-  for (Index = 0; Index < 255; Index++) {
-    if (!Xhc->UsbDevContext[Index + 1].Enabled ||
-        (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
-      continue;
-    }
-    if (Xhc->HcCParams.Data.Csz == 0) {
-      XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
-    } else {
-      XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
-    }
-  }
-
-  XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
-  XhcClearBiosOwnership (Xhc);
-
   Status = gBS->UninstallProtocolInterface (
                   Controller,
@@ -2087 +2158 @@
   }
 
+  Xhc   = XHC_FROM_THIS (Usb2Hc);
+  PciIo = Xhc->PciIo;
+
+  //
+  // Stop AsyncRequest Polling timer then stop the XHCI driver
+  // and uninstall the XHCI protocl.
+  //
+  gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
+
+  //
+  // Disable the device slots occupied by these devices on its downstream ports.
+  // Entry 0 is reserved.
+  //
+  for (Index = 0; Index < 255; Index++) {
+    if (!Xhc->UsbDevContext[Index + 1].Enabled ||
+        (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
+      continue;
+    }
+    if (Xhc->HcCParams.Data.Csz == 0) {
+      XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
+    } else {
+      XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
+    }
+  }
+
   if (Xhc->PollTimer != NULL) {
     gBS->CloseEvent (Xhc->PollTimer);
@@ -2095 +2191 @@
   }
 
+  XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
+  XhcClearBiosOwnership (Xhc);
   XhciDelAllAsyncIntTransfers (Xhc);
   XhcFreeSched (Xhc);