Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c

Timestamp:

Oct 28, 2015 8:17:18 PM (9 years ago)

Author:

vboxsync

Message:

EFI/Firmware: 'svn merge ^{/vendor/edk2/UDK2010.SR1} /vendor/edk2/current .', reverting and removing files+dirs listed in ReadMe.vbox, resolving conflicts with help from ../UDK2014.SP1/. This is a raw untested merge.

Location:

trunk/src/VBox/Devices/EFI/Firmware

Files:

• . (modified) (1 prop)
• MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c (modified) (14 diffs)

trunk/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c

@@ -3 +3 @@
   The XHCI register operation routines.
 
-Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -500 +500 @@
   @param  Bit          The bit of the register to wait for.
   @param  WaitToSet    Wait the bit to set or clear.
-  @param  Timeout      The time to wait before abort (in millisecond, ms).
+  @param  Timeout      The time to wait before abort (in microsecond, us).
 
   @retval EFI_SUCCESS  The bit successfully changed by host controller.
@@ -518 +518 @@
   UINTN                   Loop;
 
-  Loop   = (Timeout * XHC_1_MILLISECOND / XHC_POLL_DELAY) + 1;
+  Loop   = (Timeout / XHC_POLL_DELAY) + 1;
 
   for (Index = 0; Index < Loop; Index++) {
@@ -544 +544 @@
   UINT32                    Buffer;
 
+  if (Xhc->UsbLegSupOffset == 0xFFFFFFFF) {
+    return;
+  }
+
   DEBUG ((EFI_D_INFO, "XhcSetBiosOwnership: called to set BIOS ownership\n"));
 
@@ -564 +568 @@
   UINT32                    Buffer;
 
+  if (Xhc->UsbLegSupOffset == 0xFFFFFFFF) {
+    return;
+  }
+
   DEBUG ((EFI_D_INFO, "XhcClearBiosOwnership: called to clear BIOS ownership\n"));
 
@@ -572 +580 @@
 
 /**
-  Calculate the XHCI legacy support capability register offset.
+  Calculate the offset of the XHCI capability.
 
   @param  Xhc     The XHCI Instance.
+  @param  CapId   The XHCI Capability ID.
 
   @return The offset of XHCI legacy support capability register.
@@ -580 +589 @@
 **/
 UINT32
-XhcGetLegSupCapAddr (
-  IN USB_XHCI_INSTANCE    *Xhc
+XhcGetCapabilityAddr (
+  IN USB_XHCI_INSTANCE    *Xhc,
+  IN UINT8                CapId
   )
 {
@@ -595 +605 @@
     //
     Data = XhcReadExtCapReg (Xhc, ExtCapOffset);
-    if ((Data & 0xFF) == 0x1) {
+    if ((Data & 0xFF) == CapId) {
       return ExtCapOffset;
     }
@@ -605 +615 @@
   } while (NextExtCapReg != 0);
 
-  return 0;
+  return 0xFFFFFFFF;
 }
 
@@ -647 +657 @@
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in millisecond, ms).
+  @param  Timeout      Time to wait before abort (in microsecond, us).
 
   @retval EFI_SUCCESS  The XHCI host controller is reset.
@@ -660 +670 @@
 {
   EFI_STATUS              Status;
+
+  Status = EFI_SUCCESS;
 
   DEBUG ((EFI_D_INFO, "XhcResetHC!\n"));
@@ -673 +685 @@
   }
 
-  XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET);
-  Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, FALSE, Timeout);
+  if ((Xhc->DebugCapSupOffset == 0xFFFFFFFF) || ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) != XHC_CAP_USB_DEBUG) ||
+      ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) == 0)) {
+    XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET);
+    Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET, FALSE, Timeout);
+  }
+
   return Status;
 }
@@ -683 +699 @@
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in millisecond, ms).
+  @param  Timeout      Time to wait before abort (in microsecond, us).
 
   @return EFI_SUCCESS  The XHCI host controller is halt.
@@ -707 +723 @@
 
   @param  Xhc          The XHCI Instance.
-  @param  Timeout      Time to wait before abort (in millisecond, ms).
+  @param  Timeout      Time to wait before abort (in microsecond, us).
 
   @return EFI_SUCCESS  The XHCI host controller is running.