Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c
- Timestamp:
- Oct 28, 2015 8:17:18 PM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 2 edited
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- Removed
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trunk/src/VBox/Devices/EFI/Firmware
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Property svn:mergeinfo
set to (toggle deleted branches)
/vendor/edk2/current 103735-103757
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Property svn:mergeinfo
set to (toggle deleted branches)
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trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/SmmPciLibPciRootBridgeIo/PciLib.c
r48674 r58459 2 2 PCI Library using SMM PCI Root Bridge I/O Protocol. 3 3 4 Copyright (c) 2009 - 201 0, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials are 6 6 licensed and made available under the terms and conditions of … … 363 363 If EndBit is greater than 7, then ASSERT(). 364 364 If EndBit is less than StartBit, then ASSERT(). 365 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 365 366 366 367 @param Address The PCI configuration register to write. … … 404 405 If EndBit is greater than 7, then ASSERT(). 405 406 If EndBit is less than StartBit, then ASSERT(). 407 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 406 408 407 409 @param Address The PCI configuration register to write. … … 445 447 If EndBit is greater than 7, then ASSERT(). 446 448 If EndBit is less than StartBit, then ASSERT(). 449 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 447 450 448 451 @param Address The PCI configuration register to write. … … 488 491 If EndBit is greater than 7, then ASSERT(). 489 492 If EndBit is less than StartBit, then ASSERT(). 493 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 494 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 490 495 491 496 @param Address The PCI configuration register to write. … … 714 719 If EndBit is greater than 15, then ASSERT(). 715 720 If EndBit is less than StartBit, then ASSERT(). 721 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 716 722 717 723 @param Address The PCI configuration register to write. … … 756 762 If EndBit is greater than 15, then ASSERT(). 757 763 If EndBit is less than StartBit, then ASSERT(). 764 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 758 765 759 766 @param Address The PCI configuration register to write. … … 798 805 If EndBit is greater than 15, then ASSERT(). 799 806 If EndBit is less than StartBit, then ASSERT(). 807 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 800 808 801 809 @param Address The PCI configuration register to write. … … 842 850 If EndBit is greater than 15, then ASSERT(). 843 851 If EndBit is less than StartBit, then ASSERT(). 852 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 853 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 844 854 845 855 @param Address The PCI configuration register to write. … … 1068 1078 If EndBit is greater than 31, then ASSERT(). 1069 1079 If EndBit is less than StartBit, then ASSERT(). 1080 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1070 1081 1071 1082 @param Address The PCI configuration register to write. … … 1110 1121 If EndBit is greater than 31, then ASSERT(). 1111 1122 If EndBit is less than StartBit, then ASSERT(). 1123 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1112 1124 1113 1125 @param Address The PCI configuration register to write. … … 1152 1164 If EndBit is greater than 31, then ASSERT(). 1153 1165 If EndBit is less than StartBit, then ASSERT(). 1166 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1154 1167 1155 1168 @param Address The PCI configuration register to write. … … 1196 1209 If EndBit is greater than 31, then ASSERT(). 1197 1210 If EndBit is less than StartBit, then ASSERT(). 1211 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1212 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1198 1213 1199 1214 @param Address The PCI configuration register to write.
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