VirtualBox

Ignore:
Timestamp:
Oct 28, 2015 8:17:18 PM (9 years ago)
Author:
vboxsync
Message:

EFI/Firmware: 'svn merge /vendor/edk2/UDK2010.SR1 /vendor/edk2/current .', reverting and removing files+dirs listed in ReadMe.vbox, resolving conflicts with help from ../UDK2014.SP1/. This is a raw untested merge.

Location:
trunk/src/VBox/Devices/EFI/Firmware
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/EFI/Firmware

  • trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c

    r48674 r58459  
    22  PCI Library using PCI Root Bridge I/O Protocol.
    33
    4   Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
     4  Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
    55  This program and the accompanying materials are
    66  licensed and made available under the terms and conditions of
     
    365365  If EndBit is greater than 7, then ASSERT().
    366366  If EndBit is less than StartBit, then ASSERT().
     367  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    367368
    368369  @param  Address   The PCI configuration register to write.
     
    406407  If EndBit is greater than 7, then ASSERT().
    407408  If EndBit is less than StartBit, then ASSERT().
     409  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    408410
    409411  @param  Address   The PCI configuration register to write.
     
    447449  If EndBit is greater than 7, then ASSERT().
    448450  If EndBit is less than StartBit, then ASSERT().
     451  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    449452
    450453  @param  Address   The PCI configuration register to write.
     
    490493  If EndBit is greater than 7, then ASSERT().
    491494  If EndBit is less than StartBit, then ASSERT().
     495  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     496  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    492497
    493498  @param  Address   The PCI configuration register to write.
     
    716721  If EndBit is greater than 15, then ASSERT().
    717722  If EndBit is less than StartBit, then ASSERT().
     723  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    718724
    719725  @param  Address   The PCI configuration register to write.
     
    758764  If EndBit is greater than 15, then ASSERT().
    759765  If EndBit is less than StartBit, then ASSERT().
     766  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    760767
    761768  @param  Address   The PCI configuration register to write.
     
    800807  If EndBit is greater than 15, then ASSERT().
    801808  If EndBit is less than StartBit, then ASSERT().
     809  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    802810
    803811  @param  Address   The PCI configuration register to write.
     
    844852  If EndBit is greater than 15, then ASSERT().
    845853  If EndBit is less than StartBit, then ASSERT().
     854  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     855  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    846856
    847857  @param  Address   The PCI configuration register to write.
     
    10701080  If EndBit is greater than 31, then ASSERT().
    10711081  If EndBit is less than StartBit, then ASSERT().
     1082  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    10721083
    10731084  @param  Address   The PCI configuration register to write.
     
    11121123  If EndBit is greater than 31, then ASSERT().
    11131124  If EndBit is less than StartBit, then ASSERT().
     1125  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    11141126
    11151127  @param  Address   The PCI configuration register to write.
     
    11541166  If EndBit is greater than 31, then ASSERT().
    11551167  If EndBit is less than StartBit, then ASSERT().
     1168  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    11561169
    11571170  @param  Address   The PCI configuration register to write.
     
    11981211  If EndBit is greater than 31, then ASSERT().
    11991212  If EndBit is less than StartBit, then ASSERT().
     1213  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
     1214  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
    12001215
    12011216  @param  Address   The PCI configuration register to write.
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