Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
- Timestamp:
- Oct 28, 2015 8:17:18 PM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 2 edited
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trunk/src/VBox/Devices/EFI/Firmware
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Property svn:mergeinfo
set to (toggle deleted branches)
/vendor/edk2/current 103735-103757
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Property svn:mergeinfo
set to (toggle deleted branches)
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trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
r48674 r58459 2 2 PCI Library using PCI Root Bridge I/O Protocol. 3 3 4 Copyright (c) 2007 - 201 0, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials are 6 6 licensed and made available under the terms and conditions of … … 365 365 If EndBit is greater than 7, then ASSERT(). 366 366 If EndBit is less than StartBit, then ASSERT(). 367 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 367 368 368 369 @param Address The PCI configuration register to write. … … 406 407 If EndBit is greater than 7, then ASSERT(). 407 408 If EndBit is less than StartBit, then ASSERT(). 409 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 408 410 409 411 @param Address The PCI configuration register to write. … … 447 449 If EndBit is greater than 7, then ASSERT(). 448 450 If EndBit is less than StartBit, then ASSERT(). 451 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 449 452 450 453 @param Address The PCI configuration register to write. … … 490 493 If EndBit is greater than 7, then ASSERT(). 491 494 If EndBit is less than StartBit, then ASSERT(). 495 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 496 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 492 497 493 498 @param Address The PCI configuration register to write. … … 716 721 If EndBit is greater than 15, then ASSERT(). 717 722 If EndBit is less than StartBit, then ASSERT(). 723 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 718 724 719 725 @param Address The PCI configuration register to write. … … 758 764 If EndBit is greater than 15, then ASSERT(). 759 765 If EndBit is less than StartBit, then ASSERT(). 766 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 760 767 761 768 @param Address The PCI configuration register to write. … … 800 807 If EndBit is greater than 15, then ASSERT(). 801 808 If EndBit is less than StartBit, then ASSERT(). 809 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 802 810 803 811 @param Address The PCI configuration register to write. … … 844 852 If EndBit is greater than 15, then ASSERT(). 845 853 If EndBit is less than StartBit, then ASSERT(). 854 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 855 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 846 856 847 857 @param Address The PCI configuration register to write. … … 1070 1080 If EndBit is greater than 31, then ASSERT(). 1071 1081 If EndBit is less than StartBit, then ASSERT(). 1082 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1072 1083 1073 1084 @param Address The PCI configuration register to write. … … 1112 1123 If EndBit is greater than 31, then ASSERT(). 1113 1124 If EndBit is less than StartBit, then ASSERT(). 1125 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1114 1126 1115 1127 @param Address The PCI configuration register to write. … … 1154 1166 If EndBit is greater than 31, then ASSERT(). 1155 1167 If EndBit is less than StartBit, then ASSERT(). 1168 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1156 1169 1157 1170 @param Address The PCI configuration register to write. … … 1198 1211 If EndBit is greater than 31, then ASSERT(). 1199 1212 If EndBit is less than StartBit, then ASSERT(). 1213 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1214 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1200 1215 1201 1216 @param Address The PCI configuration register to write.
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