Changeset 58459 in vbox for trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
- Timestamp:
- Oct 28, 2015 8:17:18 PM (9 years ago)
- Location:
- trunk/src/VBox/Devices/EFI/Firmware
- Files:
-
- 2 edited
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trunk/src/VBox/Devices/EFI/Firmware
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Property svn:mergeinfo
set to (toggle deleted branches)
/vendor/edk2/current 103735-103757
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Property svn:mergeinfo
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trunk/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
r48674 r58459 2 2 PCI Segment Library implementation using PCI Root Bridge I/O Protocol. 3 3 4 Copyright (c) 2007 - 201 0, Intel Corporation. All rights reserved.<BR>4 Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR> 5 5 This program and the accompanying materials are 6 6 licensed and made available under the terms and conditions of … … 447 447 If EndBit is greater than 7, then ASSERT(). 448 448 If EndBit is less than StartBit, then ASSERT(). 449 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 449 450 450 451 @param Address The PCI configuration register to write. … … 488 489 If EndBit is greater than 7, then ASSERT(). 489 490 If EndBit is less than StartBit, then ASSERT(). 491 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 490 492 491 493 @param Address The PCI configuration register to write. … … 529 531 If EndBit is greater than 7, then ASSERT(). 530 532 If EndBit is less than StartBit, then ASSERT(). 533 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 531 534 532 535 @param Address The PCI configuration register to write. … … 572 575 If EndBit is greater than 7, then ASSERT(). 573 576 If EndBit is less than StartBit, then ASSERT(). 577 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 578 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 574 579 575 580 @param Address The PCI configuration register to write. … … 789 794 If EndBit is greater than 15, then ASSERT(). 790 795 If EndBit is less than StartBit, then ASSERT(). 796 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 791 797 792 798 @param Address The PCI configuration register to write. … … 825 831 If EndBit is greater than 15, then ASSERT(). 826 832 If EndBit is less than StartBit, then ASSERT(). 833 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 827 834 828 835 @param Address The PCI configuration register to write. … … 867 874 If EndBit is greater than 7, then ASSERT(). 868 875 If EndBit is less than StartBit, then ASSERT(). 876 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 869 877 870 878 @param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register. … … 910 918 If EndBit is greater than 15, then ASSERT(). 911 919 If EndBit is less than StartBit, then ASSERT(). 920 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 921 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 912 922 913 923 @param Address The PCI configuration register to write. … … 1124 1134 If EndBit is greater than 31, then ASSERT(). 1125 1135 If EndBit is less than StartBit, then ASSERT(). 1136 If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1126 1137 1127 1138 @param Address The PCI configuration register to write. … … 1165 1176 If EndBit is greater than 31, then ASSERT(). 1166 1177 If EndBit is less than StartBit, then ASSERT(). 1178 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1167 1179 1168 1180 @param Address The PCI configuration register to write. … … 1206 1218 If EndBit is greater than 31, then ASSERT(). 1207 1219 If EndBit is less than StartBit, then ASSERT(). 1208 1220 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1209 1221 1210 1222 @param Address The PCI configuration register to write. … … 1250 1262 If EndBit is greater than 31, then ASSERT(). 1251 1263 If EndBit is less than StartBit, then ASSERT(). 1264 If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1265 If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). 1252 1266 1253 1267 @param Address The PCI configuration register to write.
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