Changeset 58925 in vbox for trunk/src/VBox/Devices/Audio
- Timestamp:
- Nov 30, 2015 9:32:50 PM (9 years ago)
- svn:sync-xref-src-repo-rev:
- 104428
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchHda.cpp
r58924 r58925 853 853 854 854 /** Turn a short global register name into an memory index and a stringized name. */ 855 #define HDA_REG_IDX(abbrev) HDA_MEM_IND_NAME(abbrev), #abbrev855 #define HDA_REG_IDX(abbrev) HDA_MEM_IND_NAME(abbrev), #abbrev 856 856 857 857 /** Turns a short stream register name into an memory index and a stringized name. */ 858 #define HDA_REG_IDX_STRM(reg, suff) HDA_MEM_IND_NAME(reg ## suff), #reg # # #suff858 #define HDA_REG_IDX_STRM(reg, suff) HDA_MEM_IND_NAME(reg ## suff), #reg #suff 859 859 860 860 /** Same as above for a register *not* stored in memory. */ 861 #define HDA_REG_IDX_LOCAL(abbrev) 0, #abbrev861 #define HDA_REG_IDX_LOCAL(abbrev) 0, #abbrev 862 862 863 863 /** Emits a single audio stream register set (e.g. OSD0) at a specified offset. */ … … 866 866 /* ------- ------- ---------- ---------- -------------- ----------------- ------------------------------ ----------- */ \ 867 867 /* Offset 0x80 (SD0) */ \ 868 { offset, 0x00003, 0x00FF001F, 0x00F0001F, hdaRegReadU24 , hdaRegWriteSDCTL , HDA_REG_IDX_STRM(name, CTL) , #name ##" Stream Descriptor Control" }, \868 { offset, 0x00003, 0x00FF001F, 0x00F0001F, hdaRegReadU24 , hdaRegWriteSDCTL , HDA_REG_IDX_STRM(name, CTL) , #name " Stream Descriptor Control" }, \ 869 869 /* Offset 0x83 (SD0) */ \ 870 { offset + 0x3, 0x00001, 0x0000001C, 0x0000003C, hdaRegReadU8 , hdaRegWriteSDSTS , HDA_REG_IDX_STRM(name, STS) , #name ##" Status" }, \870 { offset + 0x3, 0x00001, 0x0000001C, 0x0000003C, hdaRegReadU8 , hdaRegWriteSDSTS , HDA_REG_IDX_STRM(name, STS) , #name " Status" }, \ 871 871 /* Offset 0x84 (SD0) */ \ 872 { offset + 0x4, 0x00004, 0xFFFFFFFF, 0x00000000, hdaRegReadLPIB, hdaRegWriteU32 , HDA_REG_IDX_STRM(name, LPIB) , #name ##" Link Position In Buffer" }, \872 { offset + 0x4, 0x00004, 0xFFFFFFFF, 0x00000000, hdaRegReadLPIB, hdaRegWriteU32 , HDA_REG_IDX_STRM(name, LPIB) , #name " Link Position In Buffer" }, \ 873 873 /* Offset 0x88 (SD0) */ \ 874 { offset + 0x8, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32, hdaRegWriteU32 , HDA_REG_IDX_STRM(name, CBL) , #name ##" Cyclic Buffer Length" }, \874 { offset + 0x8, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32, hdaRegWriteU32 , HDA_REG_IDX_STRM(name, CBL) , #name " Cyclic Buffer Length" }, \ 875 875 /* Offset 0x8C (SD0) */ \ 876 { offset + 0xC, 0x00002, 0x0000FFFF, 0x0000FFFF, hdaRegReadU16, hdaRegWriteSDLVI , HDA_REG_IDX_STRM(name, LVI) , #name ##" Last Valid Index" }, \876 { offset + 0xC, 0x00002, 0x0000FFFF, 0x0000FFFF, hdaRegReadU16, hdaRegWriteSDLVI , HDA_REG_IDX_STRM(name, LVI) , #name " Last Valid Index" }, \ 877 877 /* Reserved: FIFO Watermark. ** @todo Document this! */ \ 878 { offset + 0xE, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16, hdaRegWriteSDFIFOW, HDA_REG_IDX_STRM(name, FIFOW), #name ##" FIFO Watermark" }, \878 { offset + 0xE, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16, hdaRegWriteSDFIFOW, HDA_REG_IDX_STRM(name, FIFOW), #name " FIFO Watermark" }, \ 879 879 /* Offset 0x90 (SD0) */ \ 880 { offset + 0x10, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16, hdaRegWriteSDFIFOS, HDA_REG_IDX_STRM(name, FIFOS), #name ##" FIFO Size" }, \880 { offset + 0x10, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16, hdaRegWriteSDFIFOS, HDA_REG_IDX_STRM(name, FIFOS), #name " FIFO Size" }, \ 881 881 /* Offset 0x92 (SD0) */ \ 882 { offset + 0x12, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16, hdaRegWriteSDFMT , HDA_REG_IDX_STRM(name, FMT) , #name ##" Format" }, \882 { offset + 0x12, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16, hdaRegWriteSDFMT , HDA_REG_IDX_STRM(name, FMT) , #name " Format" }, \ 883 883 /* Reserved: 0x94 - 0x98. */ \ 884 884 /* Offset 0x98 (SD0) */ \ 885 { offset + 0x18, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32, hdaRegWriteSDBDPL , HDA_REG_IDX_STRM(name, BDPL) , #name ##" Buffer Descriptor List Pointer-Lower Base Address" }, \885 { offset + 0x18, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32, hdaRegWriteSDBDPL , HDA_REG_IDX_STRM(name, BDPL) , #name " Buffer Descriptor List Pointer-Lower Base Address" }, \ 886 886 /* Offset 0x9C (SD0) */ \ 887 { offset + 0x1C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32, hdaRegWriteSDBDPU , HDA_REG_IDX_STRM(name, BDPU) , #name ##" Buffer Descriptor List Pointer-Upper Base Address" }887 { offset + 0x1C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32, hdaRegWriteSDBDPU , HDA_REG_IDX_STRM(name, BDPU) , #name " Buffer Descriptor List Pointer-Upper Base Address" } 888 888 889 889 /** Defines a single audio stream register set (e.g. OSD0). */
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