Changeset 59172 in vbox for trunk/src/VBox/Devices/Audio/DevIchHda.cpp

Timestamp:

Dec 17, 2015 10:32:08 AM (9 years ago)

Author:

vboxsync

Message:

Audio/HDA: Try to fix stream initialization / reset handling for >= 2 VCPUs.

File:

• trunk/src/VBox/Devices/Audio/DevIchHda.cpp (modified) (8 diffs)

trunk/src/VBox/Devices/Audio/DevIchHda.cpp

@@ -1485 +1485 @@
     AssertPtrReturn(pStrmSt, VERR_INVALID_POINTER);
 
+#ifdef VBOX_STRICT
+    AssertReleaseMsg(!RT_BOOL(HDA_STREAM_REG(pThis, CTL, u8Strm) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)),
+                     ("Cannot initialize stream %RU8 while in running state\n", u8Strm));
+#endif
+
     pStrmSt->u8Strm     = u8Strm;
     pStrmSt->u64BaseDMA = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, u8Strm),
@@ -1583 +1588 @@
     AssertReturnVoid(u8Strm <= 7); /** @todo Use a define for MAX_STREAMS! */
 
-    /*
-     * Stop the stream and wait until our internal processing is done.
-     */
-    int rc2 = hdaStreamStop(pStrmSt);
-    if (RT_FAILURE(rc2))
-    {
-        AssertReleaseMsgFailed(("HDA: Unable to stop stream %RU8, rc=%Rrc\n", pStrmSt->u8Strm, rc2));
-        return;
-    }
+#ifdef VBOX_STRICT
+    AssertReleaseMsg(!RT_BOOL(HDA_STREAM_REG(pThis, CTL, u8Strm) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)),
+                     ("Cannot reset stream %RU8 while in running state\n", u8Strm));
+#endif
 
     /*
@@ -1600 +1600 @@
 
     /*
-     * First, initialize the internal stream state.
+     * First, reset the internal stream state.
      */
-    rc2 = hdaStreamInit(pThis, pStrmSt, u8Strm);
-    AssertRC(rc2);
+    pStrmSt->u8Strm     = u8Strm;
+    pStrmSt->u64BaseDMA = 0;
+    pStrmSt->u32CBL     = 0;
+    pStrmSt->u16FMT     = 0;
+    pStrmSt->u16FIFOS   = 0;
+    pStrmSt->u16LVI     = 0;
 
     /*
-     * Second, initialize registers.
+     * Second, initialize the registers.
      */
     HDA_STREAM_REG(pThis, STS,   u8Strm) = 0;
@@ -1612 +1616 @@
      * bits are reserved for stream number 18.2.33, resets SDnCTL except SRST bit. */
     HDA_STREAM_REG(pThis, CTL,   u8Strm) = 0x40000 | (HDA_STREAM_REG(pThis, CTL, u8Strm) & HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST));
-
     /* ICH6 defines default values (0x77 for input and 0xBF for output descriptors) of FIFO size. 18.2.39. */
     HDA_STREAM_REG(pThis, FIFOS, u8Strm) = u8Strm < 4 ? HDA_SDINFIFO_120B : HDA_SDONFIFO_192B;
@@ -1624 +1627 @@
     HDA_STREAM_REG(pThis, BDPL,  u8Strm) = 0;
 
+    /* Report that we're done resetting this stream. */
+    HDA_STREAM_REG(pThis, CTL,   u8Strm) = 0;
+
     LogFunc(("[SD%RU8]: Reset\n", u8Strm));
 
     /* Exit reset mode. */
     ASMAtomicXchgBool(&pStrmSt->State.fInReset, false);
-
-    /*
-     * Start stream again.
-     */
-    rc2 = hdaStreamStart(pStrmSt);
-    AssertRC(rc2);
 }
 
@@ -1997 +1997 @@
     {
 #ifdef IN_RING3
+        /*
+         * Only (re-)initialize the stream when not running.
+         */
+        if (!fRun && !fInRun)
+        {
+            int rc2 = hdaStreamInit(pThis, pStrmSt, u8Strm);
+            AssertRC(rc2);
+        }
+
         /*
          * We enter here to change DMA states only.
@@ -2036 +2045 @@
             }
         }
-
-        if (pStrmSt)
-        {
-            int rc2 = hdaStreamInit(pThis, pStrmSt, u8Strm);
-            AssertRC(rc2);
-        }
-
 #else /* !IN_RING3 */
         return VINF_IOM_R3_MMIO_WRITE;
@@ -4154 +4156 @@
 
         if (pStrmSt)
-        {
-            /* hdaStreamReset prevents changing the SRST bit, so we force it to zero here. */
-            HDA_STREAM_REG(pThis, CTL, u8Strm) = 0;
-
             hdaStreamReset(pThis, pStrmSt, u8Strm);
-        }
     }