VirtualBox

Changeset 64115 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Sep 30, 2016 8:14:27 PM (8 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
111072
Message:

PDM,IOM,PGM: Morphed the MMIO2 API into a mixed MMIO2 and pre-registered MMIO API that is able to deal with really large (<= 64GB) MMIO ranges. Limited testing, so back out at first sign of trouble.

Location:
trunk/src/VBox/Devices
Files:
9 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Bus/DevPCI.cpp

    r63685 r64115  
    319319                        RTGCPHYS GCPhysBase = r->addr;
    320320                        int rc;
    321                         if (pBus->pPciHlpR3->pfnIsMMIO2Base(pBus->pDevInsR3, d->pDevIns, GCPhysBase))
     321                        if (pBus->pPciHlpR3->pfnIsMMIOExBase(pBus->pDevInsR3, d->pDevIns, GCPhysBase))
    322322                        {
    323323                            /* unmap it. */
    324324                            rc = r->map_func(d, i, NIL_RTGCPHYS, r->size, (PCIADDRESSSPACE)(r->type));
    325325                            AssertRC(rc);
    326                             rc = PDMDevHlpMMIO2Unmap(d->pDevIns, i, GCPhysBase);
     326                            rc = PDMDevHlpMMIOExUnmap(d->pDevIns, i, GCPhysBase);
    327327                        }
    328328                        else

  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r63879 r64115  
    841841        {
    842842            RTGCPHYS GCPhysBase = pRegion->addr;
    843             if (pBus->pPciHlpR3->pfnIsMMIO2Base(pBus->pDevInsR3, pDev->pDevIns, GCPhysBase))
     843            if (pBus->pPciHlpR3->pfnIsMMIOExBase(pBus->pDevInsR3, pDev->pDevIns, GCPhysBase))
    844844            {
    845845                /* unmap it. */
    846846                rc = pRegion->map_func(pDev, iRegion, NIL_RTGCPHYS, pRegion->size, (PCIADDRESSSPACE)(pRegion->type));
    847847                AssertRC(rc);
    848                 rc = PDMDevHlpMMIO2Unmap(pDev->pDevIns, iRegion, GCPhysBase);
     848                rc = PDMDevHlpMMIOExUnmap(pDev->pDevIns, iRegion, GCPhysBase);
    849849            }
    850850            else

  • trunk/src/VBox/Devices/GIMDev/GIMDev.cpp

    r62890 r64115  
    340340    for (uint32_t i = 0; i < cRegions; i++, pCur++)
    341341    {
    342         int rc = PDMDevHlpMMIO2Deregister(pDevIns, pCur->iRegion);
     342        int rc = PDMDevHlpMMIOExDeregister(pDevIns, pCur->iRegion);
    343343        if (RT_FAILURE(rc))
    344344            return rc;

  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

    r63690 r64115  
    38143814             * Mapping the FIFO RAM.
    38153815             */
    3816             rc = PDMDevHlpMMIO2Map(pDevIns, iRegion, GCPhysAddress);
     3816            rc = PDMDevHlpMMIOExMap(pDevIns, iRegion, GCPhysAddress);
    38173817            AssertRC(rc);
    38183818

  • trunk/src/VBox/Devices/Graphics/DevVGA.cpp

    r63690 r64115  
    54325432         * Mapping the VRAM.
    54335433         */
    5434         rc = PDMDevHlpMMIO2Map(pDevIns, iRegion, GCPhysAddress);
     5434        rc = PDMDevHlpMMIOExMap(pDevIns, iRegion, GCPhysAddress);
    54355435        AssertRC(rc);
    54365436        if (RT_SUCCESS(rc))

  • trunk/src/VBox/Devices/Network/DevE1000.cpp

    r63690 r64115  
    4848
    4949
    50 /* Options *******************************************************************/
     50/*********************************************************************************************************************************
     51*   Defined Constants And Macros                                                                                                 *
     52*********************************************************************************************************************************/
     53/** @name E1000 Build Options
     54 * @{ */
    5155/** @def E1K_INIT_RA0
    5256 * E1K_INIT_RA0 forces E1000 to set the first entry in Receive Address filter
    … …  
    117121 */
    118122#define E1K_WITH_RXD_CACHE
     123/** @def E1K_WITH_PREREG_MMIO
     124 * E1K_WITH_PREREG_MMIO enables a new style MMIO registration and is
     125 * currently only done for testing the relateted PDM, IOM and PGM code. */
     126//#define E1K_WITH_PREREG_MMIO
     127/* @} */
    119128/* End of Options ************************************************************/
    120129
    … …  
    61136122             *    byte enables.
    61146123             */
     6124#ifdef E1K_WITH_PREREG_MMIO
     6125            pThis->addrMMReg = GCPhysAddress;
     6126            if (GCPhysAddress == NIL_RTGCPHYS)
     6127                rc = VINF_SUCCESS;
     6128            else
     6129            {
     6130                Assert(!(GCPhysAddress & 7));
     6131                rc = PDMDevHlpMMIOExMap(pPciDev->pDevIns, iRegion, GCPhysAddress);
     6132            }
     6133#else
    61156134            pThis->addrMMReg = GCPhysAddress; Assert(!(GCPhysAddress & 7));
    61166135            rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
    … …  
    61236142                rc = PDMDevHlpMMIORegisterRC(pPciDev->pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/,
    61246143                                             "e1kMMIOWrite", "e1kMMIORead");
     6144#endif
    61256145            break;
    61266146
    … …  
    76417661    if (RT_FAILURE(rc))
    76427662        return rc;
     7663#ifdef E1K_WITH_PREREG_MMIO
     7664    rc = PDMDevHlpMMIOExPreRegister(pDevIns, 0, E1K_MM_SIZE, IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_ONLY_DWORD, "E1000",
     7665                                    NULL        /*pvUserR3*/, e1kMMIOWrite, e1kMMIORead, NULL /*pfnFillR3*/,
     7666                                    NIL_RTR0PTR /*pvUserR0*/, pThis->fR0Enabled ? "e1kMMIOWrite" : NULL,
     7667                                    pThis->fR0Enabled ? "e1kMMIORead" : NULL, NULL /*pszFillR0*/,
     7668                                    NIL_RTRCPTR /*pvUserRC*/, pThis->fRCEnabled ? "e1kMMIOWrite" : NULL,
     7669                                    pThis->fRCEnabled ? "e1kMMIORead" : NULL, NULL /*pszFillRC*/);
     7670    AssertLogRelRCReturn(rc, rc);
     7671#endif
    76437672    /* Map our registers to IO space (region 2, see e1kConfigurePCI) */
    76447673    rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, E1K_IOPORT_SIZE, PCI_ADDRESS_SPACE_IO, e1kMap);

  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r63690 r64115  
    44184418    {
    44194419        /* drop this dummy region */
    4420         rc = PDMDevHlpMMIO2Deregister(pDevIns, 2);
     4420        rc = PDMDevHlpMMIOExDeregister(pDevIns, 2);
    44214421        pThis->fSharedRegion = false;
    44224422    }

  • trunk/src/VBox/Devices/Samples/DevPlayground.cpp

    r63910 r64115  
    8080 * @callback_method_impl{FNPCIIOREGIONMAP}
    8181 */
    82 static DECLCALLBACK(int) devPlaygroundMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    83 {
    84     NOREF(enmType);
    85     int rc;
     82static DECLCALLBACK(int)
     83devPlaygroundMap(PPCIDEVICE pPciDev, int iRegion, RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
     84{
     85    RT_NOREF(enmType, cb);
    8686
    8787    switch (iRegion)
    8888    {
    8989        case 0:
    90             rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, NULL,
    91                                        IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
    92                                        devPlaygroundMMIOWrite, devPlaygroundMMIORead, "PG-BAR0");
    93             break;
    9490        case 2:
    95             rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, NULL,
    96                                        IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
    97                                        devPlaygroundMMIOWrite, devPlaygroundMMIORead, "PG-BAR2");
    98             break;
     91            Assert(enmType == (PCIADDRESSSPACE)(PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64));
     92            return PDMDevHlpMMIOExMap(pPciDev->pDevIns, iRegion, GCPhysAddress);
     93
    9994        default:
    10095            /* We should never get here */
    101             AssertMsgFailed(("Invalid PCI region param in map callback"));
    102             rc = VERR_INTERNAL_ERROR;
     96            AssertMsgFailedReturn(("Invalid PCI region param in map callback"), VERR_INTERNAL_ERROR);
    10397    }
    104     return rc;
    105 
    10698}
    10799
    … …  
    153145    if (RT_FAILURE(rc))
    154146        return rc;
     147    /* First region. */
    155148    rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 8*_1G64,
    156149                                      (PCIADDRESSSPACE)(PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64),
    157150                                      devPlaygroundMap);
    158     if (RT_FAILURE(rc))
    159         return rc;
    160     rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, 8*_1G64,
     151    AssertLogRelRCReturn(rc, rc);
     152    rc = PDMDevHlpMMIOExPreRegister(pDevIns, 0, 8*_1G64, IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, "PG-BAR0",
     153                                    NULL /*pvUser*/,  devPlaygroundMMIOWrite, devPlaygroundMMIORead, NULL /*pfnFill*/,
     154                                    NIL_RTR0PTR /*pvUserR0*/, NULL /*pszWriteR0*/, NULL /*pszReadR0*/, NULL /*pszFillR0*/,
     155                                    NIL_RTRCPTR /*pvUserRC*/, NULL /*pszWriteRC*/, NULL /*pszReadRC*/, NULL /*pszFillRC*/);
     156    AssertLogRelRCReturn(rc, rc);
     157
     158    /* Second region. */
     159    rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, 64*_1G64,
    161160                                      (PCIADDRESSSPACE)(PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64),
    162161                                      devPlaygroundMap);
    163     if (RT_FAILURE(rc))
    164         return rc;
     162    AssertLogRelRCReturn(rc, rc);
     163    rc = PDMDevHlpMMIOExPreRegister(pDevIns, 2, 64*_1G64, IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, "PG-BAR2",
     164                                    NULL /*pvUser*/,  devPlaygroundMMIOWrite, devPlaygroundMMIORead, NULL /*pfnFill*/,
     165                                    NIL_RTR0PTR /*pvUserR0*/, NULL /*pszWriteR0*/, NULL /*pszReadR0*/, NULL /*pszFillR0*/,
     166                                    NIL_RTRCPTR /*pvUserRC*/, NULL /*pszWriteRC*/, NULL /*pszReadRC*/, NULL /*pszFillRC*/);
     167    AssertLogRelRCReturn(rc, rc);
    165168
    166169    return VINF_SUCCESS;

  • trunk/src/VBox/Devices/VMMDev/VMMDev.cpp

    r63690 r64115  
    28972897            pThis->GCPhysVMMDevRAM = GCPhysAddress;
    28982898            Assert(pThis->GCPhysVMMDevRAM == GCPhysAddress);
    2899             rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress);
     2899            rc = PDMDevHlpMMIOExMap(pPciDev->pDevIns, iRegion, GCPhysAddress);
    29002900        }
    29012901        else
    … …  
    29192919            pThis->GCPhysVMMDevHeap = GCPhysAddress;
    29202920            Assert(pThis->GCPhysVMMDevHeap == GCPhysAddress);
    2921             rc = PDMDevHlpMMIO2Map(pPciDev->pDevIns, iRegion, GCPhysAddress);
     2921            rc = PDMDevHlpMMIOExMap(pPciDev->pDevIns, iRegion, GCPhysAddress);
    29222922            if (RT_SUCCESS(rc))
    29232923                rc = PDMDevHlpRegisterVMMDevHeap(pPciDev->pDevIns, GCPhysAddress, pThis->pVMMDevHeapR3, VMMDEV_HEAP_SIZE);
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