Changeset 64459 in vbox for trunk/src/VBox
- Timestamp:
- Oct 28, 2016 2:12:20 PM (8 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r64458 r64459 1999 1999 { 2000 2000 /* 2001 * Handle the writes byte-by-byte. 2001 * Handle the writes byte-by-byte to catch all possible cases. 2002 * 2003 * Note! Real hardware may not necessarily handle non-dword writes like 2004 * we do here and even produce erratic behavior. We don't (yet) 2005 * try emulate that. 2002 2006 */ 2003 2007 bool fUpdateMappings = false; … … 2006 2010 while (cb-- > 0) 2007 2011 { 2012 /* 2013 * Check writability first. 2014 */ 2008 2015 bool fWritable = false; 2009 2016 switch (bHeaderType) … … 2013 2020 switch (uAddress) 2014 2021 { 2015 /* Read-only registers 2022 /* Read-only registers. */ 2016 2023 case VBOX_PCI_VENDOR_ID: 2017 2024 case VBOX_PCI_VENDOR_ID+1: … … 2035 2042 fWritable = false; 2036 2043 break; 2037 /* Other s can be written*/2044 /* Other registers can be written. */ 2038 2045 default: 2039 2046 fWritable = true; … … 2045 2052 switch (uAddress) 2046 2053 { 2047 /* Read-only registers */2054 /* Read-only registers. */ 2048 2055 case VBOX_PCI_VENDOR_ID: 2049 2056 case VBOX_PCI_VENDOR_ID+1: … … 2062 2069 fWritable = false; 2063 2070 break; 2071 /* Other registers can be written. */ 2064 2072 default: 2065 2073 fWritable = true; … … 2068 2076 break; 2069 2077 default: 2070 AssertMsgFailed(("Unknown header type % x\n", PCIDevGetHeaderType(pPciDev)));2078 AssertMsgFailed(("Unknown header type %#x\n", bHeaderType)); 2071 2079 fWritable = false; 2072 2080 break; … … 2078 2086 { 2079 2087 case VBOX_PCI_COMMAND: /* Command register, bits 0-7. */ 2080 fUpdateMappings = true; 2081 goto l_default_case; 2088 if (fWritable) 2089 { 2090 PCIDevSetByte(pPciDev, uAddress, bVal); 2091 fUpdateMappings = true; /** @todo r=bird: Probably not necessary to update mappings on VBOX_PCI_COMMAND changes for bridges? */ 2092 } 2093 break; 2094 2082 2095 case VBOX_PCI_COMMAND+1: /* Command register, bits 8-15. */ 2083 /* don't change reserved bits (11-15) */ 2084 bVal &= ~UINT32_C(0xf8); 2085 fUpdateMappings = true; 2086 goto l_default_case; 2096 if (fWritable) 2097 { 2098 /* don't change reserved bits (11-15) */ 2099 bVal &= ~UINT32_C(0xf8); 2100 PCIDevSetByte(pPciDev, uAddress, bVal); 2101 fUpdateMappings = true; 2102 } 2103 break; 2104 2087 2105 case VBOX_PCI_STATUS: /* Status register, bits 0-7. */ 2088 2106 /* don't change read-only bits => actually all lower bits are read-only */ … … 2091 2109 pPciDev->abConfig[uAddress] &= ~bVal; 2092 2110 break; 2111 2093 2112 case VBOX_PCI_STATUS+1: /* Status register, bits 8-15. */ 2094 2113 /* don't change read-only bits */ … … 2097 2116 pPciDev->abConfig[uAddress] &= ~bVal; 2098 2117 break; 2118 2099 2119 case VBOX_PCI_ROM_ADDRESS: case VBOX_PCI_ROM_ADDRESS +1: case VBOX_PCI_ROM_ADDRESS +2: case VBOX_PCI_ROM_ADDRESS +3: 2100 2120 fRom = true; … … 2109 2129 { 2110 2130 uint32_t iRegion = fRom ? VBOX_PCI_ROM_SLOT : (uAddress - VBOX_PCI_BASE_ADDRESS_0) >> 2; 2111 uint32_t off = uAddress & 0x3; 2112 ich9pciWriteBarByte(pPciDev, iRegion, off, bVal); 2131 ich9pciWriteBarByte(pPciDev, iRegion, uAddress & 0x3, bVal); 2113 2132 fUpdateMappings = true; 2114 2133 break; … … 2116 2135 /* fall thru (bridge) */ 2117 2136 default: 2118 l_default_case:2119 2137 if (fWritable) 2120 2138 PCIDevSetByte(pPciDev, uAddress, bVal);
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