VirtualBox

Ignore:
Timestamp:
Mar 6, 2017 4:14:35 PM (8 years ago)
Author:
vboxsync
Message:

IEMAllInstructionsPython.py: Delinted.

File:
1 edited

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  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py

    r65947 r65951  
    3333"""
    3434__version__ = "$Revision$"
     35
     36# pylint: disable=anomalous-backslash-in-string
    3537
    3638# Standard python imports.
     
    278280    'interrupt':             'DISOPTYPE_INTERRUPT',             ##<
    279281    'illegal':               'DISOPTYPE_ILLEGAL',               ##<
    280     'rrm_dangerous':         'DISOPTYPE_RRM_DANGEROUS',         ##< Some additional dangerous ones when recompiling raw r0. */
    281     'rrm_dangerous_16':      'DISOPTYPE_RRM_DANGEROUS_16',      ##< Some additional dangerous ones when recompiling 16-bit raw r0. */
     282    'rrm_dangerous':         'DISOPTYPE_RRM_DANGEROUS',         ##< Some additional dangerous ones when recompiling raw r0.
     283    'rrm_dangerous_16':      'DISOPTYPE_RRM_DANGEROUS_16',      ##< Some additional dangerous ones when recompiling 16-bit raw r0.
    282284    'inhibit_irqs':          'DISOPTYPE_INHIBIT_IRQS',          ##< Will or can inhibit irqs (sti, pop ss, mov ss) */
    283285    'portio_read':           'DISOPTYPE_PORTIO_READ',           ##<
    284286    'portio_write':          'DISOPTYPE_PORTIO_WRITE',          ##<
    285     'invalid_64':            'DISOPTYPE_INVALID_64',            ##< Invalid in 64 bits mode */
    286     'only_64':               'DISOPTYPE_ONLY_64',               ##< Only valid in 64 bits mode */
    287     'default_64_op_size':    'DISOPTYPE_DEFAULT_64_OP_SIZE',    ##< Default 64 bits operand size */
    288     'forced_64_op_size':     'DISOPTYPE_FORCED_64_OP_SIZE',     ##< Forced 64 bits operand size; regardless of prefix bytes */
    289     'rexb_extends_opreg':    'DISOPTYPE_REXB_EXTENDS_OPREG',    ##< REX.B extends the register field in the opcode byte */
    290     'mod_fixed_11':          'DISOPTYPE_MOD_FIXED_11',          ##< modrm.mod is always 11b */
    291     'forced_32_op_size_x86': 'DISOPTYPE_FORCED_32_OP_SIZE_X86', ##< Forced 32 bits operand size; regardless of prefix bytes (only in 16 & 32 bits mode!) */
    292     'sse':                   'DISOPTYPE_SSE',                   ##< SSE,SSE2,SSE3,AVX,++ instruction. Not implemented yet! */
    293     'mmx':                   'DISOPTYPE_MMX',                   ##< MMX,MMXExt,3DNow,++ instruction. Not implemented yet! */
    294     'fpu':                   'DISOPTYPE_FPU',                   ##< FPU instruction. Not implemented yet! */
     287    'invalid_64':            'DISOPTYPE_INVALID_64',            ##< Invalid in 64 bits mode
     288    'only_64':               'DISOPTYPE_ONLY_64',               ##< Only valid in 64 bits mode
     289    'default_64_op_size':    'DISOPTYPE_DEFAULT_64_OP_SIZE',    ##< Default 64 bits operand size
     290    'forced_64_op_size':     'DISOPTYPE_FORCED_64_OP_SIZE',     ##< Forced 64 bits operand size; regardless of prefix bytes
     291    'rexb_extends_opreg':    'DISOPTYPE_REXB_EXTENDS_OPREG',    ##< REX.B extends the register field in the opcode byte
     292    'mod_fixed_11':          'DISOPTYPE_MOD_FIXED_11',          ##< modrm.mod is always 11b
     293    'forced_32_op_size_x86': 'DISOPTYPE_FORCED_32_OP_SIZE_X86', ##< Forced 32 bits operand size; regardless of prefix bytes
     294                                                                ##  (only in 16 & 32 bits mode!)
     295    'sse':                   'DISOPTYPE_SSE',                   ##< SSE,SSE2,SSE3,AVX,++ instruction. Not implemented yet!
     296    'mmx':                   'DISOPTYPE_MMX',                   ##< MMX,MMXExt,3DNow,++ instruction. Not implemented yet!
     297    'fpu':                   'DISOPTYPE_FPU',                   ##< FPU instruction. Not implemented yet!
    295298    'ignores_op_size':       '',                                ##< Ignores both operand size prefixes.
    296299};
     
    567570        Checks if sValue is a pair.
    568571        """
     572        _ = sValue;
    569573        return False;
    570574
     
    595599        if fClear != 0:
    596600            aoClear = TestType.get(self, '%#x' % (~fClear))
    597             assert self.isAndOrPair(sValue) == True;
     601            assert self.isAndOrPair(sValue) is True;
    598602            return (aoClear[0], aoSet[0]);
    599         assert self.isAndOrPair(sValue) == False;
     603        assert self.isAndOrPair(sValue) is False;
    600604        return aoSet;
    601605
     
    842846
    843847
    844 class Instruction(object):
     848class Instruction(object): # pylint: disable=too-many-instance-attributes
    845849    """
    846850    Instruction.
     
    856860        self.aoOperands     = [];       # type: list(Operand)
    857861        self.sPrefix        = None;     ##< Single prefix: None, 0x66, 0xf3, 0xf2
    858         self.sOpcode        = None;
     862        self.sOpcode        = None;     # type: str
    859863        self.sEncoding      = None;
    860864        self.asFlTest       = None;
     
    959963        if self.sOpcode is None:
    960964            raise Exception('No opcode byte for %s!' % (self,));
     965        sOpcode = str(self.sOpcode);    # pylint type confusion workaround.
    961966
    962967        # Full hex byte form.
    963         if self.sOpcode[:2] == '0x':
    964             return int(self.sOpcode, 16);
     968        if sOpcode[:2] == '0x':
     969            return int(sOpcode, 16);
    965970
    966971        # The /r form:
    967         if self.sOpcode[0] == '/' and self.sOpcode[1].isdigit() and len(self.sOpcode) == 2:
    968             return int(self.sOpcode[1:]) << 3;
    969 
    970         raise Exception('unsupported opcode byte spec "%s" for %s' % (self.sOpcode, self,));
    971         return -1;
     972        if sOpcode[0] == '/' and sOpcode[1].isdigit() and len(sOpcode) == 2:
     973            return int(sOpcode[1:]) << 3;
     974
     975        raise Exception('unsupported opcode byte spec "%s" for %s' % (sOpcode, self,));
    972976
    973977
     
    10141018    'grpP':         InstructionMap('grpP',      asLeadOpcodes = ['0x0f', '0x0d',], sSelector = '/r'), # AMD: prefetch
    10151019
    1016     'three0f38':    InstructionMap('three0f38', asLeadOpcodes = ['0x0f', '0x38',]),
    10171020    'three0f38':    InstructionMap('three0f38', asLeadOpcodes = ['0x0f', '0x38',]),
    10181021    'three0f3a':    InstructionMap('three0f3a', asLeadOpcodes = ['0x0f', '0x3a',]),
     
    11521155    def debug(self, sMessage):
    11531156        """
     1157        For debugging.
    11541158        """
    11551159        if self.fDebug:
     
    13351339        """
    13361340        asRet = [];
    1337         for asLines in assSections:
     1341        for asLines in aasSections:
    13381342            if len(asLines) > 0:
    13391343                asRet.append(' '.join([sLine.strip() for sLine in asLines]));
     
    14011405        """
    14021406        oInstr = self.ensureInstructionForOpTag(iTagLine);
    1403         if len(self.aoInstructions) > 0 and len(aasSections) > 0:
     1407        if len(aasSections) > 0:
    14041408            oInstr.asDescSections.extend(self.flattenSections(aasSections));
    14051409            return True;
     
    14671471        elif sWhere not in g_kdOpLocations:
    14681472            return self.errorComment(iTagLine, '%s: invalid where value "%s", valid: %s'
    1469                                                % (sTag, sWhere, ', '.join(g_kdOpLocations.keys()),), iTagLine);
     1473                                               % (sTag, sWhere, ', '.join(g_kdOpLocations.keys()),));
    14701474
    14711475        # Insert the operand, refusing to overwrite an existing one.
     
    16421646        'sf':   'X86_EFL_SF',
    16431647        'zf':   'X86_EFL_ZF',
    1644         'cf':   'X86_EFL_CF',
    16451648        'pf':   'X86_EFL_PF',
    16461649        'if':   'X86_EFL_IF',
     
    17701773        sMinCpu = asCpus[0];
    17711774        if sMinCpu in g_kdCpuNames:
    1772             self.sMinCpu = sMinCpu;
     1775            oInstr.sMinCpu = sMinCpu;
    17731776        else:
    17741777            return self.errorComment(iTagLine, '%s: invalid CPU name: %s  (names: %s)'
     
    18821885        return True;
    18831886
    1884     def parseTagOpTest(self, sTag, aasSections, iTagLine, iEndLine):
     1887    def parseTagOpTest(self, sTag, aasSections, iTagLine, iEndLine): # pylint: disable=too-many-locals
    18851888        """
    18861889        Tag:        \@optest
     
    20192022                                            % (sTag, asSelectors, asInputs, asOutputs,));
    20202023
     2024        _ = iEndLine;
    20212025        return True;
    20222026
     
    20392043        if not self.oReFunctionName.match(sFunction):
    20402044            return self.errorComment(iTagLine, '%s: invalid VMM function name: "%s" (valid: %s)'
    2041                                                % (sTag, Name, self.oReFunctionName.pattern));
     2045                                               % (sTag, sFunction, self.oReFunctionName.pattern));
    20422046
    20432047        if oInstr.sFunction is not None:
    20442048            return self.errorComment(iTagLine, '%s: attempting to overwrite VMM function name "%s" with "%s"'
    2045                                      % (sTag, oInstr.sStats, sStats,));
     2049                                     % (sTag, oInstr.sFunction, sFunction,));
    20462050        oInstr.sFunction = sFunction;
    20472051
     
    20672071        if not self.oReStatsName.match(sStats):
    20682072            return self.errorComment(iTagLine, '%s: invalid VMM statistics name: "%s" (valid: %s)'
    2069                                                % (sTag, Name, self.oReStatsName.pattern));
     2073                                               % (sTag, sStats, self.oReStatsName.pattern));
    20702074
    20712075        if oInstr.sStats is not None:
     
    22012205        offOpen = sInvocation.find('(');
    22022206        if offOpen <= 0:
    2203             raiseError("macro invocation open parenthesis not found");
     2207            self.raiseError("macro invocation open parenthesis not found");
    22042208        sName = sInvocation[:offOpen].strip();
    22052209        if not self.oReMacroName.match(sName):
     
    22582262        return None;
    22592263
    2260     def workerIemOpMnemonicEx(self, sMacro, sStats, sAsm, sForm, sUpper, sLower, sDisHints, sIemHints, asOperands):
     2264    def workerIemOpMnemonicEx(self, sMacro, sStats, sAsm, sForm, sUpper, sLower,  # pylint: disable=too-many-arguments
     2265                              sDisHints, sIemHints, asOperands):
    22612266        """
    22622267        Processes one of the a IEMOP_MNEMONIC0EX, IEMOP_MNEMONIC1EX, IEMOP_MNEMONIC2EX,
     
    22892294        else:
    22902295            self.error('%s: already saw a IEMOP_MNEMONIC* macro on line %u for this instruction'
    2291                        % (sMacro, self.iLineMnemonicMacro,));
     2296                       % (sMacro, oInstr.iLineMnemonicMacro,));
    22922297
    22932298        # Mnemonic
     
    23002305        if len(oInstr.aoOperands) not in [0, len(asOperands)]:
    23012306            self.error('%s: number of operands given by @opN does not match macro: %s vs %s'
    2302                        % (sMacro, len(oInstr.aoOperands), len(aoOperands),));
     2307                       % (sMacro, len(oInstr.aoOperands), len(asOperands),));
    23032308        for iOperand, sType in enumerate(asOperands):
    23042309            sWhere = g_kdOpTypes.get(sType, [None, None])[1];
     
    23682373
    23692374
     2375        _ = sAsm;
    23702376        return True;
    23712377
     
    23762382        """
    23772383        if asOperands == 0:
    2378             return self.workerIemOpMnemonicEx(sLower, sLower, sForm, sUpper, sLower, sDisHints, sIemHints, asOperands);
     2384            return self.workerIemOpMnemonicEx(sMacro, sLower, sLower, sForm, sUpper, sLower, sDisHints, sIemHints, asOperands);
    23792385        return self.workerIemOpMnemonicEx(sMacro, sLower + '_' + '_'.join(asOperands), sLower + ' ' + ','.join(asOperands),
    23802386                                          sForm, sUpper, sLower, sDisHints, sIemHints, asOperands);
     
    24312437                self.workerIemOpMnemonicEx(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[4], asArgs[5], asArgs[7], asArgs[8],
    24322438                                           [asArgs[6],]);
    2433             # IEMOP_MNEMONIC2EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_fDisHints, a_fIemHints) \
     2439            # IEMOP_MNEMONIC2EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_fDisHints, a_fIemHints)
    24342440            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC2EX');
    24352441            if asArgs is not None:
    24362442                self.workerIemOpMnemonicEx(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[4], asArgs[5], asArgs[8], asArgs[9],
    24372443                                           [asArgs[6], asArgs[7]]);
    2438             # IEMOP_MNEMONIC3EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_fDisHints, a_fIemHints) \
     2444            # IEMOP_MNEMONIC3EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_fDisHints, a_fIemHints)
    24392445            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC3EX');
    24402446            if asArgs is not None:
    24412447                self.workerIemOpMnemonicEx(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[4], asArgs[5], asArgs[9],
    24422448                                           asArgs[10], [asArgs[6], asArgs[7], asArgs[8],]);
    2443             # IEMOP_MNEMONIC4EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_Op4, a_fDisHints, a_fIemHints) \
     2449            # IEMOP_MNEMONIC4EX(a_Stats, a_szMnemonic, a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_Op4, a_fDisHints,
     2450            #                   a_fIemHints)
    24442451            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC4EX');
    24452452            if asArgs is not None:
     
    24552462            if asArgs is not None:
    24562463                self.workerIemOpMnemonic(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[5], asArgs[6], [asArgs[4],]);
    2457             # IEMOP_MNEMONIC2(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_fDisHints, a_fIemHints) \
     2464            # IEMOP_MNEMONIC2(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_fDisHints, a_fIemHints)
    24582465            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC2');
    24592466            if asArgs is not None:
    24602467                self.workerIemOpMnemonic(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[6], asArgs[7],
    24612468                                         [asArgs[4], asArgs[5],]);
    2462             # IEMOP_MNEMONIC3(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_fDisHints, a_fIemHints) \
     2469            # IEMOP_MNEMONIC3(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_fDisHints, a_fIemHints)
    24632470            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC3');
    24642471            if asArgs is not None:
    24652472                self.workerIemOpMnemonic(asArgs[0], asArgs[1], asArgs[2], asArgs[3], asArgs[7], asArgs[8],
    24662473                                         [asArgs[4], asArgs[5], asArgs[6],]);
    2467             # IEMOP_MNEMONIC4(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_Op4, a_fDisHints, a_fIemHints) \
     2474            # IEMOP_MNEMONIC4(a_Form, a_Upper, a_Lower, a_Op1, a_Op2, a_Op3, a_Op4, a_fDisHints, a_fIemHints)
    24682475            asArgs = self.findAndParseMacroInvocation(sCode, 'IEMOP_MNEMONIC4');
    24692476            if asArgs is not None:
     
    26032610    """
    26042611
    2605     for sName, oMap in sorted(iter(g_dInstructionMaps.items()), key = lambda k_v: k_v[1].sEncoding + ''.join(k_v[1].asLeadOpcodes)):
     2612    for sName, oMap in sorted(iter(g_dInstructionMaps.items()),
     2613                              key = lambda aKV: aKV[1].sEncoding + ''.join(aKV[1].asLeadOpcodes)):
     2614        assert oMap.sName == sName;
    26062615        asLines = [];
    26072616
     
    27432752                    sLine += s;
    27442753
    2745                 # OP("psrlw %Vdq,%Wdq", IDX_ParseModRM, IDX_UseModRM, 0, OP_PSRLW, OP_PARM_Vdq, OP_PARM_Wdq, OP_PARM_NONE, DISOPTYPE_HARMLESS),
     2754                # OP("psrlw %Vdq,%Wdq", IDX_ParseModRM, IDX_UseModRM, 0, OP_PSRLW, OP_PARM_Vdq, OP_PARM_Wdq, OP_PARM_NONE,
     2755                # DISOPTYPE_HARMLESS),
    27462756                # define OP(pszOpcode, idxParse1, idxParse2, idxParse3, opcode, param1, param2, param3, optype) \
    27472757                # { pszOpcode, idxParse1, idxParse2, idxParse3, 0, opcode, param1, param2, param3, 0, 0, optype }
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