Changeset 66306 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Mar 28, 2017 2:49:17 PM (8 years ago)
- svn:sync-xref-src-repo-rev:
- 114234
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66303 r66306 470 470 /* [BS3CG1DST_XMM14_HI] = */ 8, 471 471 /* [BS3CG1DST_XMM15_HI] = */ 8, 472 /* [BS3CG1DST_XMM0_DW0] = */ 4, 473 /* [BS3CG1DST_XMM1_DW0] = */ 4, 474 /* [BS3CG1DST_XMM2_DW0] = */ 4, 475 /* [BS3CG1DST_XMM3_DW0] = */ 4, 476 /* [BS3CG1DST_XMM4_DW0] = */ 4, 477 /* [BS3CG1DST_XMM5_DW0] = */ 4, 478 /* [BS3CG1DST_XMM6_DW0] = */ 4, 479 /* [BS3CG1DST_XMM7_DW0] = */ 4, 480 /* [BS3CG1DST_XMM8_DW0] = */ 4, 481 /* [BS3CG1DST_XMM9_DW0] = */ 4, 482 /* [BS3CG1DST_XMM10_DW0] = */ 4, 483 /* [BS3CG1DST_XMM11_DW0] = */ 4, 484 /* [BS3CG1DST_XMM12_DW0] = */ 4, 485 /* [BS3CG1DST_XMM13_DW0] = */ 4, 486 /* [BS3CG1DST_XMM14_DW0] = */ 4, 487 /* [BS3CG1DST_XMM15_DW0] = */ 4, 472 488 /* [BS3CG1DST_YMM0] = */ 32, 473 489 /* [BS3CG1DST_YMM1] = */ 32, … … 667 683 /* [BS3CG1DST_XMM14_HI] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14]) + sizeof(uint64_t), 668 684 /* [BS3CG1DST_XMM15_HI] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]) + sizeof(uint64_t), 685 /* [BS3CG1DST_XMM0_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[0]), 686 /* [BS3CG1DST_XMM1_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[1]), 687 /* [BS3CG1DST_XMM2_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[2]), 688 /* [BS3CG1DST_XMM3_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[3]), 689 /* [BS3CG1DST_XMM4_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[4]), 690 /* [BS3CG1DST_XMM5_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[5]), 691 /* [BS3CG1DST_XMM6_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[6]), 692 /* [BS3CG1DST_XMM7_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[7]), 693 /* [BS3CG1DST_XMM8_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[8]), 694 /* [BS3CG1DST_XMM9_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[9]), 695 /* [BS3CG1DST_XMM10_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[10]), 696 /* [BS3CG1DST_XMM11_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[11]), 697 /* [BS3CG1DST_XMM12_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[12]), 698 /* [BS3CG1DST_XMM13_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[13]), 699 /* [BS3CG1DST_XMM14_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14]), 700 /* [BS3CG1DST_XMM15_DW0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]), 669 701 670 702 /* [BS3CG1DST_YMM0] = */ ~0U, … … 691 723 #ifdef BS3CG1_DEBUG_CTX_MOD 692 724 /** Destination field names. */ 693 static const struct { char sz[ 8]; } g_aszBs3Cg1DstFields[] =725 static const struct { char sz[10]; } g_aszBs3Cg1DstFields[] = 694 726 { 695 727 { "INVALID" }, … … 864 896 { "XMM14_HI" }, 865 897 { "XMM15_HI" }, 898 { "XMM0_DW0" }, 899 { "XMM1_DW0" }, 900 { "XMM2_DW0" }, 901 { "XMM3_DW0" }, 902 { "XMM4_DW0" }, 903 { "XMM5_DW0" }, 904 { "XMM6_DW0" }, 905 { "XMM7_DW0" }, 906 { "XMM8_DW0" }, 907 { "XMM9_DW0" }, 908 { "XMM10_DW0" }, 909 { "XMM11_DW0" }, 910 { "XMM12_DW0" }, 911 { "XMM13_DW0" }, 912 { "XMM14_DW0" }, 913 { "XMM15_DW0" }, 866 914 { "YMM0" }, 867 915 { "YMM1" }, … … 1233 1281 break; 1234 1282 1283 case BS3CG1ENC_MODRM_Wss_Vss: 1284 if (iEncoding == 0) 1285 { 1286 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1287 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 1288 pThis->aOperands[pThis->iRmOp ].idxField = BS3CG1DST_XMM0_DW0; 1289 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM1_DW0; 1290 } 1291 else if (iEncoding == 1) 1292 { 1293 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM2_DW0; 1294 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1295 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 2 /*iReg*/, 4, 0, BS3CG1OPLOC_MEM_RW); 1296 } 1297 else if (iEncoding == 2) 1298 { 1299 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_DW0; 1300 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1301 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_RW); 1302 } 1303 else 1304 break; 1305 pThis->cbCurInstr = off; 1306 iEncoding++; 1307 break; 1308 1235 1309 case BS3CG1ENC_MODRM_Wsd_Vsd: 1236 1310 if (iEncoding == 0) … … 1490 1564 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_MEM; 1491 1565 pThis->aOperands[1].idxField = BS3CG1DST_INVALID; 1566 break; 1567 1568 case BS3CG1ENC_MODRM_Wss_Vss: 1569 pThis->iRmOp = 0; 1570 pThis->iRegOp = 1; 1571 pThis->aOperands[0].cbOp = 4; 1572 pThis->aOperands[1].cbOp = 4; 1573 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX; 1574 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 1492 1575 break; 1493 1576 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h
r66303 r66306 44 44 BS3CG1OP_Eb, 45 45 BS3CG1OP_Ev, 46 BS3CG1OP_Wss, 46 47 BS3CG1OP_Wsd, 47 48 BS3CG1OP_Wps, … … 50 51 BS3CG1OP_Gb, 51 52 BS3CG1OP_Gv, 53 BS3CG1OP_Vss, 52 54 BS3CG1OP_Vsd, 53 55 BS3CG1OP_Vps, … … 80 82 BS3CG1ENC_MODRM_Eb_Gb, 81 83 BS3CG1ENC_MODRM_Ev_Gv, 84 BS3CG1ENC_MODRM_Wss_Vss, 82 85 BS3CG1ENC_MODRM_Wsd_Vsd, 83 86 BS3CG1ENC_MODRM_Wps_Vps, … … 461 464 BS3CG1DST_XMM14_HI, 462 465 BS3CG1DST_XMM15_HI, 466 BS3CG1DST_XMM0_DW0, 467 BS3CG1DST_XMM1_DW0, 468 BS3CG1DST_XMM2_DW0, 469 BS3CG1DST_XMM3_DW0, 470 BS3CG1DST_XMM4_DW0, 471 BS3CG1DST_XMM5_DW0, 472 BS3CG1DST_XMM6_DW0, 473 BS3CG1DST_XMM7_DW0, 474 BS3CG1DST_XMM8_DW0, 475 BS3CG1DST_XMM9_DW0, 476 BS3CG1DST_XMM10_DW0, 477 BS3CG1DST_XMM11_DW0, 478 BS3CG1DST_XMM12_DW0, 479 BS3CG1DST_XMM13_DW0, 480 BS3CG1DST_XMM14_DW0, 481 BS3CG1DST_XMM15_DW0, 463 482 /* AVX registers. */ 464 483 BS3CG1DST_YMM0,
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