Changeset 66744 in vbox

Timestamp:

May 2, 2017 11:28:41 AM (8 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

115152

Message:

IEM: Implemented movupd Vpd,Wpd (0x66 0x0f 0x10).

Location:

trunk/src/VBox

Files:

• VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h (modified) (1 diff)
• ValidationKit/bootsectors/bs3-cpu-generated-1-template.c (modified) (3 diffs)
• ValidationKit/bootsectors/bs3-cpu-generated-1.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h

@@ -1042 +1042 @@
 
 
-/** Opcode 0x66 0x0f 0x10 - vmovupd Vpd, Wpd */
-FNIEMOP_STUB(iemOp_movupd_Vpd_Wpd);
+/**
+ * @opcode      0x10
+ * @oppfx       0x66
+ * @opcpuid     sse2
+ * @opgroup     og_sse2_pcksclr_datamove
+ * @opxcpttype  4UA
+ * @optest      op1=1 op2=2 -> op1=2
+ * @optest      op1=0 op2=-42 -> op1=-42
+ * @oponlytest
+ */
+FNIEMOP_DEF(iemOp_movupd_Vpd_Wpd)
+{
+    IEMOP_MNEMONIC2(RM, MOVUPD, movupd, Vpd, Wpd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
+    {
+        /*
+         * Register, register.
+         */
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_BEGIN(0, 0);
+        IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT();
+        IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE();
+        IEM_MC_COPY_XREG_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg,
+                              (bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB);
+        IEM_MC_ADVANCE_RIP();
+        IEM_MC_END();
+    }
+    else
+    {
+        /*
+         * Memory, register.
+         */
+        IEM_MC_BEGIN(0, 2);
+        IEM_MC_LOCAL(RTUINT128U,                uSrc); /** @todo optimize this one day... */
+        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
+
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT();
+        IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE();
+
+        IEM_MC_FETCH_MEM_U128(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
+        IEM_MC_STORE_XREG_U128(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg, uSrc);
+
+        IEM_MC_ADVANCE_RIP();
+        IEM_MC_END();
+    }
+    return VINF_SUCCESS;
+}
 
 

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

@@ -1660 +1660 @@
 
 
-static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Vps_Wps(PBS3CG1STATE pThis, unsigned iEncoding)
+static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Vps_Wps__OR__BS3CG1ENC_MODRM_Vpd_Wpd(PBS3CG1STATE pThis,
+                                                                                                    unsigned iEncoding)
 {
     unsigned off;
@@ -2100 +2101 @@
         case BS3CG1ENC_MODRM_Vdq_Wdq:
             return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Vdq_Wdq(pThis, iEncoding);
+        case BS3CG1ENC_MODRM_Vpd_Wpd:
         case BS3CG1ENC_MODRM_Vps_Wps:
-            return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Vps_Wps(pThis, iEncoding);
+            return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_Vps_Wps__OR__BS3CG1ENC_MODRM_Vpd_Wpd(pThis, iEncoding);
         case BS3CG1ENC_MODRM_VssZxReg_Wss:
             return Bs3Cg1EncodeNext_BS3CG1ENC_MODRM_VssZxReg_Wss(pThis, iEncoding);
@@ -2250 +2252 @@
             break;
 
+        case BS3CG1ENC_MODRM_Vpd_Wpd:
         case BS3CG1ENC_MODRM_Vps_Wps:
             pThis->iRmOp             = 1;

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

@@ -105 +105 @@
     BS3CG1ENC_MODRM_Vq_Mq,
     BS3CG1ENC_MODRM_Vdq_Wdq,
+    BS3CG1ENC_MODRM_Vpd_Wpd,
     BS3CG1ENC_MODRM_Vps_Wps,
     BS3CG1ENC_MODRM_VssZxReg_Wss,