VirtualBox

Changeset 66937 in vbox


Ignore:
Timestamp:
May 17, 2017 12:55:04 PM (8 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
115467
Message:

IEM: Use H*Hi notation instead of the complement one (HdqC*).

Location:
trunk
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/disopcode.h

    r66935 r66937  
    10731073/* For making IEM / bs3-cpu-generated-1 happy: */
    10741074#define OP_PARM_Gv_RO           OP_PARM_Gv              /**< Annotates read only first operand (default is readwrite). */
    1075 #define OP_PARM_HdqCss          OP_PARM_Hx              /**< Hdq register complements (high) a ss specifier (low). */
    1076 #define OP_PARM_HdqCsd          OP_PARM_Hx              /**< Hdq register complements (high) a sd specifier (low). */
    1077 #define OP_PARM_HdqCq           OP_PARM_Hx              /**< Hdq register complements (high) a q specifier (low). */
    1078 #define OP_PARM_HqHi            OP_PARM_Hx              /**< Registered referced by VEX.vvvv, bits [127:64]. */
     1075#define OP_PARM_HssHi           OP_PARM_Hx              /**< Register referenced by VEX.vvvv, bits [127:32]. */
     1076#define OP_PARM_HsdHi           OP_PARM_Hx              /**< Register referenced by VEX.vvvv, bits [127:64]. */
     1077#define OP_PARM_HqHi            OP_PARM_Hx              /**< Register referenced by VEX.vvvv, bits [127:64]. */
    10791078#define OP_PARM_M_RO            OP_PARM_M               /**< Annotates read only memory of variable operand size (xrstor). */
    10801079#define OP_PARM_M_RW            OP_PARM_M               /**< Annotates read-write memory of variable operand size (xsave). */

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py

    r66935 r66937  
    273273
    274274    # VEX.vvvv
    275     'HdqCss':       ( 'IDX_UseModRM',       'vvvv',   '%Hx',  'HdqCss',  ),
    276     'HdqCsd':       ( 'IDX_UseModRM',       'vvvv',   '%Hx',  'HdqCsd',  ),
    277     'HdqCq':        ( 'IDX_UseModRM',       'vvvv',   '%Hq',  'HdqCq',   ),
     275    'HssHi':        ( 'IDX_UseModRM',       'vvvv',   '%Hx',  'HssHi',   ),
     276    'HsdHi':        ( 'IDX_UseModRM',       'vvvv',   '%Hx',  'HsdHi',   ),
    278277    'HqHi':         ( 'IDX_UseModRM',       'vvvv',   '%Hq',  'HqHi',    ),
    279278

  • trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap1.cpp.h

    r66935 r66937  
    218218         * @optest      op1=0 op2=0  op3=-22  -> op1=0xffffffea
    219219         * @optest      op1=3 op2=-1 op3=0x77 -> op1=-4294967177
     220         * @optest      op1=3 op2=-2 op3=0x77 -> op1=-8589934473
     221         * @note        HssHi refers to bits 127:32.
    220222         */
    221         IEMOP_MNEMONIC3(VEX_RVM, VMOVSS, vmovss, Vss_WO, HdqCss, Uss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     223        IEMOP_MNEMONIC3(VEX_RVM, VMOVSS, vmovss, Vss_WO, HssHi, Uss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    222224        IEMOP_HLP_DONE_DECODING_NO_AVX_PREFIX();
    223225        IEM_MC_BEGIN(0, 0);
    … …  
    283285         * @optest      op1=3 op2=-1 op3=0x77 ->
    284286         *              op1=0xffffffffffffffff0000000000000077
     287         * @optest      op1=3 op2=0x42 op3=0x77 -> op1=0x420000000000000077
    285288         */
    286         IEMOP_MNEMONIC3(VEX_RVM, VMOVSD, vmovsd, Vsd_WO, HdqCsd, Usd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     289        IEMOP_MNEMONIC3(VEX_RVM, VMOVSD, vmovsd, Vsd_WO, HsdHi, Usd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    287290        IEMOP_HLP_DONE_DECODING_NO_AVX_PREFIX();
    288291        IEM_MC_BEGIN(0, 0);
    … …  
    499502         * @optest      op1=0 op2=0  op3=-22  -> op1=0xffffffea
    500503         * @optest      op1=3 op2=-1 op3=0x77 -> op1=-4294967177
     504         * @optest      op1=3 op2=0x42 op3=0x77 -> op1=0x4200000077
    501505         */
    502         IEMOP_MNEMONIC3(VEX_MVR, VMOVSS, vmovss, Uss_WO, HdqCss, Vss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     506        IEMOP_MNEMONIC3(VEX_MVR, VMOVSS, vmovss, Uss_WO, HssHi, Vss, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    503507        IEMOP_HLP_DONE_DECODING_NO_AVX_PREFIX();
    504508        IEM_MC_BEGIN(0, 0);
    … …  
    564568         * @optest      op1=3 op2=-1 op3=0x77 ->
    565569         *              op1=0xffffffffffffffff0000000000000077
     570         * @optest      op2=0x42 op3=0x77 -> op1=0x420000000000000077
    566571         */
    567         IEMOP_MNEMONIC3(VEX_MVR, VMOVSD, vmovsd, Usd_WO, HdqCsd, Vsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     572        IEMOP_MNEMONIC3(VEX_MVR, VMOVSD, vmovsd, Usd_WO, HsdHi, Vsd, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    568573        IEMOP_HLP_DONE_DECODING_NO_AVX_PREFIX();
    569574        IEM_MC_BEGIN(0, 0);
    … …  
    624629         * @opgroup     og_avx_simdfp_datamerge
    625630         * @opxcpttype  7LZ
    626          * @optest         op2=0x22002201220222032204220522062207
     631         * @optest         op2=0x2200220122022203
    627632         *                 op3=0x3304330533063307
    628633         *              -> op1=0x22002201220222033304330533063307
    629          * @optest      op2=-2  op3=-42 -> op1=-42
    630          * @note        op3 is only a 8-byte high XMM register half.
     634         * @optest      op2=-1  op3=-42 -> op1=-42
     635         * @note        op3 and op2 are only the 8-byte high XMM register halfs.
    631636         */
    632         IEMOP_MNEMONIC3(VEX_RVM, VMOVHLPS, vmovhlps, Vq_WO, HdqCq, UqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     637        IEMOP_MNEMONIC3(VEX_RVM, VMOVHLPS, vmovhlps, Vq_WO, HqHi, UqHi, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    633638
    634639        IEMOP_HLP_DONE_DECODING_NO_AVX_PREFIX_AND_L0();
    … …  
    657662         * @optest      op1=1 op2=0 op3=0 -> op1=0
    658663         * @optest      op1=0 op2=-1 op3=-1 -> op1=-1
    659          * @optest      op1=1 op2=0x20000000000000000 op3=3 -> op1=0x20000000000000003
     664         * @optest      op1=1 op2=2 op3=3 -> op1=0x20000000000000003
    660665         * @optest      op2=-1 op3=0x42 -> op1=0xffffffffffffffff0000000000000042
    661666         */
    662         IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVLPS, vmovlps, Vq_WO, HdqCq, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
     667        IEMOP_MNEMONIC3(VEX_RVM_MEM, VMOVLPS, vmovlps, Vq_WO, HqHi, Mq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZE);
    663668
    664669        IEM_MC_BEGIN(0, 2);

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-data.py

    r66935 r66937  
    306306            self.sEncoding     += '_' + oOp.sType;
    307307        if oInstr.fUnused:
    308             print('DEBUG: Unused Bs3Cg1Instruction: %s\n' % (oInstr.sEncoding,));
    309308            if oInstr.sInvalidStyle == 'immediate' and oInstr.sSubOpcode:
    310309                self.sEncoding += '_MOD_EQ_3' if oInstr.sSubOpcode == '11 mr/reg' else '_MOD_NE_3';

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

    r66935 r66937  
    552552    /* [BS3CG1DST_XMM14_DW0_ZX] =*/ 4,
    553553    /* [BS3CG1DST_XMM15_DW0_ZX] =*/ 4,
     554    /* [BS3CG1DST_XMM0_HI96] = */   12,
     555    /* [BS3CG1DST_XMM1_HI96] = */   12,
     556    /* [BS3CG1DST_XMM2_HI96] = */   12,
     557    /* [BS3CG1DST_XMM3_HI96] = */   12,
     558    /* [BS3CG1DST_XMM4_HI96] = */   12,
     559    /* [BS3CG1DST_XMM5_HI96] = */   12,
     560    /* [BS3CG1DST_XMM6_HI96] = */   12,
     561    /* [BS3CG1DST_XMM7_HI96] = */   12,
     562    /* [BS3CG1DST_XMM8_HI96] = */   12,
     563    /* [BS3CG1DST_XMM9_HI96] = */   12,
     564    /* [BS3CG1DST_XMM10_HI96] =*/   12,
     565    /* [BS3CG1DST_XMM11_HI96] =*/   12,
     566    /* [BS3CG1DST_XMM12_HI96] =*/   12,
     567    /* [BS3CG1DST_XMM13_HI96] =*/   12,
     568    /* [BS3CG1DST_XMM14_HI96] =*/   12,
     569    /* [BS3CG1DST_XMM15_HI96] =*/   12,
    554570    /* [BS3CG1DST_YMM0] = */        32,
    555571    /* [BS3CG1DST_YMM1] = */        32,
    … …  
    800816    /* [BS3CG1DST_XMM14_DW0_ZX] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14]),
    801817    /* [BS3CG1DST_XMM15_DW0_ZX] =*/ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]),
     818    /* [BS3CG1DST_XMM0_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[0].au32[1]),
     819    /* [BS3CG1DST_XMM1_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[1].au32[1]),
     820    /* [BS3CG1DST_XMM2_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[2].au32[1]),
     821    /* [BS3CG1DST_XMM3_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[3].au32[1]),
     822    /* [BS3CG1DST_XMM4_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[4].au32[1]),
     823    /* [BS3CG1DST_XMM5_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[5].au32[1]),
     824    /* [BS3CG1DST_XMM6_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[6].au32[1]),
     825    /* [BS3CG1DST_XMM7_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[7].au32[1]),
     826    /* [BS3CG1DST_XMM8_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[8].au32[1]),
     827    /* [BS3CG1DST_XMM9_HI96] = */   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[9].au32[1]),
     828    /* [BS3CG1DST_XMM10_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[10].au32[1]),
     829    /* [BS3CG1DST_XMM11_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[11].au32[1]),
     830    /* [BS3CG1DST_XMM12_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[12].au32[1]),
     831    /* [BS3CG1DST_XMM13_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[13].au32[1]),
     832    /* [BS3CG1DST_XMM14_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[14].au32[1]),
     833    /* [BS3CG1DST_XMM15_HI96] =*/   sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15].au32[1]),
    802834
    803835    /* [BS3CG1DST_YMM0] = */        ~0U,
    … …  
    10481080    { "XMM14_DW0_ZX" },
    10491081    { "XMM15_DW0_ZX" },
     1082    { "XMM0_HI96" },
     1083    { "XMM1_HI96" },
     1084    { "XMM2_HI96" },
     1085    { "XMM3_HI96" },
     1086    { "XMM4_HI96" },
     1087    { "XMM5_HI96" },
     1088    { "XMM6_HI96" },
     1089    { "XMM7_HI96" },
     1090    { "XMM8_HI96" },
     1091    { "XMM9_HI96" },
     1092    { "XMM10_HI96" },
     1093    { "XMM11_HI96" },
     1094    { "XMM12_HI96" },
     1095    { "XMM13_HI96" },
     1096    { "XMM14_HI96" },
     1097    { "XMM15_HI96" },
    10501098    { "YMM0" },
    10511099    { "YMM1" },
    … …  
    24312479 */
    24322480static unsigned BS3_NEAR_CODE
    2433 Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)
     2481Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)
    24342482{
    24352483    unsigned off;
    … …  
    35763624            break;
    35773625
    3578         case BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss:
    3579             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa;
     3626        case BS3CG1ENC_VEX_MODRM_Vss_WO_HssHi_Uss:
     3627            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa;
    35803628            pThis->iRegOp            = 0;
    35813629            pThis->iRmOp             = 2;
    35823630            pThis->aOperands[0].cbOp = 16;
    3583             pThis->aOperands[1].cbOp = 16;
     3631            pThis->aOperands[1].cbOp = 12;
    35843632            pThis->aOperands[2].cbOp = 4;
    35853633            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    … …  
    35873635            pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_CTX;
    35883636            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3589             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3637            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI96;
    35903638            pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_DW0;
    35913639            break;
    … …  
    36033651            break;
    36043652
    3605         case BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd:
    3606             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa;
     3653        case BS3CG1ENC_VEX_MODRM_Vsd_WO_HsdHi_Usd:
     3654            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa;
    36073655            pThis->iRegOp            = 0;
    36083656            pThis->iRmOp             = 2;
    36093657            pThis->aOperands[0].cbOp = 16;
    3610             pThis->aOperands[1].cbOp = 16;
     3658            pThis->aOperands[1].cbOp = 8;
    36113659            pThis->aOperands[2].cbOp = 8;
    36123660            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    … …  
    36143662            pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_CTX;
    36153663            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3616             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3664            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI;
    36173665            pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_LO;
    36183666            break;
    36193667
    3620         case BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_UqHi:
     3668        case BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi:
    36213669            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Wip_OR_ViceVersa;
    36223670            pThis->iRegOp            = 0;
    36233671            pThis->iRmOp             = 2;
    36243672            pThis->aOperands[0].cbOp = 16;
    3625             pThis->aOperands[1].cbOp = 16;
     3673            pThis->aOperands[1].cbOp = 8;
    36263674            pThis->aOperands[2].cbOp = 8;
    36273675            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    … …  
    36293677            pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_CTX;
    36303678            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3631             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3679            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI;
    36323680            pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_HI;
    3633             break;
    3634 
    3635         case BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq:
    3636             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Msomething_Wip_OR_ViceVersa;
    3637             pThis->iRegOp            = 0;
    3638             pThis->iRmOp             = 2;
    3639             pThis->aOperands[0].cbOp = 16;
    3640             pThis->aOperands[1].cbOp = 16;
    3641             pThis->aOperands[2].cbOp = 8;
    3642             pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    3643             pThis->aOperands[1].enmLocation  = BS3CG1OPLOC_CTX;
    3644             pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_MEM;
    3645             pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3646             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
    3647             pThis->aOperands[2].idxFieldBase = BS3CG1DST_INVALID;
    36483681            break;
    36493682
    … …  
    36873720            break;
    36883721
    3689         case BS3CG1ENC_VEX_MODRM_Uss_WO_HdqCss_Vss:
    3690             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa;
     3722        case BS3CG1ENC_VEX_MODRM_Uss_WO_HssHi_Vss:
     3723            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa;
    36913724            pThis->iRegOp            = 2;
    36923725            pThis->iRmOp             = 0;
    36933726            pThis->aOperands[0].cbOp = 16;
    3694             pThis->aOperands[1].cbOp = 16;
     3727            pThis->aOperands[1].cbOp = 96;
    36953728            pThis->aOperands[2].cbOp = 4;
    36963729            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    … …  
    36983731            pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_CTX;
    36993732            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3700             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3733            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI96;
    37013734            pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_DW0;
    37023735            break;
    37033736
    3704         case BS3CG1ENC_VEX_MODRM_Usd_WO_HdqCsd_Vsd:
    3705             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_HdqCsomething_Usomething_Lip_Wip_OR_ViceVersa;
     3737        case BS3CG1ENC_VEX_MODRM_Usd_WO_HsdHi_Vsd:
     3738            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Hsomething_Usomething_Lip_Wip_OR_ViceVersa;
    37063739            pThis->iRegOp            = 2;
    37073740            pThis->iRmOp             = 0;
    37083741            pThis->aOperands[0].cbOp = 16;
    3709             pThis->aOperands[1].cbOp = 16;
     3742            pThis->aOperands[1].cbOp = 8;
    37103743            pThis->aOperands[2].cbOp = 8;
    37113744            pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    … …  
    37133746            pThis->aOperands[2].enmLocation  = BS3CG1OPLOC_CTX;
    37143747            pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3715             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3748            pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0_HI;
    37163749            pThis->aOperands[2].idxFieldBase = BS3CG1DST_XMM0_LO;
    37173750            break;
    … …  
    44264459            /* Optimized access to XMM and STx registers. */
    44274460            if (   pThis->pExtCtx->enmMethod != BS3EXTCTXMETHOD_ANCIENT
    4428                 && offField - sizeof(BS3REGCTX) <= RT_UOFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[15]) )
     4461                && offField - sizeof(BS3REGCTX) < RT_UOFFSET_AFTER(BS3EXTCTX, Ctx.x87.aXMM[15]) )
    44294462                PtrField.pb = (uint8_t *)pThis->pExtCtx + offField - sizeof(BS3REGCTX);
    44304463            /* Non-register operands: */

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

    r66935 r66937  
    6161    BS3CG1OP_Gv,
    6262    BS3CG1OP_Gv_RO,
    63     BS3CG1OP_HdqCss,
    64     BS3CG1OP_HdqCsd,
    65     BS3CG1OP_HdqCq,
     63    BS3CG1OP_HssHi,
     64    BS3CG1OP_HsdHi,
    6665    BS3CG1OP_HqHi,
    6766    BS3CG1OP_Nq,
    … …  
    152151    BS3CG1ENC_VEX_MODRM_Vps_WO_Wps,
    153152    BS3CG1ENC_VEX_MODRM_Vpd_WO_Wpd,
    154     BS3CG1ENC_VEX_MODRM_Vss_WO_HdqCss_Uss,
    155     BS3CG1ENC_VEX_MODRM_Vsd_WO_HdqCsd_Usd,
    156     BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_UqHi,
    157     BS3CG1ENC_VEX_MODRM_Vq_WO_HdqCq_Mq,
     153    BS3CG1ENC_VEX_MODRM_Vss_WO_HssHi_Uss,
     154    BS3CG1ENC_VEX_MODRM_Vsd_WO_HsdHi_Usd,
     155    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_UqHi,
    158156    BS3CG1ENC_VEX_MODRM_Vq_WO_HqHi_Mq,
    159157    BS3CG1ENC_VEX_MODRM_VssZx_WO_Md,
    … …  
    162160    BS3CG1ENC_VEX_MODRM_Md_WO_Vss,
    163161    BS3CG1ENC_VEX_MODRM_Mq_WO_Vsd,
    164     BS3CG1ENC_VEX_MODRM_Uss_WO_HdqCss_Vss,
    165     BS3CG1ENC_VEX_MODRM_Usd_WO_HdqCsd_Vsd,
     162    BS3CG1ENC_VEX_MODRM_Uss_WO_HssHi_Vss,
     163    BS3CG1ENC_VEX_MODRM_Usd_WO_HsdHi_Vsd,
    166164    BS3CG1ENC_VEX_MODRM_Wps_WO_Vps,
    167165    BS3CG1ENC_VEX_MODRM_Wpd_WO_Vpd,
    … …  
    610608    BS3CG1DST_XMM14_DW0_ZX,
    611609    BS3CG1DST_XMM15_DW0_ZX,
     610    BS3CG1DST_XMM0_HI96,
     611    BS3CG1DST_XMM1_HI96,
     612    BS3CG1DST_XMM2_HI96,
     613    BS3CG1DST_XMM3_HI96,
     614    BS3CG1DST_XMM4_HI96,
     615    BS3CG1DST_XMM5_HI96,
     616    BS3CG1DST_XMM6_HI96,
     617    BS3CG1DST_XMM7_HI96,
     618    BS3CG1DST_XMM8_HI96,
     619    BS3CG1DST_XMM9_HI96,
     620    BS3CG1DST_XMM10_HI96,
     621    BS3CG1DST_XMM11_HI96,
     622    BS3CG1DST_XMM12_HI96,
     623    BS3CG1DST_XMM13_HI96,
     624    BS3CG1DST_XMM14_HI96,
     625    BS3CG1DST_XMM15_HI96,
    612626    /* AVX registers. */
    613627    BS3CG1DST_YMM0,
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