VirtualBox

Ignore:
Timestamp:
May 18, 2017 2:24:43 PM (8 years ago)
Author:
vboxsync
Message:

IEM: Implemented vmovsldup Vx,Wx (VEX.F3.0F 12).

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

    r66937 r66950  
    101101    BS3CG1OPLOC_END
    102102} BS3CG1OPLOC;
     103AssertCompile(BS3CG1OPLOC_END <= 16);
    103104
    104105
    … …  
    165166    /** Operand size in bytes (0 if not applicable). */
    166167    uint8_t                 cbOperand;
     168    /** Current VEX.L value (UINT8_MAX if not applicable). */
     169    uint8_t                 uVexL;
    167170    /** Current target ring (0..3). */
    168171    uint8_t                 uCpl;
    … …  
    208211        /** BS3CG1OPLOC_XXX. */
    209212        uint8_t             enmLocation;
     213        /** BS3CG1OPLOC_XXX for memory encodings (MODRM.rm field). */
     214        uint8_t             enmLocationMem : 4;
     215        /** BS3CG1OPLOC_XXX for register encodings (MODRM.rm field). */
     216        uint8_t             enmLocationReg : 4;
    210217        /** The BS3CG1DST value for this field.
    211218         * Set to BS3CG1DST_INVALID if memory or immediate.  */
    212219        uint8_t             idxField;
    213220        /** The base BS3CG1DST value for this field.
    214          * Used only by some generalized encoders when dealing with
    215          * registers. */
     221         * Used only by some generalized encoders when dealing with registers. */
    216222        uint8_t             idxFieldBase;
    217223        /** Depends on enmLocation.
    … …  
    11671173
    11681174/**
    1169  * Checks if >= 16 byte SSE/AVX alignment are exempted for the exception type.
     1175 * Checks if >= 16 byte SSE alignment are exempted for the exception type.
    11701176 *
    11711177 * @returns true / false.
    … …  
    11761182    switch (enmXcptType)
    11771183    {
     1184        case BS3CG1XCPTTYPE_1:
     1185        case BS3CG1XCPTTYPE_2:
     1186        case BS3CG1XCPTTYPE_4:
     1187            return false;
     1188        case BS3CG1XCPTTYPE_3:
    11781189        case BS3CG1XCPTTYPE_4UA:
    11791190        case BS3CG1XCPTTYPE_5:
    11801191            return true;
     1192        default:
     1193            return false;
     1194    }
     1195}
     1196
     1197
     1198/**
     1199 * Checks if >= 16 byte AVX alignment are exempted for the exception type.
     1200 *
     1201 * @returns true / false.
     1202 * @param   enmXcptType         The type to check.
     1203 */
     1204static bool BS3_NEAR_CODE Bs3Cg1XcptTypeIsVexUnaligned(BS3CG1XCPTTYPE enmXcptType)
     1205{
     1206    switch (enmXcptType)
     1207    {
     1208        case BS3CG1XCPTTYPE_1:
     1209            return false;
     1210
     1211        case BS3CG1XCPTTYPE_2:
     1212        case BS3CG1XCPTTYPE_3:
     1213        case BS3CG1XCPTTYPE_4:
     1214        case BS3CG1XCPTTYPE_4UA:
     1215        case BS3CG1XCPTTYPE_5:
     1216        case BS3CG1XCPTTYPE_6:
     1217        case BS3CG1XCPTTYPE_11:
     1218        case BS3CG1XCPTTYPE_12:
     1219            return true;
     1220
    11811221        default:
    11821222            return false;
    … …  
    13191359
    13201360
     1361#if 0 /* unused */
    13211362/** Also encodes idxField of the register operand using idxFieldBase.   */
    13221363static unsigned BS3_NEAR_CODE
    … …  
    13271368    return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMissalign, enmLocation);
    13281369}
    1329 
     1370#endif
    13301371
    13311372/** Also encodes idxField of the register operand using idxFieldBase.   */
    … …  
    21852226    pThis->abCurInstr[offDst]     = 0xc5; /* vex2 */
    21862227    pThis->abCurInstr[offDst + 1] = b;
     2228    pThis->uVexL                  = uVexL;
    21872229    return offDst + 2;
    21882230}
    … …  
    22282270    pThis->abCurInstr[offDst + 1] = b1;
    22292271    pThis->abCurInstr[offDst + 2] = b2;
     2272    pThis->uVexL                  = uVexL;
    22302273    return offDst + 3;
    22312274}
    … …  
    22862329        off = Bs3Cg1InsertOpcodes(pThis, off);
    22872330        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
    2288         if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     2331        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    22892332            pThis->bAlignmentXcpt = X86_XCPT_GP;
    22902333        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3;
    … …  
    22952338        off = Bs3Cg1InsertOpcodes(pThis, off);
    22962339        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
    2297         if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     2340        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    22982341            pThis->bAlignmentXcpt = X86_XCPT_GP;
    22992342        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3;
    … …  
    23712414        off = Bs3Cg1InsertOpcodes(pThis, off);
    23722415        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
    2373         if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     2416        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    23742417            pThis->bAlignmentXcpt = X86_XCPT_GP;
    23752418        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3;
    … …  
    23802423        off = Bs3Cg1InsertOpcodes(pThis, off);
    23812424        off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM);
    2382         if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     2425        if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    23832426            pThis->bAlignmentXcpt = X86_XCPT_GP;
    23842427        pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_YMM3;
    … …  
    29673010 * Wip = VEX.W ignored.
    29683011 */
    2969 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip(PBS3CG1STATE pThis, unsigned iEncoding)
     3012static unsigned BS3_NEAR_CODE
     3013Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip_OR_ViceVersa(PBS3CG1STATE pThis, unsigned iEncoding)
    29703014{
    29713015    unsigned off;
    … …  
    29773021            off = Bs3Cg1InsertOpcodes(pThis, off);
    29783022            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     3023            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRegOp].enmLocationReg;
    29793024            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
    29803025            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
    … …  
    29963041            break;
    29973042        case 3:
     3043            pThis->aOperands[pThis->iRmOp].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
    29983044            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
    29993045            off = Bs3Cg1InsertOpcodes(pThis, off);
    3000             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 2 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM_WO);
     3046            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 0);
    30013047            break;
    30023048        case 4:
    30033049            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    30043050            off = Bs3Cg1InsertOpcodes(pThis, off);
    3005             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM_WO);
     3051            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
    30063052            break;
    30073053        case 5:
    30083054            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored */);
    30093055            off = Bs3Cg1InsertOpcodes(pThis, off);
    3010             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 16, 0, BS3CG1OPLOC_MEM_WO);
     3056            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
    30113057            break;
    30123058        case 6:
    30133059            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/);
    30143060            off = Bs3Cg1InsertOpcodes(pThis, off);
    3015             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
    3016             if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     3061            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3062            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    30173063                pThis->bAlignmentXcpt = X86_XCPT_GP;
    30183064            break;
    … …  
    30203066            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    30213067            off = Bs3Cg1InsertOpcodes(pThis, off);
    3022             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
    3023             if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     3068            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3069            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    30243070                pThis->bAlignmentXcpt = X86_XCPT_GP;
    30253071            break;
    … …  
    30293075            off = Bs3Cg1InsertOpcodes(pThis, off);
    30303076            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     3077            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
    30313078            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
    30323079            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
    3033             pThis->aOperands[pThis->iRmOp ].enmLocation = BS3CG1OPLOC_CTX_ZX_VLMAX;
    30343080            pThis->fInvalidEncoding = true;
    30353081            break;
    … …  
    30523098            pThis->aOperands[pThis->iRmOp ].cbOp         = 32;
    30533099            pThis->aOperands[pThis->iRmOp ].idxFieldBase = BS3CG1DST_YMM0;
    3054             pThis->aOperands[pThis->iRmOp ].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
     3100            pThis->aOperands[pThis->iRmOp ].enmLocation  = pThis->aOperands[pThis->iRmOp].enmLocationReg;
    30553101            pThis->aOperands[pThis->iRegOp].cbOp         = 32;
    30563102            pThis->aOperands[pThis->iRegOp].idxFieldBase = BS3CG1DST_YMM0;
    … …  
    30793125            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/);
    30803126            off = Bs3Cg1InsertOpcodes(pThis, off);
    3081             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 2 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM_WO);
     3127            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem;
     3128            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 0);
    30823129            break;
    30833130        case 24:
    30843131            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    30853132            off = Bs3Cg1InsertOpcodes(pThis, off);
    3086             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM_WO);
     3133            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
    30873134            break;
    30883135        case 25:
    30893136            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 1 /*W - ignored */);
    30903137            off = Bs3Cg1InsertOpcodes(pThis, off);
    3091             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 32, 0, BS3CG1OPLOC_MEM_WO);
     3138            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 0);
    30923139            break;
    30933140        case 26:
    30943141            off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/);
    30953142            off = Bs3Cg1InsertOpcodes(pThis, off);
    3096             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
    3097             if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     3143            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3144            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    30983145                pThis->bAlignmentXcpt = X86_XCPT_GP;
    30993146            break;
    … …  
    31013148            off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/);
    31023149            off = Bs3Cg1InsertOpcodes(pThis, off);
    3103             off = Bs3Cfg1EncodeMemMod0DispWithRegField(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMissalign*/, BS3CG1OPLOC_MEM_WO);
    3104             if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType))
     3150            off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMissalign*/);
     3151            if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType))
    31053152                pThis->bAlignmentXcpt = X86_XCPT_GP;
    31063153            break;
    … …  
    31103157            off = Bs3Cg1InsertOpcodes(pThis, off);
    31113158            pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0);
     3159            pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg;
    31123160            pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0;
    31133161            pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1;
    … …  
    32873335{
    32883336    pThis->bAlignmentXcpt = UINT8_MAX;
     3337    pThis->uVexL = UINT8_MAX;
    32893338    if (pThis->pfnEncoder)
    32903339        return pThis->pfnEncoder(pThis, iEncoding);
    … …  
    36963745            break;
    36973746
     3747        case BS3CG1ENC_VEX_MODRM_Vx_WO_Wx:
     3748            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip_OR_ViceVersa;
     3749            pThis->iRmOp             = 1;
     3750            pThis->iRegOp            = 0;
     3751            pThis->aOperands[0].cbOp = 16;
     3752            pThis->aOperands[1].cbOp = 16;
     3753            pThis->aOperands[0].enmLocation     = BS3CG1OPLOC_CTX_ZX_VLMAX;
     3754            pThis->aOperands[1].enmLocation     = BS3CG1OPLOC_CTX;
     3755            pThis->aOperands[1].enmLocationReg  = BS3CG1OPLOC_CTX;
     3756            pThis->aOperands[1].enmLocationMem  = BS3CG1OPLOC_MEM;
     3757            pThis->aOperands[0].idxFieldBase    = BS3CG1DST_XMM0;
     3758            pThis->aOperands[1].idxFieldBase    = BS3CG1DST_XMM0;
     3759            break;
     3760
    36983761        case BS3CG1ENC_VEX_MODRM_Md_WO_Vss:
    36993762            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_VsomethingWO_Msomething_Wip_Lig_OR_ViceVersa;
    … …  
    37523815        case BS3CG1ENC_VEX_MODRM_Wps_WO_Vps:
    37533816        case BS3CG1ENC_VEX_MODRM_Wpd_WO_Vpd:
    3754             pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip;
     3817            pThis->pfnEncoder        = Bs3Cg1EncodeNext_VEX_MODRM_WsomethingWO_Vsomething_Wip_OR_ViceVersa;
    37553818            pThis->iRmOp             = 0;
    37563819            pThis->iRegOp            = 1;
    37573820            pThis->aOperands[0].cbOp = 16;
    37583821            pThis->aOperands[1].cbOp = 16;
    3759             pThis->aOperands[0].enmLocation  = BS3CG1OPLOC_CTX_ZX_VLMAX;
    3760             pThis->aOperands[1].enmLocation  = BS3CG1OPLOC_CTX;
    3761             pThis->aOperands[0].idxFieldBase = BS3CG1DST_XMM0;
    3762             pThis->aOperands[1].idxFieldBase = BS3CG1DST_XMM0;
     3822            pThis->aOperands[0].enmLocation     = BS3CG1OPLOC_CTX_ZX_VLMAX;
     3823            pThis->aOperands[0].enmLocationReg  = BS3CG1OPLOC_CTX_ZX_VLMAX;
     3824            pThis->aOperands[0].enmLocationMem  = BS3CG1OPLOC_MEM;
     3825            pThis->aOperands[1].enmLocation     = BS3CG1OPLOC_CTX;
     3826            pThis->aOperands[0].idxFieldBase    = BS3CG1DST_XMM0;
     3827            pThis->aOperands[1].idxFieldBase    = BS3CG1DST_XMM0;
    37633828            break;
    37643829
    … …  
    40474112            CASE_PRED(BS3CG1PRED_SIZE_O32, pThis->cbOperand == 4);
    40484113            CASE_PRED(BS3CG1PRED_SIZE_O64, pThis->cbOperand == 8);
     4114            CASE_PRED(BS3CG1PRED_VEXL_0, pThis->uVexL == 0);
     4115            CASE_PRED(BS3CG1PRED_VEXL_1, pThis->uVexL == 1);
    40494116            CASE_PRED(BS3CG1PRED_RING_0, pThis->uCpl == 0);
    40504117            CASE_PRED(BS3CG1PRED_RING_1, pThis->uCpl == 1);
    … …  
    53575424                                }
    53585425                            }
     5426#if 1
     5427                            else ASMHalt();
     5428#endif
    53595429                        }
    53605430                        else
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