Changeset 67003 in vbox for trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
- Timestamp:
- May 22, 2017 10:03:15 AM (8 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c
r66992 r67003 471 471 /* [BS3CG1DST_MM6] = */ 8, 472 472 /* [BS3CG1DST_MM7] = */ 8, 473 /* [BS3CG1DST_MM0_LO_ZX] = */ 4, 474 /* [BS3CG1DST_MM1_LO_ZX] = */ 4, 475 /* [BS3CG1DST_MM2_LO_ZX] = */ 4, 476 /* [BS3CG1DST_MM3_LO_ZX] = */ 4, 477 /* [BS3CG1DST_MM4_LO_ZX] = */ 4, 478 /* [BS3CG1DST_MM5_LO_ZX] = */ 4, 479 /* [BS3CG1DST_MM6_LO_ZX] = */ 4, 480 /* [BS3CG1DST_MM7_LO_ZX] = */ 4, 473 481 /* [BS3CG1DST_XMM0] = */ 16, 474 482 /* [BS3CG1DST_XMM1] = */ 16, … … 734 742 /* [BS3CG1DST_MM6] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[6]), 735 743 /* [BS3CG1DST_MM7] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[7]), 744 /* [BS3CG1DST_MM0_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[0]), 745 /* [BS3CG1DST_MM1_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[1]), 746 /* [BS3CG1DST_MM2_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[2]), 747 /* [BS3CG1DST_MM3_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[3]), 748 /* [BS3CG1DST_MM4_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[4]), 749 /* [BS3CG1DST_MM5_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[5]), 750 /* [BS3CG1DST_MM6_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[6]), 751 /* [BS3CG1DST_MM7_LO_ZX] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aRegs[7]), 736 752 737 753 /* [BS3CG1DST_XMM0] = */ sizeof(BS3REGCTX) + RT_OFFSETOF(BS3EXTCTX, Ctx.x87.aXMM[0]), … … 999 1015 { "MM6" }, 1000 1016 { "MM7" }, 1017 { "MM0_LO_ZX" }, 1018 { "MM1_LO_ZX" }, 1019 { "MM2_LO_ZX" }, 1020 { "MM3_LO_ZX" }, 1021 { "MM4_LO_ZX" }, 1022 { "MM5_LO_ZX" }, 1023 { "MM6_LO_ZX" }, 1024 { "MM7_LO_ZX" }, 1001 1025 { "XMM0" }, 1002 1026 { "XMM1" }, … … 1293 1317 1294 1318 static unsigned BS3_NEAR_CODE Bs3Cfg1EncodeMemMod0Disp(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, uint8_t iReg, 1295 uint8_t cbOp, uint8_t cbMis salign, BS3CG1OPLOC enmLocation)1319 uint8_t cbOp, uint8_t cbMisalign, BS3CG1OPLOC enmLocation) 1296 1320 { 1297 1321 pThis->aOperands[pThis->iRmOp].idxField = BS3CG1DST_INVALID; 1298 1322 pThis->aOperands[pThis->iRmOp].enmLocation = enmLocation; 1299 1323 pThis->aOperands[pThis->iRmOp].cbOp = cbOp; 1300 pThis->aOperands[pThis->iRmOp].off = cbOp + cbMis salign;1324 pThis->aOperands[pThis->iRmOp].off = cbOp + cbMisalign; 1301 1325 1302 1326 if ( BS3_MODE_IS_16BIT_CODE(pThis->bMode) … … 1317 1341 { 1318 1342 pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 6 /*disp16*/); 1319 *(uint16_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMis salign;1343 *(uint16_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMisalign; 1320 1344 off += 2; 1321 1345 } … … 1323 1347 { 1324 1348 pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 5 /*disp32*/); 1325 *(uint32_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMis salign;1349 *(uint32_t *)&pThis->abCurInstr[off] = pThis->DataPgFar.off + X86_PAGE_SIZE - cbOp - cbMisalign; 1326 1350 off += 4; 1327 1351 } … … 1334 1358 */ 1335 1359 pThis->abCurInstr[off++] = X86_MODRM_MAKE(0, iReg, 5 /*disp32*/); 1336 *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMis salign;1360 *(uint32_t *)&pThis->abCurInstr[off] = BS3_FP_OFF(pThis->pbDataPg) + X86_PAGE_SIZE - cbOp - cbMisalign; 1337 1361 1338 1362 #if ARCH_BITS == 64 … … 1347 1371 * Fill the memory with 0xcc. 1348 1372 */ 1349 switch (cbOp + cbMis salign)1373 switch (cbOp + cbMisalign) 1350 1374 { 1351 1375 case 8: pThis->pbDataPg[X86_PAGE_SIZE - 8] = 0xcc; /* fall thru */ … … 1360 1384 default: 1361 1385 { 1362 BS3CG1_DPRINTF(("Bs3MemSet(%p,%#x,%#x)\n", &pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMis salign], 0xcc, cbOp - cbMissalign));1363 Bs3MemSet(&pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMis salign], 0xcc, cbOp - cbMissalign);1386 BS3CG1_DPRINTF(("Bs3MemSet(%p,%#x,%#x)\n", &pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMisalign], 0xcc, cbOp - cbMisalign)); 1387 Bs3MemSet(&pThis->pbDataPg[X86_PAGE_SIZE - cbOp - cbMisalign], 0xcc, cbOp - cbMisalign); 1364 1388 break; 1365 1389 } … … 1374 1398 static unsigned BS3_NEAR_CODE 1375 1399 Bs3Cfg1EncodeMemMod0DispWithRegField(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, uint8_t iReg, 1376 uint8_t cbOp, uint8_t cbMis salign, BS3CG1OPLOC enmLocation)1400 uint8_t cbOp, uint8_t cbMisalign, BS3CG1OPLOC enmLocation) 1377 1401 { 1378 1402 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg; 1379 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMis salign, enmLocation);1403 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, cbOp, cbMisalign, enmLocation); 1380 1404 } 1381 1405 #endif … … 1384 1408 static unsigned BS3_NEAR_CODE 1385 1409 Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(PBS3CG1STATE pThis, bool fAddrOverride, unsigned off, 1386 uint8_t iReg, uint8_t cbMis salign)1410 uint8_t iReg, uint8_t cbMisalign) 1387 1411 { 1388 1412 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + iReg; 1389 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, pThis->aOperands[pThis->iRmOp].cbOp, cbMis salign,1413 return Bs3Cfg1EncodeMemMod0Disp(pThis, fAddrOverride, off, iReg & 7, pThis->aOperands[pThis->iRmOp].cbOp, cbMisalign, 1390 1414 pThis->aOperands[pThis->iRmOp].enmLocation); 1391 1415 } … … 1555 1579 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_DW0; 1556 1580 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1557 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);1581 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 1558 1582 } 1559 1583 else … … 1584 1608 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 1585 1609 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1586 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);1610 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 1587 1611 } 1588 1612 else … … 1613 1637 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 1614 1638 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1615 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);1639 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 1616 1640 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 1617 1641 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 1644 1668 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 1645 1669 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1646 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);1670 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 1647 1671 } 1648 1672 else … … 1677 1701 1678 1702 1703 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_PdZx_WO_Ed_WZ(PBS3CG1STATE pThis, unsigned iEncoding) 1704 { 1705 unsigned off; 1706 switch (iEncoding) 1707 { 1708 case 0: 1709 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg; 1710 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1711 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 1712 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0; 1713 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1; 1714 break; 1715 case 1: 1716 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1717 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1718 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 1719 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; 1720 break; 1721 case 2: 1722 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1723 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1724 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1725 break; 1726 case 3: 1727 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1728 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1729 break; 1730 1731 default: 1732 return 0; 1733 } 1734 pThis->cbCurInstr = off; 1735 return iEncoding + 1; 1736 } 1737 1738 1739 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Pq_WO_Eq_WNZ(PBS3CG1STATE pThis, unsigned iEncoding) 1740 { 1741 #if ARCH_BITS == 64 1742 if (BS3CG1_IS_64BIT_TARGET(pThis)) 1743 { 1744 unsigned off; 1745 switch (iEncoding) 1746 { 1747 case 0: 1748 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationReg; 1749 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1750 pThis->abCurInstr[off++] = REX_W___; 1751 off = Bs3Cg1InsertOpcodes(pThis, off); 1752 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 1, 0); 1753 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 0; 1754 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 1; 1755 break; 1756 case 1: 1757 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1758 pThis->abCurInstr[off++] = REX_W___; 1759 off = Bs3Cg1InsertOpcodes(pThis, off); 1760 pThis->abCurInstr[off++] = X86_MODRM_MAKE(3, 6, 2); 1761 pThis->aOperands[pThis->iRmOp ].idxField = pThis->aOperands[pThis->iRmOp ].idxFieldBase + 2; 1762 pThis->aOperands[pThis->iRegOp].idxField = pThis->aOperands[pThis->iRegOp].idxFieldBase + 6; 1763 break; 1764 case 2: 1765 pThis->aOperands[pThis->iRmOp ].enmLocation = pThis->aOperands[pThis->iRmOp].enmLocationMem; 1766 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1767 pThis->abCurInstr[off++] = REX_W___; 1768 off = Bs3Cg1InsertOpcodes(pThis, off); 1769 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 4 /*iReg*/, 0 /*cbMisalign*/); 1770 break; 1771 case 3: 1772 off = Bs3Cg1InsertReqPrefix(pThis, 0); 1773 pThis->abCurInstr[off++] = REX_W___; 1774 off = Bs3Cg1InsertOpcodes(pThis, off); 1775 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 7 /*iReg*/, 1 /*cbMisalign*/); 1776 break; 1777 1778 default: 1779 return 0; 1780 } 1781 pThis->cbCurInstr = off; 1782 return iEncoding + 1; 1783 } 1784 #endif 1785 return 0; 1786 } 1787 1788 1679 1789 static unsigned BS3_NEAR_CODE Bs3Cg1EncodeNext_MODRM_Vq_WO_UqHi(PBS3CG1STATE pThis, unsigned iEncoding) 1680 1790 { … … 1714 1824 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 1715 1825 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1716 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1826 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1717 1827 } 1718 1828 else … … 1760 1870 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI; 1761 1871 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1762 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1872 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1763 1873 } 1764 1874 else … … 1789 1899 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 1790 1900 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1791 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1901 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1792 1902 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 1793 1903 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 1821 1931 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3; 1822 1932 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1823 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1933 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1824 1934 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 1825 1935 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 1852 1962 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_DW0_ZX; 1853 1963 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1854 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1964 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 4, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1855 1965 } 1856 1966 else … … 1882 1992 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO_ZX; 1883 1993 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 1884 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);1994 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 1885 1995 } 1886 1996 else … … 2022 2132 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_LO; 2023 2133 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2024 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);2134 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 2025 2135 } 2026 2136 else … … 2044 2154 pThis->aOperands[pThis->iRegOp].idxField = BS3CG1DST_XMM3_HI; 2045 2155 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2046 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM_WO);2156 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 8, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM_WO); 2047 2157 } 2048 2158 else … … 2064 2174 case 1: 2065 2175 off = Bs3Cg1InsertOpcodes(pThis, Bs3Cg1InsertReqPrefix(pThis, 0)); 2066 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMis salign*/ );2176 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 2 /*iReg*/, 1 /*cbMisalign*/ ); 2067 2177 if (!Bs3Cg1XcptTypeIsUnaligned(pThis->enmXcptType)) 2068 2178 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 2368 2478 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 2369 2479 off = Bs3Cg1InsertOpcodes(pThis, off); 2370 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);2480 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 2371 2481 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 2372 2482 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 2377 2487 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2378 2488 off = Bs3Cg1InsertOpcodes(pThis, off); 2379 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);2489 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 16, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 2380 2490 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 2381 2491 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 2453 2563 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 2454 2564 off = Bs3Cg1InsertOpcodes(pThis, off); 2455 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);2565 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 2456 2566 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 2457 2567 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 2462 2572 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 2463 2573 off = Bs3Cg1InsertOpcodes(pThis, off); 2464 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMis salign*/, BS3CG1OPLOC_MEM);2574 off = Bs3Cfg1EncodeMemMod0Disp(pThis, false, off, 3 /*iReg*/, 32, 1 /*cbMisalign*/, BS3CG1OPLOC_MEM); 2465 2575 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 2466 2576 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 3248 3358 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/); 3249 3359 off = Bs3Cg1InsertOpcodes(pThis, off); 3250 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMis salign*/);3360 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/); 3251 3361 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 3252 3362 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 3255 3365 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 0 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 3256 3366 off = Bs3Cg1InsertOpcodes(pThis, off); 3257 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMis salign*/);3367 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/); 3258 3368 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 3259 3369 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 3330 3440 off = Bs3Cg1InsertVex2bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/); 3331 3441 off = Bs3Cg1InsertOpcodes(pThis, off); 3332 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMis salign*/);3442 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/); 3333 3443 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 3334 3444 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 3337 3447 off = Bs3Cg1InsertVex3bPrefix(pThis, 0 /*offDst*/, 0xf /*~V*/, 1 /*L*/, 1 /*~R*/, 1 /*~X*/, 1 /*~B*/, 0 /*W*/); 3338 3448 off = Bs3Cg1InsertOpcodes(pThis, off); 3339 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMis salign*/);3449 off = Bs3Cfg1EncodeMemMod0DispWithRegFieldAndDefaults(pThis, false, off, 3 /*iReg*/, 1 /*cbMisalign*/); 3340 3450 if (!Bs3Cg1XcptTypeIsVexUnaligned(pThis->enmXcptType)) 3341 3451 pThis->bAlignmentXcpt = X86_XCPT_GP; … … 3568 3678 case BS3CG1ENC_MODRM_WqZxReg_WO_Vq: 3569 3679 return Bs3Cg1EncodeNext_MODRM_WqZxReg_WO_Vq(pThis, iEncoding); 3570 3571 case BS3CG1ENC_MODRM_Pq_WO_Uq:3572 return Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq(pThis, iEncoding);3573 3680 3574 3681 case BS3CG1ENC_MODRM_Vq_WO_UqHi: … … 3764 3871 3765 3872 case BS3CG1ENC_MODRM_Pq_WO_Uq: 3873 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_Pq_WO_Uq; 3874 pThis->iRmOp = 1; 3875 pThis->iRegOp = 0; 3876 pThis->aOperands[0].cbOp = 8; 3877 pThis->aOperands[1].cbOp = 8; 3878 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX; 3879 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3880 break; 3881 3882 case BS3CG1ENC_MODRM_PdZx_WO_Ed_WZ: 3883 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_PdZx_WO_Ed_WZ; 3884 pThis->iRegOp = 0; 3885 pThis->iRmOp = 1; 3886 pThis->aOperands[0].cbOp = 4; 3887 pThis->aOperands[1].cbOp = 4; 3888 pThis->aOperands[0].idxFieldBase = BS3CG1DST_MM0_LO_ZX; 3889 pThis->aOperands[1].idxFieldBase = BS3CG1DST_EAX; 3890 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX; 3891 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3892 pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX; 3893 pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM; 3894 break; 3895 3896 case BS3CG1ENC_MODRM_Pq_WO_Eq_WNZ: 3897 pThis->pfnEncoder = Bs3Cg1EncodeNext_MODRM_Pq_WO_Eq_WNZ; 3898 pThis->iRegOp = 0; 3899 pThis->iRmOp = 1; 3900 pThis->aOperands[0].cbOp = 8; 3901 pThis->aOperands[1].cbOp = 8; 3902 pThis->aOperands[0].idxFieldBase = BS3CG1DST_MM0; 3903 pThis->aOperands[1].idxFieldBase = BS3CG1DST_RAX; 3904 pThis->aOperands[0].enmLocation = BS3CG1OPLOC_CTX; 3905 pThis->aOperands[1].enmLocation = BS3CG1OPLOC_CTX; 3906 pThis->aOperands[1].enmLocationReg = BS3CG1OPLOC_CTX; 3907 pThis->aOperands[1].enmLocationMem = BS3CG1OPLOC_MEM; 3908 break; 3909 3766 3910 case BS3CG1ENC_MODRM_Vq_WO_UqHi: 3767 3911 case BS3CG1ENC_MODRM_VqHi_WO_Uq: … … 4209 4353 return false; 4210 4354 4355 case BS3CG1CPU_MMX: 4356 return false; 4357 4211 4358 case BS3CG1CPU_SSE: 4212 4359 case BS3CG1CPU_SSE2: … … 4277 4424 if ((g_uBs3CpuDetected & BS3CPU_TYPE_MASK) >= BS3CPU_Pentium) 4278 4425 return true; 4426 return false; 4427 4428 case BS3CG1CPU_MMX: 4429 if (g_uBs3CpuDetected & BS3CPU_F_CPUID) 4430 { 4431 ASMCpuIdExSlow(1, 0, 0, 0, NULL, NULL, NULL, &fEdx); 4432 if (fEdx & X86_CPUID_FEATURE_EDX_MMX) 4433 return Bs3Cg3SetupSseAndAvx(pThis); /** @todo only do FNSAVE/FXSAVE here? */ 4434 } 4279 4435 return false; 4280 4436 … … 4710 4866 PtrField.pu64[1] = 0; 4711 4867 } 4712 else if (offField <= RT_OFFSETOF(BS3REGCTX, r15) ) /* Clear the top dword. */4868 else if (offField <= RT_OFFSETOF(BS3REGCTX, r15) /* Clear the top dword. */) 4713 4869 PtrField.pu32[1] = 0; 4870 else if ((unsigned)(idxField - BS3CG1DST_MM0_LO_ZX) <= (unsigned)(BS3CG1DST_MM7_LO_ZX - BS3CG1DST_MM0_LO_ZX)) 4871 { 4872 PtrField.pu32[1] = 0; 4873 PtrField.pu32[2] = 0xffff; /* observed on skylake */ 4874 } 4714 4875 switch (bOpcode & BS3CG1_CTXOP_OPERATOR_MASK) 4715 4876 {
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